GB1320910A - Amplifiers - Google Patents

Abstract

1320910 Gains control arrangements PLESSEY CO Ltd 30 Sept 1970 [16 Sept 1969] 45570/69 Headings H3T and H4R An amplifier system comprises means for separately amplifying each of two differential input signals to provide voltage gains of K and I-K on the signals where K varies over the range 0 #K # 1. The amplified signals may be combined to provide a differential output signal. In the schematic arrangement of Fig. 1, differential input signals S(t) and -S(t) are combined with a D.C. potential V D and each of the combined signals amplified by K and also by (1-K). The two signals amplified by (1-K) are combined to give a voltage in which the differential signals do not appear, the combined signals being halved and added to both the signals amplified by K. The final output comprises a pair of differential signals (V D + KS)(t)) and (V D - KSt) respectively in which the gain of the differential signals has been altered by the factor K but in which the D.C. term V D is unchanged. In an embodiment the differential signals S(t) and -S(t) and the D.C. voltage V D are applied to the bases of a pair of transistors TR2, TR6, Fig. 2, each of which forms the common-emitter load of a pair of transistors TR1, TB3, TR5, TR7 respectively, comprising long-tailed pairs. The gain controlling voltage is applied to the bases of transistors TR3, TR5 and a reference voltage to the bases of transistors TR1, TR7. The differential outputs are taken from load resistors R1 in the collector circuits of transistors TR3, TR5: the outputs from transistors TR1, TR7 are combined in a common collector load resistor R 2 = R1/2 and the combination is added to the output signals by means of emitter-follower TR4.