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GB1379558A - Methods of manufacture of multilayer circuit structures - Google Patents

Methods of manufacture of multilayer circuit structures

Info

Publication number
GB1379558A
GB1379558A GB1515571A GB1515571A GB1379558A GB 1379558 A GB1379558 A GB 1379558A GB 1515571 A GB1515571 A GB 1515571A GB 1515571 A GB1515571 A GB 1515571A GB 1379558 A GB1379558 A GB 1379558A
Authority
GB
United Kingdom
Prior art keywords
layer
multilayer circuit
mask
plated
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1515571A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Services Ltd
Original Assignee
Fujitsu Services Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Services Ltd filed Critical Fujitsu Services Ltd
Priority to GB1515571A priority Critical patent/GB1379558A/en
Priority to FR7217293A priority patent/FR2137902B1/fr
Publication of GB1379558A publication Critical patent/GB1379558A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0723—Electroplating, e.g. finish plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

1379558 Printed circuits INTERNATIONAL COMPUTERS Ltd 12 May 1972 [15 May 1971] 15155/71 Heading H1R A multilayer circuit is built up in stages. A laser beam (Fig. 3, not shown) makes 130 Ám diameter holes 13 in a 200 Ám thick epoxy fibreglass substrate 11 carrying a layer 10 of conductors. The holes are cleaned and then filled electrolytically with copper 14. A 500 nm conductive layer 15 is formed. A photoresist mask 16 is applied. Areas 17 are then plated up to 25 Ám thickness. The mask 16 is removed by a solvent. The layer 15 is removed, by rinsing in a weak etchant, except where it forms parts of the desired conductive areas 17. Another insulating layer 21 is stuck on, and the above steps are repeated, as often as required. In an alternative process the layer 15 is plated up to 25 Ám thickness, a different mask 16 is applied, and the unwanted parts of the layer 15 are etched away. If desired a hole can be formed and an interconnection made through more than one insulating layer.
GB1515571A 1971-05-15 1971-05-15 Methods of manufacture of multilayer circuit structures Expired GB1379558A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB1515571A GB1379558A (en) 1971-05-15 1971-05-15 Methods of manufacture of multilayer circuit structures
FR7217293A FR2137902B1 (en) 1971-05-15 1972-05-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1515571A GB1379558A (en) 1971-05-15 1971-05-15 Methods of manufacture of multilayer circuit structures

Publications (1)

Publication Number Publication Date
GB1379558A true GB1379558A (en) 1975-01-02

Family

ID=10054011

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1515571A Expired GB1379558A (en) 1971-05-15 1971-05-15 Methods of manufacture of multilayer circuit structures

Country Status (2)

Country Link
FR (1) FR2137902B1 (en)
GB (1) GB1379558A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4258468A (en) * 1978-12-14 1981-03-31 Western Electric Company, Inc. Forming vias through multilayer circuit boards
DE3211025A1 (en) * 1981-04-14 1982-10-21 Kollmorgen Technologies Corp., 75201 Dallas, Tex. CONNECTING NETWORK FOR COMPONENTS AND METHOD FOR THE PRODUCTION THEREOF
US4703559A (en) * 1984-11-02 1987-11-03 Kernforschungszentrum Karlsruhe Gmbh Method for producing connecting elements for electrically joining microelectronic components
EP1194021A2 (en) * 2000-09-27 2002-04-03 Hitachi, Ltd. Method of producing multilayer printed wiring board and multilayer printed wiring board
EP1450590A2 (en) * 2003-02-24 2004-08-25 Endicott Interconnect Technologies, Inc. Circuitized substrate and method of making same
CN110868797A (en) * 2019-12-10 2020-03-06 东莞阿尔泰显示技术有限公司 Circuit board, method of manufacturing the same, and semiconductor element template

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2199183B (en) * 1986-12-23 1990-07-04 Gen Electric Plc Interconnection formation in multilayer circuits
US5266446A (en) * 1990-11-15 1993-11-30 International Business Machines Corporation Method of making a multilayer thin film structure
WO1992009102A1 (en) * 1990-11-15 1992-05-29 International Business Machines Corporation A method of making a multilayer thin film structure
FR2785761B1 (en) * 1998-11-05 2002-01-25 Rapide Circuit Imprime Rci PROCESS FOR MAKING ELECTRICAL CONNECTIONS

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4258468A (en) * 1978-12-14 1981-03-31 Western Electric Company, Inc. Forming vias through multilayer circuit boards
DE3211025A1 (en) * 1981-04-14 1982-10-21 Kollmorgen Technologies Corp., 75201 Dallas, Tex. CONNECTING NETWORK FOR COMPONENTS AND METHOD FOR THE PRODUCTION THEREOF
DE3211025C2 (en) * 1981-04-14 1991-11-21 Kollmorgen Corp., Simsbury, Conn., Us
US4703559A (en) * 1984-11-02 1987-11-03 Kernforschungszentrum Karlsruhe Gmbh Method for producing connecting elements for electrically joining microelectronic components
EP1194021A2 (en) * 2000-09-27 2002-04-03 Hitachi, Ltd. Method of producing multilayer printed wiring board and multilayer printed wiring board
EP1194021A3 (en) * 2000-09-27 2003-07-23 Hitachi, Ltd. Method of producing multilayer printed wiring board and multilayer printed wiring board
US6772515B2 (en) 2000-09-27 2004-08-10 Hitachi, Ltd. Method of producing multilayer printed wiring board
EP1450590A2 (en) * 2003-02-24 2004-08-25 Endicott Interconnect Technologies, Inc. Circuitized substrate and method of making same
EP1450590A3 (en) * 2003-02-24 2007-01-17 Endicott Interconnect Technologies, Inc. Circuitized substrate and method of making same
CN110868797A (en) * 2019-12-10 2020-03-06 东莞阿尔泰显示技术有限公司 Circuit board, method of manufacturing the same, and semiconductor element template

Also Published As

Publication number Publication date
FR2137902A1 (en) 1972-12-29
FR2137902B1 (en) 1975-08-01

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Legal Events

Date Code Title Description
PS Patent sealed
PE20 Patent expired after termination of 20 years