GB1206759A - Semiconductor devices - Google Patents
Semiconductor devicesInfo
- Publication number
- GB1206759A GB1206759A GB3337867A GB3337867A GB1206759A GB 1206759 A GB1206759 A GB 1206759A GB 3337867 A GB3337867 A GB 3337867A GB 3337867 A GB3337867 A GB 3337867A GB 1206759 A GB1206759 A GB 1206759A
- Authority
- GB
- United Kingdom
- Prior art keywords
- layer
- die
- july
- bonding pads
- face
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Die Bonding (AREA)
Abstract
1,206,759. Semi-conductor devices. STANDARD TELEPHONES & CABLES Ltd. 18 July, 1968 [20 July, 1967], No. 33378/67. Heading H1K. A semiconductor device comprises a die, with electrodes at only one face, attached by a layer of adhesive plastics material at its electrodeless face to a support. Die and support are then encapsulated in plastics to have only external electrodes exposed. As shown in Fig. 1 a planar integrated circuit silicon die with an aluminium interconnection pattern and bonding pads is disposed on the mounting plate 3 of a gold plated iron-nickel-cobalt alloy lead frame 1 on a blob of a commercial impact polymerizable adhesive containing methyl-2-cyanoacrylate and pressed to set the layer to a layer 25Á thick. Aternative adhesives are silicone varnish and silver-loaded epoxide resin but these have to be heat cured at 200‹ C. After connecting the lead pattern to the bonding pads by aluminium wires 5, the assembly is precoated in a commercial resin known as DC644 and a final encapsulation of filled epoxide resin applied by transfer moulding. Diodes, transistors, and thyristors may be potted in like manner.
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB3337867A GB1206759A (en) | 1967-07-20 | 1967-07-20 | Semiconductor devices |
IE62368A IE32069B1 (en) | 1967-07-20 | 1968-05-23 | Semiconductor devices |
DE19681764554 DE1764554A1 (en) | 1967-07-20 | 1968-06-26 | Semiconductor component |
ES356030A ES356030A1 (en) | 1967-07-20 | 1968-07-11 | A method for manufacturing semiconductor devices. (Machine-translation by Google Translate, not legally binding) |
CH1055468A CH483724A (en) | 1967-07-20 | 1968-07-15 | Semiconductor component |
NL6810225A NL6810225A (en) | 1967-07-20 | 1968-07-19 | |
FR1572077D FR1572077A (en) | 1967-07-20 | 1968-07-19 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB33478/67A GB1169069A (en) | 1966-08-04 | 1967-07-20 | Ionogenic Polymerization of Lactams |
GB3337867A GB1206759A (en) | 1967-07-20 | 1967-07-20 | Semiconductor devices |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1206759A true GB1206759A (en) | 1970-09-30 |
Family
ID=26261845
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB3337867A Expired GB1206759A (en) | 1967-07-20 | 1967-07-20 | Semiconductor devices |
Country Status (5)
Country | Link |
---|---|
CH (1) | CH483724A (en) |
DE (1) | DE1764554A1 (en) |
FR (1) | FR1572077A (en) |
GB (1) | GB1206759A (en) |
NL (1) | NL6810225A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0074168A1 (en) * | 1981-07-24 | 1983-03-16 | Fujitsu Limited | Device and method for packaging electronic devices |
EP0135416A1 (en) * | 1983-07-22 | 1985-03-27 | Fairchild Semiconductor Corporation | Integrated circuit having a pre-attached conductive mounting media and method of making the same |
US4570337A (en) * | 1982-04-19 | 1986-02-18 | Olin Corporation | Method of assembling a chip carrier |
GB2254186A (en) * | 1991-03-23 | 1992-09-30 | Samsung Electronics Co Ltd | Semiconductor lead frame |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2628951C2 (en) * | 1976-06-28 | 1989-11-23 | Ed. Scharwächter GmbH & Co KG, 5630 Remscheid | Detachable hinge, especially for motor vehicles |
JPS57111034A (en) * | 1980-12-10 | 1982-07-10 | Hitachi Ltd | Semiconductor device and its manufacture |
DE59506424D1 (en) * | 1994-06-06 | 1999-08-26 | Henkel Kgaa | METHOD FOR PRODUCING BISCYANOACRYLATES |
WO1996020501A1 (en) * | 1994-12-27 | 1996-07-04 | National Semiconductor Corporation | An integrated circuit package encapsulated by fiber laden molding material and its method of manufacturing |
-
1967
- 1967-07-20 GB GB3337867A patent/GB1206759A/en not_active Expired
-
1968
- 1968-06-26 DE DE19681764554 patent/DE1764554A1/en active Pending
- 1968-07-15 CH CH1055468A patent/CH483724A/en not_active IP Right Cessation
- 1968-07-19 NL NL6810225A patent/NL6810225A/xx unknown
- 1968-07-19 FR FR1572077D patent/FR1572077A/fr not_active Expired
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0074168A1 (en) * | 1981-07-24 | 1983-03-16 | Fujitsu Limited | Device and method for packaging electronic devices |
US4590672A (en) * | 1981-07-24 | 1986-05-27 | Fujitsu Limited | Package for electronic device and method for producing same |
US4570337A (en) * | 1982-04-19 | 1986-02-18 | Olin Corporation | Method of assembling a chip carrier |
EP0135416A1 (en) * | 1983-07-22 | 1985-03-27 | Fairchild Semiconductor Corporation | Integrated circuit having a pre-attached conductive mounting media and method of making the same |
US4688075A (en) * | 1983-07-22 | 1987-08-18 | Fairchild Semiconductor Corporation | Integrated circuit having a pre-attached conductive mounting media and method of making the same |
GB2254186A (en) * | 1991-03-23 | 1992-09-30 | Samsung Electronics Co Ltd | Semiconductor lead frame |
Also Published As
Publication number | Publication date |
---|---|
DE1764554A1 (en) | 1971-08-26 |
NL6810225A (en) | 1969-01-22 |
CH483724A (en) | 1969-12-31 |
FR1572077A (en) | 1969-06-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
435 | Patent endorsed 'licences of right' on the date specified (sect. 35/1949) | ||
PLNP | Patent lapsed through nonpayment of renewal fees |