GB1014602A - Improvements relating to apparatus for converting pulse code signals into analogue form - Google Patents
Improvements relating to apparatus for converting pulse code signals into analogue formInfo
- Publication number
- GB1014602A GB1014602A GB17603/61A GB1760361A GB1014602A GB 1014602 A GB1014602 A GB 1014602A GB 17603/61 A GB17603/61 A GB 17603/61A GB 1760361 A GB1760361 A GB 1760361A GB 1014602 A GB1014602 A GB 1014602A
- Authority
- GB
- United Kingdom
- Prior art keywords
- unit
- decoder
- generators
- signals
- shannon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
1,014,602. Selective signalling. ASSOCIATED ELECTRICAL INDUSTRIES Ltd. April 24, 1962 [May 15, 1961], No. 17603/61. Heading G4H. In a digital-to-analogue converter using a Shannon-Rack decoder the digital signals from a number of locations are combined prior to feeding the decoder. In the embodiment described, there are seven inputs, IN1-IN7, each comprising a serial five-unit binary number, the least significant digit arriving first. The word elements are gated to current generators CG1-CG7 which give a unit current if the corresponding input is in its one state. The currents are combined and used to trigger a Shannon-Rack form of decoder which, after all seven five-unit signals have been received, gives an output dependent on the sum of the input signals. This output is stored in a " positive " store. Negative numbers are indicated by the addition of a sign bit to the inverse of the number. Each sign bit causes a signal weighted thirty-one units to be added to a " negative " store. To obtain the resultant analogue signal the contents of the stores are added. If required, the individual inputs can be weighted by weighting the generators CG and the thirty-one-unit generators.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB17603/61A GB1014602A (en) | 1961-05-15 | 1961-05-15 | Improvements relating to apparatus for converting pulse code signals into analogue form |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB17603/61A GB1014602A (en) | 1961-05-15 | 1961-05-15 | Improvements relating to apparatus for converting pulse code signals into analogue form |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1014602A true GB1014602A (en) | 1965-12-31 |
Family
ID=10098046
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB17603/61A Expired GB1014602A (en) | 1961-05-15 | 1961-05-15 | Improvements relating to apparatus for converting pulse code signals into analogue form |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB1014602A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9904977B2 (en) | 2014-05-14 | 2018-02-27 | Intel Corporation | Exploiting frame to frame coherency in a sort-middle architecture |
-
1961
- 1961-05-15 GB GB17603/61A patent/GB1014602A/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9904977B2 (en) | 2014-05-14 | 2018-02-27 | Intel Corporation | Exploiting frame to frame coherency in a sort-middle architecture |
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