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FR2972548B1 - DEVICE FOR IMPROVING FAULT TOLERANCE OF A PROCESSOR - Google Patents

DEVICE FOR IMPROVING FAULT TOLERANCE OF A PROCESSOR

Info

Publication number
FR2972548B1
FR2972548B1 FR1100688A FR1100688A FR2972548B1 FR 2972548 B1 FR2972548 B1 FR 2972548B1 FR 1100688 A FR1100688 A FR 1100688A FR 1100688 A FR1100688 A FR 1100688A FR 2972548 B1 FR2972548 B1 FR 2972548B1
Authority
FR
France
Prior art keywords
processor
electronic component
fault tolerance
known state
programmable electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1100688A
Other languages
French (fr)
Other versions
FR2972548A1 (en
Inventor
Guy Estaves
Fabian Tourteau
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thales SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales SA filed Critical Thales SA
Priority to FR1100688A priority Critical patent/FR2972548B1/en
Priority to EP12158040A priority patent/EP2498184A1/en
Priority to US13/413,308 priority patent/US20120233499A1/en
Priority to IN659DE2012 priority patent/IN2012DE00659A/en
Priority to CA2770955A priority patent/CA2770955A1/en
Priority to JP2012050554A priority patent/JP2012190460A/en
Publication of FR2972548A1 publication Critical patent/FR2972548A1/en
Application granted granted Critical
Publication of FR2972548B1 publication Critical patent/FR2972548B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0712Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a virtual computing platform, e.g. logically partitioned systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy
    • G06F11/0754Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1064Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in cache or content addressable memories
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1415Saving, restoring, recovering or retrying at system level
    • G06F11/1438Restarting or rejuvenating
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1479Generic software techniques for error detection or fault masking
    • G06F11/1482Generic software techniques for error detection or fault masking by means of middleware or OS functionality
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • G06F9/5077Logical partitioning of resources; Management or configuration of virtualized resources
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1479Generic software techniques for error detection or fault masking
    • G06F11/1482Generic software techniques for error detection or fault masking by means of middleware or OS functionality
    • G06F11/1484Generic software techniques for error detection or fault masking by means of middleware or OS functionality involving virtual machines
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/805Real-time

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Mathematical Physics (AREA)
  • Hardware Redundancy (AREA)
  • Retry When Errors Occur (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The device has a software layer i.e. hypervisor (202), centralizing exchanges between a processor and an application (201) and implementing management mechanisms of fault tolerances. A programmable electronic component forms an interface between the processor and a memory unit e.g. synchronous dynamic RAM and a data input and output interface. One of the mechanisms is a reset function at known state of the processor, where the function is periodical with a configurable period. The mechanism is reset to the known state by a resetting signal issued by the programmable electronic component.
FR1100688A 2011-03-08 2011-03-08 DEVICE FOR IMPROVING FAULT TOLERANCE OF A PROCESSOR Active FR2972548B1 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
FR1100688A FR2972548B1 (en) 2011-03-08 2011-03-08 DEVICE FOR IMPROVING FAULT TOLERANCE OF A PROCESSOR
EP12158040A EP2498184A1 (en) 2011-03-08 2012-03-05 Device for improving the fault-tolerance of a processor
US13/413,308 US20120233499A1 (en) 2011-03-08 2012-03-06 Device for Improving the Fault Tolerance of a Processor
IN659DE2012 IN2012DE00659A (en) 2011-03-08 2012-03-07
CA2770955A CA2770955A1 (en) 2011-03-08 2012-03-07 Device for improving the fault tolerance of a processor
JP2012050554A JP2012190460A (en) 2011-03-08 2012-03-07 Device for improving fault tolerance of processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1100688A FR2972548B1 (en) 2011-03-08 2011-03-08 DEVICE FOR IMPROVING FAULT TOLERANCE OF A PROCESSOR

Publications (2)

Publication Number Publication Date
FR2972548A1 FR2972548A1 (en) 2012-09-14
FR2972548B1 true FR2972548B1 (en) 2013-07-12

Family

ID=45757344

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1100688A Active FR2972548B1 (en) 2011-03-08 2011-03-08 DEVICE FOR IMPROVING FAULT TOLERANCE OF A PROCESSOR

Country Status (6)

Country Link
US (1) US20120233499A1 (en)
EP (1) EP2498184A1 (en)
JP (1) JP2012190460A (en)
CA (1) CA2770955A1 (en)
FR (1) FR2972548B1 (en)
IN (1) IN2012DE00659A (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102013214013A1 (en) * 2013-07-17 2015-01-22 Continental Teves Ag & Co. Ohg Method for increasing the availability of a microprocessor system
US9727357B2 (en) * 2013-10-01 2017-08-08 International Business Machines Corporation Failover detection and treatment in checkpoint systems
EP2884392B1 (en) 2013-12-13 2018-08-15 Thales Triple software redundancy fault tolerant framework architecture
FR3021430B1 (en) * 2014-05-20 2016-05-13 Bull Sas METHOD OF OBTAINING INFORMATION STORED IN MODULE REGISTERS (S) OF PROCESSING A COMPUTER JUST AFTER THE FATAL ERROR HAS OCCURRED
GB2531546B (en) 2014-10-21 2016-10-12 Ibm Collaborative maintenance of software programs
CN105045672B (en) * 2015-07-24 2018-07-06 哈尔滨工业大学 A kind of multi-level fault tolerance based on SRAM FPGA reinforces satellite information processing system
KR102087286B1 (en) 2018-06-28 2020-04-23 한국생산기술연구원 Pneumatic haptic module for virtual reality and system provided with the same

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04148246A (en) * 1990-10-08 1992-05-21 Nec Corp Watchdog timer
JPH06230988A (en) * 1993-02-04 1994-08-19 Mitsubishi Electric Corp Computer
US6397242B1 (en) * 1998-05-15 2002-05-28 Vmware, Inc. Virtualization system including a virtual machine monitor for a computer with a segmented architecture
US6467007B1 (en) * 1999-05-19 2002-10-15 International Business Machines Corporation Processor reset generated via memory access interrupt
GB2353113B (en) * 1999-08-11 2001-10-10 Sun Microsystems Inc Software fault tolerant computer system
US6772259B2 (en) * 2001-09-12 2004-08-03 International Business Machines Corporation Interrupt handlers used in different modes of operations
US20050204186A1 (en) * 2004-03-09 2005-09-15 Rothman Michael A. System and method to implement a rollback mechanism for a data storage unit
US7467325B2 (en) * 2005-02-10 2008-12-16 International Business Machines Corporation Processor instruction retry recovery
DE102006050715A1 (en) * 2006-10-10 2008-04-17 Robert Bosch Gmbh Valid signal generating method for application program in signal processing system, involves switching signal processing system into comparison operating mode after occurrence of error during termination of application program
US8161478B2 (en) * 2007-05-10 2012-04-17 Embotics Corporation Management of computer systems by using a hierarchy of autonomic management elements
US7840839B2 (en) * 2007-11-06 2010-11-23 Vmware, Inc. Storage handling for fault tolerance in virtual machines
JP4783392B2 (en) * 2008-03-31 2011-09-28 株式会社東芝 Information processing apparatus and failure recovery method
US8381032B2 (en) * 2008-08-06 2013-02-19 O'shantel Software L.L.C. System-directed checkpointing implementation using a hypervisor layer
US8856783B2 (en) * 2010-10-12 2014-10-07 Citrix Systems, Inc. Allocating virtual machines according to user-specific virtual machine metrics
US8887227B2 (en) * 2010-03-23 2014-11-11 Citrix Systems, Inc. Network policy implementation for a multi-virtual machine appliance within a virtualization environtment
US8468524B2 (en) * 2010-10-13 2013-06-18 Lsi Corporation Inter-virtual machine time profiling of I/O transactions
US8488446B1 (en) * 2010-10-27 2013-07-16 Amazon Technologies, Inc. Managing failure behavior for computing nodes of provided computer networks
EP2656594B1 (en) * 2010-12-20 2015-08-26 Citrix Systems Inc. Systems and methods for implementing connection mirroring in a multi-core system
US8726276B2 (en) * 2011-01-26 2014-05-13 International Business Machines Corporation Resetting a virtual function that is hosted by an input/output adapter
US9342432B2 (en) * 2011-04-04 2016-05-17 International Business Machines Corporation Hardware performance-monitoring facility usage after context swaps

Also Published As

Publication number Publication date
FR2972548A1 (en) 2012-09-14
IN2012DE00659A (en) 2015-07-31
EP2498184A1 (en) 2012-09-12
US20120233499A1 (en) 2012-09-13
CA2770955A1 (en) 2012-09-08
JP2012190460A (en) 2012-10-04

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