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FR2813427B1 - Circuit de commande d'une memoire dram - Google Patents

Circuit de commande d'une memoire dram

Info

Publication number
FR2813427B1
FR2813427B1 FR0010943A FR0010943A FR2813427B1 FR 2813427 B1 FR2813427 B1 FR 2813427B1 FR 0010943 A FR0010943 A FR 0010943A FR 0010943 A FR0010943 A FR 0010943A FR 2813427 B1 FR2813427 B1 FR 2813427B1
Authority
FR
France
Prior art keywords
control circuit
memory control
drive memory
drive
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0010943A
Other languages
English (en)
Other versions
FR2813427A1 (fr
Inventor
Pierre Marty
Gaelle Rey
Pascal Chauvet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0010943A priority Critical patent/FR2813427B1/fr
Priority to JP2002521719A priority patent/JP2004507817A/ja
Priority to PCT/FR2001/002669 priority patent/WO2002017095A1/fr
Priority to EP01965353A priority patent/EP1311962A1/fr
Publication of FR2813427A1 publication Critical patent/FR2813427A1/fr
Application granted granted Critical
Publication of FR2813427B1 publication Critical patent/FR2813427B1/fr
Priority to US10/700,361 priority patent/US20040210730A1/en
Priority to US11/446,553 priority patent/US7395399B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
FR0010943A 2000-08-25 2000-08-25 Circuit de commande d'une memoire dram Expired - Fee Related FR2813427B1 (fr)

Priority Applications (6)

Application Number Priority Date Filing Date Title
FR0010943A FR2813427B1 (fr) 2000-08-25 2000-08-25 Circuit de commande d'une memoire dram
JP2002521719A JP2004507817A (ja) 2000-08-25 2001-08-24 Ｄｒａｍ制御回路
PCT/FR2001/002669 WO2002017095A1 (fr) 2000-08-25 2001-08-24 Circuit de commande d'une memoire dram
EP01965353A EP1311962A1 (fr) 2000-08-25 2001-08-24 Circuit de commande d'une memoire dram
US10/700,361 US20040210730A1 (en) 2000-08-25 2003-11-03 Dram control circuit
US11/446,553 US7395399B2 (en) 2000-08-25 2006-06-02 Control circuit to enable high data rate access to a DRAM with a plurality of areas

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0010943A FR2813427B1 (fr) 2000-08-25 2000-08-25 Circuit de commande d'une memoire dram

Publications (2)

Publication Number Publication Date
FR2813427A1 FR2813427A1 (fr) 2002-03-01
FR2813427B1 true FR2813427B1 (fr) 2002-11-29

Family

ID=8853733

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0010943A Expired - Fee Related FR2813427B1 (fr) 2000-08-25 2000-08-25 Circuit de commande d'une memoire dram

Country Status (4)

Country Link
EP (1) EP1311962A1 (fr)
JP (1) JP2004507817A (fr)
FR (1) FR2813427B1 (fr)
WO (1) WO2002017095A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2441042A1 (fr) 2001-03-15 2002-09-26 International Bioimmune Systems, Inc. Traitement par anticorps monoclonal du cancer du pancreas
IT1399916B1 (it) * 2010-04-30 2013-05-09 Balluchi Dispositivo di memoria ad accesso di registro indicizzato

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5822772A (en) * 1996-03-22 1998-10-13 Industrial Technology Research Institute Memory controller and method of memory access sequence recordering that eliminates page miss and row miss penalties
US6385708B1 (en) * 1998-11-16 2002-05-07 Infineon Technologies Ag Using a timing-look-up-table and page timers to determine the time between two consecutive memory accesses

Also Published As

Publication number Publication date
JP2004507817A (ja) 2004-03-11
FR2813427A1 (fr) 2002-03-01
WO2002017095A1 (fr) 2002-02-28
EP1311962A1 (fr) 2003-05-21

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20060428