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FR2795201B1 - DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICES COMPRISING AT LEAST ONE CHIP FIXED ON A SUPPORT - Google Patents

DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICES COMPRISING AT LEAST ONE CHIP FIXED ON A SUPPORT

Info

Publication number
FR2795201B1
FR2795201B1 FR9907551A FR9907551A FR2795201B1 FR 2795201 B1 FR2795201 B1 FR 2795201B1 FR 9907551 A FR9907551 A FR 9907551A FR 9907551 A FR9907551 A FR 9907551A FR 2795201 B1 FR2795201 B1 FR 2795201B1
Authority
FR
France
Prior art keywords
chip
support
bump contact
electronic devices
manufacturing electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9907551A
Other languages
French (fr)
Other versions
FR2795201A1 (en
Inventor
Philippe Patrice
Jean Christophe Fidalgo
Bernard Calvas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gemplus SA
Original Assignee
Gemplus Card International SA
Gemplus SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR9907551A priority Critical patent/FR2795201B1/en
Application filed by Gemplus Card International SA, Gemplus SA filed Critical Gemplus Card International SA
Priority to PCT/FR2000/001490 priority patent/WO2000077729A1/en
Priority to DE60002328T priority patent/DE60002328T2/en
Priority to CN00811463A priority patent/CN1369078A/en
Priority to US10/018,090 priority patent/US6667192B1/en
Priority to AU54103/00A priority patent/AU5410300A/en
Priority to EP00938859A priority patent/EP1192592B1/en
Priority to AT00938859T priority patent/ATE238593T1/en
Publication of FR2795201A1 publication Critical patent/FR2795201A1/en
Application granted granted Critical
Publication of FR2795201B1 publication Critical patent/FR2795201B1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743—External electrical contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5388—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates for flat cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68313—Auxiliary support including a cavity for storing a finished device, e.g. IC package, or a partly finished device, e.g. die, during manufacturing or mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
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    • H01L2924/01013—Aluminum [Al]
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    • H01L2924/01033—Arsenic [As]
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01058—Cerium [Ce]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/01061—Promethium [Pm]
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    • H01—ELECTRIC ELEMENTS
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    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
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    • H01—ELECTRIC ELEMENTS
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Theoretical Computer Science (AREA)
  • Wire Bonding (AREA)
  • Credit Cards Or The Like (AREA)
  • Die Bonding (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Apparatus For Radiation Diagnosis (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

A method for mounting, on a support, at least a microcircuit in the form of a chip produced on a very thin semiconductor substrate. An interconnection point is provided at the chip in the form of a bump contact in weldable material. The bump contact has a welding surface in the same plane as at least one of the chip faces. An interconnection pad is provided on the support that is designed to be welded with a corresponding bump contact of the chip. The welding face of each bump contact of the chip is placed opposite each corresponding interconnection pad of the support. Each bump contact of the chip is welded with each corresponding interconnection pad of the support. The method can be applied to a device such as a chip card.
FR9907551A 1999-06-15 1999-06-15 DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICES COMPRISING AT LEAST ONE CHIP FIXED ON A SUPPORT Expired - Fee Related FR2795201B1 (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
FR9907551A FR2795201B1 (en) 1999-06-15 1999-06-15 DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICES COMPRISING AT LEAST ONE CHIP FIXED ON A SUPPORT
DE60002328T DE60002328T2 (en) 1999-06-15 2000-05-30 DEVICE AND MANUFACTURING METHOD OF DEVICES WITH AT LEAST ONE IC AU
CN00811463A CN1369078A (en) 1999-06-15 2000-05-30 Device and method for making devices comprising at least a chip fixed on support
US10/018,090 US6667192B1 (en) 1999-06-15 2000-05-30 Device and method for making devices comprising at least a chip fixed on a support
PCT/FR2000/001490 WO2000077729A1 (en) 1999-06-15 2000-05-30 Device and method for making devices comprising at least a chip fixed on a support
AU54103/00A AU5410300A (en) 1999-06-15 2000-05-30 Device and method for making devices comprising at least a chip fixed on a support
EP00938859A EP1192592B1 (en) 1999-06-15 2000-05-30 Device and method for making devices comprising at least a chip fixed on a support
AT00938859T ATE238593T1 (en) 1999-06-15 2000-05-30 DEVICE AND PRODUCTION METHOD OF DEVICES WITH AT LEAST ONE IC AU

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9907551A FR2795201B1 (en) 1999-06-15 1999-06-15 DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICES COMPRISING AT LEAST ONE CHIP FIXED ON A SUPPORT

Publications (2)

Publication Number Publication Date
FR2795201A1 FR2795201A1 (en) 2000-12-22
FR2795201B1 true FR2795201B1 (en) 2001-08-31

Family

ID=9546804

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9907551A Expired - Fee Related FR2795201B1 (en) 1999-06-15 1999-06-15 DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICES COMPRISING AT LEAST ONE CHIP FIXED ON A SUPPORT

Country Status (8)

Country Link
US (1) US6667192B1 (en)
EP (1) EP1192592B1 (en)
CN (1) CN1369078A (en)
AT (1) ATE238593T1 (en)
AU (1) AU5410300A (en)
DE (1) DE60002328T2 (en)
FR (1) FR2795201B1 (en)
WO (1) WO2000077729A1 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0110088D0 (en) * 2001-04-25 2001-06-20 Filtronic Compound Semiconduct Semiconductor wafer handling method
JP2003298006A (en) * 2002-03-29 2003-10-17 Seiko Epson Corp Semiconductor device and electro-optical device
JP3739752B2 (en) * 2003-02-07 2006-01-25 株式会社 ハリーズ Small-piece transfer device capable of random-cycle shifting
US20050003650A1 (en) 2003-07-02 2005-01-06 Shriram Ramanathan Three-dimensional stacked substrate arrangements
ATE488985T1 (en) * 2004-12-03 2010-12-15 Hallys Corp INTERMEDIATE BONDING DEVICE
CN101073297A (en) * 2004-12-03 2007-11-14 哈里斯股份有限公司 Electronic component production method and electronic component production equipment
JP4810531B2 (en) 2005-04-06 2011-11-09 株式会社 ハリーズ Electronic component manufacturing equipment
WO2006112447A1 (en) * 2005-04-18 2006-10-26 Hallys Corporation Electronic component and method for manufacturing such electronic component

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0576680B1 (en) * 1992-01-20 2004-03-31 Fujitsu Limited Magnetic head assembly, its manufacture, and magnetic disc device
US5731633A (en) * 1992-09-16 1998-03-24 Gary W. Hamilton Thin multichip module
US5342999A (en) * 1992-12-21 1994-08-30 Motorola, Inc. Apparatus for adapting semiconductor die pads and method therefor
DE4431606A1 (en) * 1994-09-05 1996-03-07 Siemens Ag Chip card module with copper coil on a carrier
DE19621044A1 (en) * 1996-05-24 1997-11-27 Giesecke & Devrient Gmbh Method for producing a card-shaped data carrier
US6027958A (en) * 1996-07-11 2000-02-22 Kopin Corporation Transferred flexible integrated circuit
US5795818A (en) * 1996-12-06 1998-08-18 Amkor Technology, Inc. Integrated circuit chip to substrate interconnection and method

Also Published As

Publication number Publication date
EP1192592B1 (en) 2003-04-23
WO2000077729A1 (en) 2000-12-21
AU5410300A (en) 2001-01-02
DE60002328D1 (en) 2003-05-28
DE60002328T2 (en) 2004-02-12
CN1369078A (en) 2002-09-11
EP1192592A1 (en) 2002-04-03
FR2795201A1 (en) 2000-12-22
US6667192B1 (en) 2003-12-23
ATE238593T1 (en) 2003-05-15

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