FR2574242A1 - Clock recovery device for C-MAC-packet or D2-MAC-packet television signal receiver and television signal receiver equipped with such a device - Google Patents

Abstract

Clock recovery device for receiver of television signals transmitted by a C-MAC-packet or D2-MAC-packet method with vertical multiplexing of digital paths, comprising, following a clock signal generation circuit 100 receiving the data signals, a phase-locked loop composed of in succession a phase comparator 10, a loop filter 20 and a voltage-controlled oscillator 30 whose output is brought back to the second input of the phase comparator, and an auxiliary loop itself comprising in series an on-off switch 110, a low-pass filter 120, a sample-and-hold circuit 130, and a changeover switch 140, the said on/off and changeover switches being controlled by a position control circuit 150 itself connected to the output of the oscillator 30 and to that of a synchronisation extraction circuit 200.

Description

RHYTHM RECOVERY DEVICE FOR SIGNAL RECEIVER
TELEVISION C-MAC-PACKETS OR D2 -MAC -PACKAGES AND RECEIVER
TELEVISION SIGNALS EQUIPPED WITH SUCH A DEVICE.

 The present invention relates to a timing recovery device for receiver of television signals transmitted according to a C-MAC-packet method with vertical multiplexing of digital channels.

 The second revised version (March 1984) - of the EBU standard SPB 284 (European Broadcasting Union) presents in detail the standard of transmission of television signals called C-MAC-packets, and the EBU recommends the use of this standard for direct broadcasting by satellite. This standard relates to an image presentation format of 4/3, and the compression factors of the luminance component Y and chrominance C are 3/2 and 3 respectively. The data is transmitted to each line, by bursts, line 625 of such an image according to the C-MAC-packet method, however, allowing a certain flexibility as to the spatial limits of the data and image multiplex.

 French patent application no. 84 10 511, entitled "MAC type television system suitable for broadcasting 5/3 format images, interface device between this system and 4/3 format receivers and television equipped with such a device ", describes the means of transmitting an image in 5/3 format, viewed as such on a 5/3 screen, while ensuring compatibility with receivers in 4/3 format called first generation ( which will be able to receive the 4/3 part of the new broadcasts broadcast in 5/3 format. This request therefore allows the exploitation of said C-MAC-packet process, while leaving besides the possibility of modifying the compression factors of the luminance Y and chrominance C so as to increase the resolution of the image.

 In Europe where the number of broadcasting channels is very limited (for example, by satellite, only five channels per nation in the 12 GHz band) due to the large number of countries and different languages, it is very important to ensure this compatibility between the new format envisaged and the old 4/3 format which will, in any case, ensure the majority of programs until the end of the century. Such a 5/3 format system is proposed in a communication presented at the Montreux Symposium 1983 ("Why HDTV?", T.J.

Long, IBA, UK, pages 27 to 47), in the case of an initial standard of the C-MAC type, two essential means being recommended, namely on the one hand reducing the duration of the data burst at the start of each line to thereby make it possible to increase the number of samples of the chrominance C and luminance Y signals and obtain a 4.6 / 3 format, and on the other hand, to definitively achieve the format 5 / 3, the transmission of the additional chrominance and luminance samples (corresponding to the two extreme left and right edges of the image) during free line periods during the frame return periods.

 One could however formulate various criticisms vis-à-vis this solution proposed by IBA (said reduction of burst duration reduces the capacity of the digital channel in a very important way, the transmission of additional samples requires the use of fast memories of large capacity), and the invention concerned by the application cited above remedied such drawbacks by proposing a television system of MAC type with time multiplexing of digital data and analog signals of luminance and chrominance characterized -in that the compatibility with first generation receivers operating in 4/3 format is ensured without changing either the speed of the instantaneous digital bit rate, the sampling frequency of the video signals, their compression rate, and in that the former horizontal image tension in 5/3 format is obtained - by reducing the length of the data burst preceding the video signals and by removing a c ertain number of video lines located at the top and bottom of the image, in order to be able to place the deleted data in the bursts in place of these video lines as well as within a certain number of periods of line previously not used during frame returns.

 In the operations thus provided, the reduction in the length of the data burst results in a duration less than or equal to 3 microseconds, a duration which may even be between zero, and the dissemination of the data takes place in the line periods left free during the frame returns as well as in line periods which contained the information corresponding to the top and bottom of the image in the case of transmission in 4/3 format.

The solution thus adopted in said cited application therefore consists in practically completely freeing the useful lines of the image by transmitting digital data during the frame suppression intervals (see FIG. 1 of the present application, ob C and Y denote the chrominance and luminance, D data and FBI these frame blanking intervals). In the cited application, this solution was associated with the D2-MAC-packet standard with characteristics very similar to those of C-MAC-packets, except that the D2-MAC packets consists of a baseband multiplex of digital data. and the MAC video signal and that the instantaneous bit rate of this data is 10,125 Mb / s. Of course, said solution remains valid if it is associated with a C-MACpaquets standard. For this reason, we will call this C / D2 standard
MAC-packets with vertical data multiplexing to distinguish it from the standard C / D2-MAC-packet standard which is h horizontal data multiplexing.

 In these two multiplexing modes, the sampling clock and then the synchronization information are derived from the transmitted data, the spectral properties of which allow the sampling frequency of the digital signal to appear. A phase lock loop is provided for extracting the clock, and, the digital data being received by bursts, two operating modes can be envisaged for this phase lock loop: a continuous mode where 1 oscillator of the loop continuously receives the filter error signal, even outside the periods of data presence, and a sampled mode ofl, during periods of no data, information depending on the frequency difference between the frequency of the signal reference and the natural frequency of the local oscillator is supplied to this oscillator, preventing it from returning to its equilibrium state or from being disturbed by noise.

 In the case of horizontal multiplexing of data and video signals, the clock recovery loop can operate according to either of the two modes, with better performance in the sampled case. On the other hand, in the case of a vertical multiplexing of these components, only the sampled mode is possible. Indeed, an initial frequency deviation of 1 kHz from the reception oscillator (d 20.25 MHz) compared to å that of emission, corresponding to an overall relative precision and stability of the order of 5.10-5 (usual for VCXO oscillators of the general public type) would lead in the case of horizon tal multiplexing, to a phase drift of a digital burst to the other (repetition frequency 15 kHz) of a few nanoseconds, negligible compared to the duration of a binary element, whereas, in the case of vertical multiplexing, the same stability would lead to a drift of the order of 900 ns , always from burst to burst (repetition frequency 50 Hz), far greater than the duration of a binary 41emem.

 In the case of vertical data multiplexing, this drift problem as well as the need to be able to operate in sampled mode to locate the data burst require the use of a fast response phase locked loop, but therefore more sensitive to noise. Finally, a determining element in the case of vertical multiplexing is the short-term stability of the oscillator. In fact, in the sampled mode, a constant control voltage is applied to the oscillator, of the VCXO type, during the periods of deletion of the data; it is therefore necessary that, during this same period, the proper phase drift of the oscillator remains small compared to the duration of a binary element.

 The aim of the invention is therefore to propose a rhythm recovery device providing a solution to this synchronization problem which takes account of the three imperatives listed above: speed of the loop (low time constant of its response), immunity noise, stability of the oscillator.

 To this end, the invention relates to a timing recovery device for receiver of television signals transmitted according to a C-MAC-packet or D2-MAC-packet method with vertical multiplexing of digital channels, comprising, following a clock generation receiving the data signals, a phase locked loop successively composed of a phase comparator, a loop filter and a voltage controlled oscillator whose output constitutes the recovered clock signal and is returned to the second input of the phase comparator, characterized in that it further comprises an auxiliary loop itself comprising in series a switch, a low-pass filter and a sampler-blocker, as well as a switch of this auxiliary loop, said switch and switch being controlled by a position control circuit itself connected to the output of the oscillator and to that of a synchronization extraction circuit.

The features and advantages of said invention will appear below in more detail, in the description and in the drawings given by way of non-limiting example, in which
- Figure la illustrates the case of a C-MAC-packet transmission method according to the EBU standard SPB 284, with horizontal data multiplexing, and Figure lb the case of a vertical data multiplexing allowing compatibility between formats 4/3 and 5/3 -;
- Figure 2 shows an embodiment of the device according to the invention; and
- Figures 3a and 3b show the possible positions respectively of the switch and the switch of Figure 2, to highlight the relationship between these positions and the periods of presence or absence of data.

 The device shown in FIG. 2 comprises a phase locked loop composed of the conventional elements of a circuit of this nature, namely a phase comparator 10 receiving the bursts of data on a first input via a clock generation circuit 100, a loop filter 20 receiving the output of the phase comparator and, in series with these two elements, a voltage controlled oscillator 30, here of type -VCXO, the output of which is returned, for close the loop on the second input of the phase comparator.

To this main loop (10, 20, 30) of conventional type is added, in the context of the present invention, an auxiliary loop comprising in series the following elements: a switch 110, a low-pass filter 120, a sampler-blocker 130 and a switch 140, the opening-closing of the switch 110 and the switching of the switch 140 being triggered by a position control circuit 150. The synchronization signals recovered using the entire device are available on the exit
S of oscillator 30.

 The control circuit 150 itself receives the output signal from a synchronization extraction circuit 200. This circuit 200 allows, from the bursts of data present at the input E of the clock generation circuit 100, the prior recognition of the periods corresponding to the data, for example by the recognition of the frame synchronization word (which supposes an acquisition in phase but does not require perfect hooking of the loop). The measurements carried out in the case of the embodiment described here have shown that this recognition was immediate for carrier-to-noise ratios close to 14 dB and required a duration corresponding to eight images on average for ratios close to 4 dB (when does not use a threshold extension technique for frequency demodulation). Of course, the synchronized clock output signal of the loop, available on the output of oscillator 30, is supplied to circuit 200. synchronization extraction and to the control circuit 150, which also controls the sampler-blocker 130.

 The operation of this rhythm recovery device is as follows. Due to the wide equivalent noise band of the loop, the value of the control voltage of oscillator 30 in steady state is tainted with noise. The blocking of this control voltage at the end of the duration corresponding to the data burst can therefore occur on an erroneous value of said voltage. However, the duration of the data deletion period is such that even a small difference between the control voltage of the oscillator 30, blocked (after sampling) during this period, and the correct control voltage (that is, h say that is no longer tainted with noise) could lead to a phase drift whose value would be unacceptable at the moment when the next data burst begins.

 your presence of the auxiliary loop remedies this drawback. Now considering FIGS. 2 and 3, during the period of data presence, the switch 140 is in position 1 and during the period of absence of data, in position 2 (in the example described, these periods are approximately 25 lines and approximately 300 lines respectively). During these periods, the switch 110 can be either open (period A) or closed (period B). When the switch 110 is open and the switch 140 in position 1, the loop operates conventionally in continuous mode. When the switch 110 closes (period B), the filter 120 allows close low-pass filtering of the output voltage of the loop filter 20, the voltage thus filtered then being sampled and then blocked. When the switch 110 is again open and the switch 140 in position 2, the voltage thus blocked is supplied to the oscillator 30 and maintained throughout the duration of the period of deletion of the data.

 Of course, the present invention is not limited to the embodiment described and shown, from which alternative embodiments can be proposed without departing from the scope of the invention. In particular, various equivalent logic circuits can be proposed for the control circuit 150 which makes it possible to define the periods A and B.

Claims (2)

1. Rhythm recovery device for receiver of television signals transmitted according to a C-MACpacket or D2-MAC-packet method with vertical multiplexing of digital channels, comprising, following a clock generation circuit receiving the signals data, a phase locked loop successively composed of a phase comparator, a loop filter and a voltage controlled oscillator whose output is returned to the second input of the phase comparator, characterized in that it further comprises an auxiliary loop itself comprising in series a switch, a low-pass filter and a sampler-blocker, as well as a switch of this auxiliary loop, said switch and switch being controlled by a control circuit of position itself connected to the output of the oscillator and to that of a synchronization extraction circuit. 2. Receiver of television signals transmitted according to a C-MAC-packet or D2-MAC-packet method with vertical multiplexing of the digital channels, characterized in that it is equipped with a timing recovery device according to claim 1.