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FR2080824A1 - - Google Patents

Info

Publication number
FR2080824A1
FR2080824A1 FR7106649A FR7106649A FR2080824A1 FR 2080824 A1 FR2080824 A1 FR 2080824A1 FR 7106649 A FR7106649 A FR 7106649A FR 7106649 A FR7106649 A FR 7106649A FR 2080824 A1 FR2080824 A1 FR 2080824A1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7106649A
Other languages
French (fr)
Other versions
FR2080824B1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BBC BROWN BOVERI and CIE
BBC Brown Boveri AG Switzerland
Original Assignee
BBC BROWN BOVERI and CIE
Brown Boveri und Cie AG Switzerland
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BBC BROWN BOVERI and CIE, Brown Boveri und Cie AG Switzerland filed Critical BBC BROWN BOVERI and CIE
Publication of FR2080824A1 publication Critical patent/FR2080824A1/fr
Application granted granted Critical
Publication of FR2080824B1 publication Critical patent/FR2080824B1/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318502—Test of Combinational circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02—Comparing digital values
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/26—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to difference between voltages or between currents; responsive to phase angle between voltages or between currents
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Manipulation Of Pulses (AREA)
  • Safety Devices In Control Systems (AREA)
FR7106649A 1970-02-28 1971-02-26 Expired FR2080824B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19702009565 DE2009565A1 (en) 1970-02-28 1970-02-28 Error-proof comparison device for analog and binary electrical signals

Publications (2)

Publication Number Publication Date
FR2080824A1 true FR2080824A1 (en) 1971-11-19
FR2080824B1 FR2080824B1 (en) 1977-03-18

Family

ID=5763719

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7106649A Expired FR2080824B1 (en) 1970-02-28 1971-02-26

Country Status (7)

Country Link
AT (1) AT311093B (en)
CH (1) CH518036A (en)
DE (1) DE2009565A1 (en)
FR (1) FR2080824B1 (en)
GB (1) GB1302489A (en)
NL (1) NL7102558A (en)
NO (1) NO129594B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2536922A1 (en) * 1982-11-26 1984-06-01 Efcis Multifunction logic comparator.

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4141039B2 (en) * 1998-06-10 2008-08-27 日本信号株式会社 Threshold operation circuit, AND gate circuit, self-holding circuit and start signal generation circuit using the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1567305A (en) * 1967-04-03 1968-05-16 Honeywell Inc Method and device for the comparison of the magnitudes of two continuous signals and of an alternating signal.
US3492589A (en) * 1967-04-03 1970-01-27 Honeywell Inc Failsafe circuit apparatus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1567305A (en) * 1967-04-03 1968-05-16 Honeywell Inc Method and device for the comparison of the magnitudes of two continuous signals and of an alternating signal.
US3492589A (en) * 1967-04-03 1970-01-27 Honeywell Inc Failsafe circuit apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2536922A1 (en) * 1982-11-26 1984-06-01 Efcis Multifunction logic comparator.

Also Published As

Publication number Publication date
FR2080824B1 (en) 1977-03-18
NO129594B (en) 1974-04-29
GB1302489A (en) 1973-01-10
NL7102558A (en) 1971-08-31
DE2009565A1 (en) 1971-09-09
CH518036A (en) 1972-01-15
AT311093B (en) 1973-10-25

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Legal Events

Date Code Title Description
ST Notification of lapse