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FI20051143A0 - Method of manufacturing a semiconductor device - Google Patents

Method of manufacturing a semiconductor device

Info

Publication number
FI20051143A0
FI20051143A0 FI20051143A FI20051143A FI20051143A0 FI 20051143 A0 FI20051143 A0 FI 20051143A0 FI 20051143 A FI20051143 A FI 20051143A FI 20051143 A FI20051143 A FI 20051143A FI 20051143 A0 FI20051143 A0 FI 20051143A0
Authority
FI
Finland
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Application number
FI20051143A
Other languages
Finnish (fi)
Swedish (sv)
Inventor
Artto Mikael Aurola
Original Assignee
Artto Mikael Aurola
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Artto Mikael Aurola filed Critical Artto Mikael Aurola
Priority to FI20051143A priority Critical patent/FI20051143A0/en
Publication of FI20051143A0 publication Critical patent/FI20051143A0/en
Priority to PCT/FI2006/000364 priority patent/WO2007054611A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02623Liquid deposition
    • H01L21/02625Liquid deposition using melted materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H01L21/743Making of internal connections, substrate contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H01L31/035272Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
    • H01L31/03529Shape of the potential jump barrier or surface barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
FI20051143A 2005-11-10 2005-11-10 Method of manufacturing a semiconductor device FI20051143A0 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FI20051143A FI20051143A0 (en) 2005-11-10 2005-11-10 Method of manufacturing a semiconductor device
PCT/FI2006/000364 WO2007054611A1 (en) 2005-11-10 2006-11-10 A method of manufacturing a 3d semiconductor that minimize stress and void formation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20051143A FI20051143A0 (en) 2005-11-10 2005-11-10 Method of manufacturing a semiconductor device

Publications (1)

Publication Number Publication Date
FI20051143A0 true FI20051143A0 (en) 2005-11-10

Family

ID=35458751

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20051143A FI20051143A0 (en) 2005-11-10 2005-11-10 Method of manufacturing a semiconductor device

Country Status (2)

Country Link
FI (1) FI20051143A0 (en)
WO (1) WO2007054611A1 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5981988A (en) * 1996-04-26 1999-11-09 The Regents Of The University Of California Three-dimensional charge coupled device
US6204087B1 (en) * 1997-02-07 2001-03-20 University Of Hawai'i Fabrication of three-dimensional architecture for solid state radiation detectors
US6231667B1 (en) * 1997-11-28 2001-05-15 Canon Kabushiki Kaisha Liquid phase growth method and liquid phase growth apparatus
US7022604B2 (en) * 2002-04-09 2006-04-04 Micron Technology, Inc. Method of forming spatial regions of a second material in a first material

Also Published As

Publication number Publication date
WO2007054611A1 (en) 2007-05-18

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Legal Events

Date Code Title Description
FD Application lapsed