EP4131232A1

EP4131232A1 - Display device

Info

Publication number: EP4131232A1
Application number: EP21189556.0A
Authority: EP
Inventors: Hsin-Nan Lin; Chung-Yu Huang
Original assignee: BenQ Intelligent Technology Shanghai Co Ltd; BenQ Corp
Current assignee: BenQ Intelligent Technology Shanghai Co Ltd; BenQ Corp
Priority date: 2021-08-04
Filing date: 2021-08-04
Publication date: 2023-02-08

Abstract

A display device (100, 200) includes a display panel (110) and a driving control circuit (120) coupled thereto. The display panel (110) includes a plurality of pixels (P(1,1) to P(M,N)). In a first mode, the driving control circuit (120) drives the plurality of pixels (P(1,1) to P(M,N)) separately in a first frame period. In a second mode, the driving control circuit (120) drives a first portion of pixels of the pixels (P(1,1) to P(M,N)) separately in a second frame period. The first frame period is greater than the second frame period. The first portion of pixels has less pixels than the plurality of pixels (P(1,1) to P(M,N)) of the display panel (110). In the second mode, the plurality of pixels (P(1,1) to P(M,N)) are divided into a plurality of first blocks (B1), and the first portion of pixels includes at least one pixel in each first block.

Description

Field of the Invention

The present invention relates to a display device, and in particular, a display device capable of adjusting a frame rate.

Background of the Invention

The increasing applications of display panels have pushed demand for flexibility of selecting resolutions and frame rates of the display panels. However, the frequency of a pixel clock of the display panel is fixed, limiting the available frame rates of the display panel while imposing difficulties to increase the frame rate. In addition, as the resolutions of display panels are getting higher, circuits adopting enhanced functions and increased power consumption are in need in order to increase the frame rate of the display panel, leading to an increase in cost while not being able to satisfy user needs in a flexible manner.

Summary of the Invention

The present disclosure aims at providing a display device. This is achieved by the display device according to claim 1 and claim 11. The dependent claims pertain to corresponding further developments and improvements.
As will be seen more clearly from the detailed description following below, the display device includes a display panel and a driving control circuit. The display panel includes a plurality of pixels. The driving control circuit is coupled to the display panel. In a first mode, the driving control circuit separately drives the plurality of pixels in a first frame period. In a second mode, the driving control circuit separately drives a first portion of the plurality of pixels in a second frame period. The first frame period exceeds the second frame period. The first portion of pixels has less pixels than the plurality of pixels in the display panel. In the second mode, the plurality of pixels are divided into a plurality of first blocks, and the first portion of pixels includes at least one pixel in each first block.
In another embodiment, the display device includes a display panel and a driving control circuit. The display panel includes a plurality of pixels. The driving control circuit is coupled to the display panel. In a first mode, the driving control circuit separately drives the plurality of pixels in a first frame period. In a second mode, the driving control circuit separately drives a plurality of pixels in a first specific block of the display panel in a second frame period. The first frame period exceeds the second frame period. The first portion of pixels has less pixels than the plurality of pixels in the display panel.

Brief Description of the Drawings

In the following, the invention is further illustrated by way of example, taking reference to the accompanying drawings. Thereof

FIG. 1 is a schematic diagram of a display device according to an embodiment of the invention;
FIG. 2 shows a user scenario of a display panel operating in a second mode according to an embodiment of the present invention;
FIG. 3 shows a user scenario of a display panel operating in a third mode according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a display device according to another embodiment of the invention; and
FIG. 5 is a schematic diagram of a display device according to another embodiment of the invention.

Detailed Description

FIG. 1 is a schematic diagram of a display device 100 according to an embodiment of the invention. The display device 100 includes a display panel 110 and a driving control circuit 120. The display panel 110 may include a plurality of pixels P(1,1) to P(M,N). The driving control circuit 120 may be coupled to the display panel 110.
In some embodiments, the pixels P(1,1) to P(M,N) may include a plurality of light emitting diodes (LED), a plurality of organic light emitting diodes (OLED), a plurality of micro light emitting diodes (micro LED) or a plurality of mini-light emitting diodes (mini-LED), and the driving control circuit 120 may drive the pixels P(1,1) to P(M,N) in an independent and separate manner.
In some embodiments, the display device 100 may drive the display panel 110 in a variety of modes and at different frame rates. For example, in a first mode, the driving control circuit 120 may separately drive the pixels P(1,1) to P(M,N) in each frame period, and in a second mode, the driving control circuit 120 may separately drive a portion of pixels in the display panel 110 in each frame period. In the second mode, rather than driving all the pixels P(1,1) to P(M, N), the driving control circuit 120 may only drive a portion of pixels in the pixels P(1,1) to P(M,N), and therefore, if the pixel clock remains unchanged, the length of each frame period in the first mode may be longer than the length of each frame period in the second mode. In other words, the display panel 110 of the display device 100 may drive at a shorter frame period in the second mode, that is, in the second mode, the display device 100 will have a higher frame rate.
FIG. 2 shows a user scenario of a display panel 110 operating in a second mode according to an embodiment of the present invention. In FIG. 2, the pixels P(1,1) to P(M,N) may be divided into a plurality of first blocks B1, and the display device 100 may drive at least one pixel in each first block B1 in the second mode. In some embodiments, the first blocks B1 may be identical in shape and size, and the driving control circuit 120 may drive a pixel at a different location of each first block B1 in a different frame period in the second mode.
For example, in FIG. 2, each first block B1 may include four pixels. In the second mode, the driving control circuit 120 may first drive a pixel PA located at the upper left corner of each first block B 1 in the first frame period, and a pixel PB located at the upper right corner of each first block B1 in the second frame period, and in turn, drive a pixel PC located at the lower left corner of each first block B 1 and a pixel PD located at the lower right corner of each first block B 1 in two subsequent frame periods.
That is, in the second mode, the pixels P(1,1) to P(M,N) may be divided into a plurality of portions, and the driving control circuit 120 may drive the portions of pixels in different frame periods, respectively. In this manner, the frame period may be shortened, and the frame rate may be increased. In the embodiment, in the second mode, since the driving control circuit 120 is only required to drive a quarter of the pixels P(1,1) to P(M,N) in each frame period, the frame period of the second mode may be reduced to a quarter of the frame period in the first mode, increasing the frame rate by four times.
In some embodiments, the driving control circuit 120 may use active matrix (AM) to drive the pixels P(1, 1) to P(M,N), so the driving control circuit 120 may control the pixels P(1,1) to P(M,N) separately by selecting specific gate lines and data lines.
Further, the present invention is not limited to dividing the pixels P(1, 1) to P(M,N) into a plurality of 2×2 blocks. In some other embodiments, the shape and size of the first block B1 may be adjusted based on system requirements and expected frame rates. In addition, the present invention is not limited to dividing the pixels P(1, 1) to P(M,N) into blocks of identical shapes and sizes. In some other embodiments, the designer may also divide the pixels P(1, 1) to P(M,N) into blocks of different shapes and/or sizes, and drive at least one pixel in each block in each frame period.
Furthermore, in some embodiments, the driving control circuit 120 may also drive multiple pixels in each first block B1 in each frame period in the second mode. For example, in the second mode, the driving control circuit 120 may first drive two pixels of each first block B1 in one frame period, and then drive two other pixels of each first block B1 in the next frame period, and so on. For example, the driving control circuit 120 may first drive the pixel PA located at the upper left corner and the pixel PD located at the lower right corner of each first block B1, and then drive the pixel PC located at the lower left corner of each first block B1 and the pixel PB at the upper right corner in the next frame period. However, the present invention is not limited to the order of the driving control circuit 120 driving the pixels in the first block B1.
In such a case, since in the second mode, the driving control circuit 120 drives one half of the pixels P(1, 1) to P(M,N) in each frame period, compared to the frame period in the first mode, the frame period in the second mode may be reduced to one half, and the frame rate may be doubled. In some embodiments, the display device 100 may also provide more modes for users to select more frame rate options. FIG. 3 shows a user scenario of the display panel 110 operating in a third mode according to an embodiment of the present invention. In FIG. 3, the pixels P(1,1) to P(M,N) are divided into a plurality of second blocks B2, and the display device 100 may drive at least one pixel of each second block B2 in the third mode. In some embodiments, the second block B2 and the first block B1 may include different numbers of pixels. For example, in FIG. 3, each second block B2 may include 3×2 pixels. In some implementations, the driving control circuit 120 may sequentially and respectively drive six pixels of each second block B2 in six frame periods, and the driving control circuit 120 may drive one sixth of the pixels P(1,1) to P(M,N) in the third mode. Compared to the frame period in the first mode, the frame period in the third mode may be reduced to one sixth, and the frame rate may be sextupled.
However, the present invention is not limited to the driving control circuit 120 driving only one pixel in the second block B2 in each frame period. In some other embodiments, the driving control circuit 120 may drive two pixels in each second block B2 in each frame period. In such a case, since in the third mode, the driving control circuit 120 drives one third of the pixels P(1,1) to P(M,N) in each frame period, compared to the frame period in the first mode, the frame period in the third mode may be reduced to one third, and the frame rate may be tripled. In other words, the display device 100 may adjust the timing of driving the pixels P(1,1) to P(M,N) according to the frame rate to be displayed, so that images may be displayed at different frame rates in a flexible manner.
FIG. 4 is a schematic diagram of a display device 200 according to another embodiment of the invention. The display device 200 and the display device 100 may be similar in structures and operate according to similar principles. However, the display device 200 may further include a screen menu control circuit 230. The screen menu control circuit 230 may display a function menu such as an on-screen display (OSD) by the display panel 110. In some embodiments, the function menu may include a plurality of frame rate options. In this manner, a user may select a desired frame rate from the function menu, and the driving control circuit 120 may enter a corresponding mode according to the frame rate selected by the user. For example, when the first frame rate in the function menu is selected, the display device 200 may enter the first mode, and when the second frame rate in the function menu is selected, the display device 200 may enter the second mode.
FIG. 5 is a schematic diagram of a display device 300 according to another embodiment of the invention. The display device 300 may include a display panel 310 and a driving control circuit 320. The display panel 310 may include a plurality of pixels P(1,1) to P(M,N). In some embodiments, the pixels P(1, 1) to P(M,N) may include a plurality of light emitting diodes, a plurality of organic light emitting diodes, a plurality of micro light emitting diodes or a plurality of mini-light emitting diodes.
The driving control circuit 320 may be coupled to the display panel 310. In some embodiments, the driving control circuit 320 may drive the display panel 310 at different frame rates in different modes. For example, in each frame period in the first mode, the driving control circuit 320 may separately drive the pixels P(1, 1) to P(M, N). However, in each frame period in the second mode, the driving control circuit 320 may only drive pixels of a first specific block SB1 in the display panel 310. In FIG. 5, the first specific block SB1 may be rectangular in shape, and the first specific block SB1 has less pixels than the pixels P(1,1) to P(M,N) of the display panel 310.
In the second mode, rather than driving all the pixels P(1, 1) to P(M, N), the driving control circuit 320 may only drive a portion of pixels in the pixels P(1,1) to P(M,N), and therefore, when the pixel clock remains unchanged, the length of each frame period in the first mode may be longer than the length of each second frame period in the second mode. In other words, the display panel 110 of the display device 300 may be driven at a shorter frame period in the second mode, that is, the display device 300 will operate at a higher frame rate in the second mode.
Further, in some embodiments, in each frame period in the third mode, the driving control circuit 320 may separately drive pixels in a second specific block SB2 in the display panel 310. In FIG. 5, the second specific block SB2 is also rectangular in shape and partially overlapping with the first specific block SB1. However, the present invention is not limited to the shapes and locations of the first specific block SB1 and the second specific block SB2. Since the first specific block SB1 and the second specific block SB2 may contain different numbers of pixels, the frame period of the third mode may also be different from the frame period of the second mode, providing users with more frame rate options.
In the embodiment of FIG. 5, the display device 300 may further include a screen menu controller 330 and a display specification control circuit 340. The screen menu controller 330 may be coupled to the driving control circuit 320, and may control the driving control circuit 320 to display a function menu on the display panel 310. The function menu may contain a plurality of frame rate options. In this manner, a user may select a desired frame rate from the function menu, and the driving control circuit 320 may enter a corresponding mode according to the frame rate selected by the user. For example, when the first frame rate in the function menu is selected, the display device 300 may enter the first mode, and when the second frame rate in the function menu is selected, the display device 300 may enter the second mode.
In addition, in some embodiments, the image data displayed by the display device 300 is provided by an external data source system DS. The external data source system DS may be, but not limited to, a computer. Therefore, when the display device 300 switches between different modes, the display device 300 may also notify the data source system DS of the corresponding changes in display range, so that the data source system DS may update the image data correspondingly to meet the requirements of the current mode.
For instance, the display specification control circuit 340 may acquire extended display identification data (EDID) of the display panel 310. In some embodiments, when a second frame rate in the function menu is selected, the driving control circuit 320 may output an updated signal to the display specification control circuit 340, and the display specification control circuit 340 may acquire updated extended display identification data of the display panel 310 according to the updated signal. In this manner, the display specification control circuit 340 may transmit the updated extended display capability identification data to the data source system DS to modify an image specification for the data source system DS to output images. For example, if the display panel 310 includes 3840×2160 pixels, that is, N is 3840 and M is 2160, then in the first mode, the data source system DS will output data of 3840×2160 pixels in each frame period. However, if the first specific block SB1 only contains 1920x1080 pixels, in the second mode, the data source system DS will correspondingly output data of 1920x1080 pixels in each frame period.
In this manner, the display device 300 may adjust the frame rate in a flexible manner based on user needs while displaying images.
The display device of the present invention may adjust the length of the frame period by adjusting the number of pixels driven in each frame period, thereby providing the frame rate in a flexible manner based on the user requirements.

Claims

A display device (100, 200) characterised by comprising:
a display panel (110) comprising a plurality of pixels (P(1,1) to P(M,N)); and

a driving control circuit (120) coupled to the display panel (110) and configured to separately drive the plurality of pixels (P(1,1) to P(M,N)) in a first frame period in a first mode, and separately drive a first portion of pixels of the plurality of pixels (P(1,1) to P(M,N)) in a second frame period in a second mode;

wherein:
the first frame period exceeds the second frame period;

the first portion of pixels has less pixels than the plurality of pixels (P(1,1) to P(M,N)) in the display panel (110); and

in the second mode, the plurality of pixels (P(1,1) to P(M,N)) are divided into a plurality of first blocks (B1), and the first portion of pixels comprises a pixel of each first block (B1).
The display device (100, 200) of claim 1, characterised in that the plurality of first blocks (B1) are identical in shape and size.
The display device (100, 200) of claim 2, characterised in that in the second mode, the first portion of pixels comprises a pixel corresponding to a first location in each first block (B1).
The display device (100, 200) of any of the preceding claims, characterised in that:
in the second mode, the driving control circuit (120) is further configured to separately drive a second portion of pixels of the plurality of pixels (P(1,1) to P(M,N)) in a third frame period.
The display device (100, 200) of claim 4, characterised in that:
the plurality of first blocks (B1) are identical in shape and size; and

in the second mode, the first portion of pixels comprises a pixel corresponding to a first location of each first block (B1), and the second portion of pixels comprises a pixel corresponding to a second location of each first block (B1).
The display device (100, 200) of claim 5, characterised in that the first portion of pixels further comprises a pixel corresponding to a third location of each first block (B1), and the second portion of pixels further comprises a pixel corresponding to a fourth location of each first block (B1).
The display device (100, 200) of any of the preceding claims, characterised in that:
each first block (B1) comprises N pixels, N being a positive integer greater than 1; and

in the second mode, the driving control circuit (120) is configured to drive pixels at different corresponding positions in each first block (B1) in N frame periods, respectively.
The display device (100, 200) of any of the preceding claims, characterised in that the plurality of pixels (P(1,1) to P(M,N)) comprises a plurality of light emitting diodes (LED), a plurality of organic light emitting diodes (OLED), a plurality of micro light emitting diodes (micro LED) or a plurality of mini-light emitting diodes (mini-LED).
The display device (200) of any of the preceding claims, characterised by further comprising:
a screen menu control circuit (230) configured to display a function menu on the display panel (110);

wherein:
the function menu comprises a plurality of frame rate options; and

the driving control circuit (120) enters the first mode when a first frame rate in the function menu is selected, and enters the second mode when a second frame rate in the function menu is selected.
The display device (100, 200) of any of the preceding claims, characterised in that:
in a third mode, the driving control circuit (120) is configured to separately drive a second portion of pixels of the plurality of pixels (P(1,1) to P(M,N)) in a third frame period;

in the third mode, the plurality of pixels (P(1,1) to P(M,N)) are divided into a plurality of second blocks (B2), and the second portion of pixels comprises a pixel of each second block (B2); and

each first block (B1) and each second block (B2) comprise different quantities of pixels.
A display device (300) characterised by comprising:
a display panel (310) comprising a plurality of pixels (P(1,1) to P(M,N)); and

a driving control circuit (320) coupled to the display panel (310) and configured to separately drive the plurality of pixels (P(1,1) to P(M,N)) in a first frame period in a first mode, and separately drive a plurality of pixels (P(1,1) to P(M,N)) in a first specific block (SB1) of the display panel (310) in a second frame period in a second mode;

wherein:
the first frame period exceeds the second frame period; and

the plurality of pixels (P(1,1) to P(M,N)) in a first specific block (SB1) have less pixels than the plurality of pixels (P(1,1) to P(M,N)) in the display panel (310).
The display device (300) of claim 11, characterised in that the plurality of pixels (P(1,1) to P(M,N)) comprises a plurality of light emitting diodes (LED), a plurality of organic light emitting diodes (OLED), a plurality of micro light emitting diodes (micro LED) or a plurality of mini-light emitting diodes (mini-LED).
The display device (300) of claim 11 or 12, characterised by further comprising:
a screen menu control circuit (330) coupled to the driving control circuit (320) and configured to control the driving control circuit (320) to display a function menu on the display panel (310);

wherein:
the function menu comprises a plurality of frame rate options; and

the driving control circuit (320) enters the first mode when a first frame rate in the function menu is selected, and enters the second mode when a second frame rate in the function menu is selected.
The display device (300) of claim 13, characterised by further comprising:
a display specification control circuit (340) configured to acquire extended display identification data (EDID) of the display panel (110);

wherein:
when the second frame rate in the function menu is selected, the driving control circuit (120) is configured to output an updated signal to the display specification control circuit (340), and the display specification control circuit (340) is configured to acquire updated extended display identification data of the display panel (110) according to the updated signal; and

the display specification control circuit (340) transmits the updated extended display capability identification data to a data source system (DS) to modify an image specification for the data source system (DS) to output images.
The display device (300) of any of claims 11 to 14, characterised in that:
in a third mode, a driving control circuit (320) is further configured to separately drive a plurality of pixels (P(1,1) to P(M,N)) in a second specific block (SB2) of the display panel (310) in a third frame period;

wherein:
the first specific block (SB1) and the second specific block (SB2) comprise different quantities of pixels.