[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

EP1900012A1 - Highly oxygen-sensitive silicon layer and method for obtaining same - Google Patents

Highly oxygen-sensitive silicon layer and method for obtaining same

Info

Publication number
EP1900012A1
EP1900012A1 EP06764054A EP06764054A EP1900012A1 EP 1900012 A1 EP1900012 A1 EP 1900012A1 EP 06764054 A EP06764054 A EP 06764054A EP 06764054 A EP06764054 A EP 06764054A EP 1900012 A1 EP1900012 A1 EP 1900012A1
Authority
EP
European Patent Office
Prior art keywords
layer
substrate
silicon
silicon layer
annealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP06764054A
Other languages
German (de)
French (fr)
Inventor
Patrick Soukiassian
Fabrice Semond
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Universite Paris Sud Paris 11
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Universite Paris Sud Paris 11
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Universite Paris Sud Paris 11 filed Critical Commissariat a lEnergie Atomique CEA
Publication of EP1900012A1 publication Critical patent/EP1900012A1/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28229—Making the insulator by deposition of a layer, e.g. metal, metal compound or poysilicon, followed by transformation thereof into an insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048—Making electrodes
    • H01L21/049—Conductor-insulator-semiconductor electrodes, e.g. MIS contacts

Definitions

  • the present invention relates to a silicon layer which is very sensitive to oxygen and a process for obtaining this layer.
  • Silicon carbide is a very interesting IV-IV compound semiconductor material, which is particularly suitable for high power, high voltage or high temperature devices and sensors.
  • the conventional oxidation (direct oxidation of SiC) of the SiC surfaces in particular the hexagonal surfaces of this material
  • SiC surfaces in particular the hexagonal surfaces of this material
  • the conventional oxidation (direct oxidation of SiC) of the SiC surfaces generally leads to the formation of oxides of Si and C, which have poor electrical properties, and SiO 2 / SiC interfaces that are not steep, the transition between SiC and SiO 2 being done on several atomic layers.
  • the electron mobility in the MOS structure inversion layers on p-SiC is much smaller (by a factor of 10) than on the silicon due to the disorder at the interface.
  • a process for obtaining SiO 2 passivation on SiC is known from EP-A-0637069 (Created Research, Inc.). Obtaining a layer of SiO 2 of 62nm from a Si layer, in accordance with this document, requires high-temperature thermal oxidation (about 1200 0 C) and at a very high pressure of oxygen (approximately the atmospheric pressure, that is to say about 10 5 Pa).
  • the miniaturization of microelectronic devices creates a need for increasingly thin passivation layers, the interface between a passivation layer and the substrate that carries it becoming more and more abrupt.
  • No. 6,667,102 A corresponding to WO 01/39257 A discloses a silicon layer which is sensitive to oxygen at ambient temperature. This layer is formed on hexagonal silicon carbide and has a 4x3 surface structure.
  • the present invention aims to overcome the above disadvantages.
  • It relates to a silicon layer that greatly promotes the growth of an oxide on a substrate and leads to an interface
  • SiO 2 / substrate which is steep, while allowing softer oxidation conditions than those permitted by the known art, mentioned above.
  • the invention makes it possible to obtain thinner passivation layers than those obtained by this known technique.
  • the subject of the present invention is a formed silicon layer, in particular deposited on a substrate, this layer being characterized in that it has a 3 ⁇ 2 structure, the substrate being able to receive this 3 ⁇ 2 silicon structure or to promote its formation.
  • the layer has a 3 ⁇ 2 surface structure (it is also said to be 3 ⁇ 2 reconstructed), the substrate being able to receive this 3 ⁇ 2 surface structure of silicon or to promote its formation. .
  • the layer is oxidizable at a temperature of less than or equal to 65 ° C.
  • the substrate is ⁇ -SiC silicon carbide.
  • the present invention also relates to a silicon oxide layer, this layer resulting from the oxidation of the silicon layer that is the subject of the invention.
  • the present invention also relates to a surface covered with this layer of silicon oxide.
  • the present invention furthermore relates to a method for obtaining the silicon layer that is the subject of the invention, in which silicon is deposited in a substantially uniform manner on a surface of the substrate.
  • the present invention also relates to another method for obtaining a silicon oxide layer on a substrate, this other method being characterized in that it comprises the following successive steps: (a) the formation (in particular the deposition) of the silicon layer which is the subject of the invention on the substrate, and
  • the oxidation of the silicon layer is carried out at a temperature of less than or equal to 65 ° C., more particularly at a temperature ranging from room temperature to 500 ° C.
  • this temperature is the ambient temperature (approximately 20 ° C.).
  • the SiO / Si or SiO 2 / substrate interface which is obtained after oxidation, is abrupt, the transition between the substrate and SiO 2 being practically on a few atomic layers.
  • the silicon layer formed (in particular deposited) on the substrate has a 3 ⁇ 2 surface structure (it is also said that it is reconstructed 3 ⁇ 2), the substrate being able to receive this 3x2 surface structure of silicon or suitable to promote the formation of this structure.
  • the substrate is made of a material selected from silicon carbide and silicon.
  • the silicon carbide may be monocrystalline, polycrystalline, amorphous or porous.
  • the silicon layer is formed on a ⁇ -SiC surface, preferentially on the (001) face.
  • the Joule effect can be used, preferably by passing a continuous electric current through the substrate.
  • the various steps of the method which is the subject of the invention are preferably carried out in an ultrahigh vacuum chamber, advantageously the same chamber during the entire process.
  • the heating of the substrate can be done by electron bombardment of this substrate.
  • the surface of the substrate is rinsed before the formation of the silicon layer on this surface.
  • the rinsing is carried out with an organic solvent, this solvent advantageously comprising ethanol or methanol.
  • the substrate is degassed before the formation of the silicon layer.
  • the substrate is heated, preferably at about 65 ° C., in particular for silicon carbide, under a reduced pressure, advantageously 3 ⁇ 10 -9 Pa, for a sufficient duration, for example 24 hours, to be degassed.
  • one or more annealing of the substrate can also be carried out, until no LEED contaminant is detected, that is to say by electron diffraction.
  • low energy in English, low energy electron diffraction
  • RHEED that is to say by high energy electron diffraction and reflection
  • at least one annealing and then cooling of the substrate is carried out.
  • each annealing is carried out as follows:
  • the substrate is heated at 1000 ° C. for 3 minutes and then at 0 ° C. for 1 minute and then at 1200 ° C. for 1 minute, and then the substrate is slowly cooled at a rate of 100 ° C. per minute to the temperature ambient (approximately 20 ° C.).
  • Such a method makes it possible to deposit silicon in a substantially uniform manner on a surface of the substrate.
  • the silicon layer of step (a) is formed at room temperature.
  • the thickness of this layer is preferably less than or equal to 10 nm.
  • at least one annealing of the silicon layer is carried out after the formation of this layer in step (a).
  • a surface of the substrate, maintained at ambient temperature is prepared, according to the methods indicated above, to receive the silicon layer, and then is deposited in a substantially uniform manner.
  • the silicon on the surface of the substrate, at least one annealing of the substrate on which the silicon has been deposited is carried out at least 1000 ° C., the total annealing time being at least 5 minutes, and cooling is carried out up to ambient temperature (approximately 20 ° C.) the substrate at a speed of at least 100 ° C./minute.
  • the substrate may also be brought to a temperature above ambient temperature, for example at about 65 ° C., to effect the deposition.
  • the deposition and annealing steps can also be performed simultaneously, the deposition being done in this case at high temperature.
  • the silicon layer is formed on this substrate at room temperature, then the assembly constituted by the substrate and this layer is then subjected to at least annealing at least 65O 0 C, the total annealing time being at least 7 minutes, the annealing or annealing being followed by cooling at a speed of at least 50 ° C / minute.
  • the preparation of the surface of the substrate to receive the monocrystalline silicon and / or to promote the formation of the latter comprises an auxiliary heating of the substrate to at least 1000 ° C., a substantially uniform auxiliary deposition of monocrystalline silicon on the surface of the substrate thus heated and at least one auxiliary annealing of the substrate after this auxiliary deposition, at least 65 ° C., the total auxiliary annealing time being at least 7 minutes.
  • the preparation of the surface of the substrate preferably comprises a degassing of the substrate under ultra-vacuum then at least one annealing of this substrate, followed by cooling of the substrate.
  • the silicon layer is preferably formed by vacuum evaporation.
  • this layer can be formed in other ways, for example by chemisorption / interaction of silane or by evaporation by electron bombardment of a silicon sample.
  • the silicon is deposited on the substrate from a silicon sample whose surface is larger than that of the substrate.
  • the surface of the silicon sample and the surface of the substrate are separated by a distance of the order of 2 to 3 cm.
  • the oxidation of the silicon layer is carried out following the deposition of the silicon layer, advantageously in the same enclosure.
  • the oxidation of the silicon layer is made with an oxygen exposure in the range of 8000 langmuirs (about 0.8 Pa) to 15000 langmuirs (about 1.5 Pa). exposure is preferably equal to 10,000 langmuirs (about IPa. s).
  • an oxide layer With the method of obtaining an oxide layer according to the invention, it is possible to increase the thickness of the oxide to 10 nm with a steep remaining interface. To obtain a result Similarly, the amount of oxide can be advantageously increased by higher exposures to oxygen and by slightly higher temperatures, close to 65O 0 C. In the present invention, annealing can be carried out after the oxidation of the oxide. 3x2 structure silicon layer.
  • the present invention is very useful for the manufacture of MOS devices and in particular of MOSFET devices (MOS type field effect transistors).
  • FIG. single appended schematically illustrates the manufacture of a silicon layer in accordance with the invention.
  • a silicon layer having a 3 ⁇ 2 structure can be obtained according to the methods described in document FR 2 823 770 A, corresponding to US 2004/0104406 A.
  • a cubic monocrystalline silicon carbide sample is used which is commercially available from NovaSiC and Hoya Companies as well as from LETI (a laboratory of the Atomic Energy Commission).
  • the used face of this sample is the face (100).
  • This sample may consist of a thin film, of thickness greater than or equal to 1 ⁇ m, epitaxied on a silicon wafer, or may be a solid sample having a thickness of about 300 ⁇ m.
  • this sample has, for example, a length of 13 mm and a width of 5 mm.
  • the sample is introduced into an ultrahigh vacuum chamber where a pressure of the order of 3xlCT 9 Pa is established and where this sample is heated by a direct Joule effect by passing an electric current through the sample. .
  • the temperature of the latter is measured using an infrared pyrometer. First, the sample is degassed, leaving it for 24 hours at 65 ° C. under ultrahigh vacuum.
  • the sample is then subjected to a series of annealing operations until no contaminants are detected, for example by photoemission, and the surface of the sample is well ordered, as verified by LEED or by RHEED:
  • the sample is heated at 1000 ° C. for 3 minutes and then at 0 ° C. for 1 minute and then at 1200 ° C. for 1 minute; the sample is then slowly cooled at a rate of 100 ° C. per minute to room temperature (approximately 20 ° C.).
  • silicon carbide sample having, for example, a length of 20 mm and a width of 10 mm
  • silicon sample having, for example, a length of 20 mm and a width of 10 mm
  • silicon is deposited uniformly on the surface of the sample of silicon carbide maintained at ambient temperature.
  • the silicon carbide sample and the silicon sample face each other and are at a distance D of 2 cm one of
  • the larger surface area of the silicon sample allows homogeneity, i.e., uniformity, of silicon deposition on the silicon carbide sample.
  • SiC thus coated with silicon the annealing series described above: this sample is heated at 1000 ° C. for 3 minutes and then at 0 ° C. for 1 minute and then at 1200 ° C. for 1 minute.
  • the sample thus coated with Si then undergoes a new series of anneals: 1 minute at 75O 0 C then 1 minute at 700 0 C and then 5 minutes at 65O 0 C.
  • the sample is then slowly cooled to room temperature, at a rate of 50 ° C. per minute.
  • the surface of ⁇ -SiC (100) thus obtained has a 3 ⁇ 2 structure (square mesh).
  • the 3x2 reconstructed areas have dimensions of the order of 550 nm x 450 nm, can have a low density of steps and have a few islands of Si in formation 3x2.
  • the reconstructed islets have dimensions of the order of 550 nm x 450 nm, can have a low density of steps and have a few islands of Si in formation 3x2.
  • 3x2 are then selected for the next step. Silicon can then be added and allows the epitaxial growth of a 3x2 reconstructed silicon layer.
  • the pumping means making it possible to obtain the utravide are symbolized by the arrow 8.
  • the substrate 4 is mounted on a suitable support 10 and the heating means of the substrate by the Joule effect are symbolized by the arrows 12.
  • Joule heating means of the silicon sample 14 are also seen, these means being symbolized by arrows 16.
  • This oxidation proceeds as follows: the sample coated with a layer of Si-3 ⁇ 2 is exposed to oxygen, while being maintained at a temperature in the range from 25 ° C. to 65 ° C. ; the exposure to oxygen is equal to 10 4 langmuirs (approximately IPa s).
  • This last process can be done several times in a row, the interface between the SiO 2 and the substrate remaining abrupt.
  • Samples of varying thicknesses, as needed, can therefore be obtained by varying the exposure to oxygen.
  • the oxidation of the silicon layer 2 is preferably made in the chamber 6.
  • the chamber is provided with the means necessary for this oxidation, in particular an oxygen input (not shown).

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Formation Of Insulating Films (AREA)
  • Silicon Compounds (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Vapour Deposition (AREA)
  • Chemical Vapour Deposition (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

The invention concerns a highly oxygen-sensitive silicon layer and a method for obtaining same. Said layer (2), formed on a substrate (4) for example made of SiC, has a 3x2 structure. The method for obtaining same consists in depositing silicon substantially uniformly on one surface of the substrate. The invention is applicable for example in microelectronics.

Description

COUCHE DE SILICIUM TRES SENSIBLE A L'OXYGENE ET PROCEDE D'OBTENTION DE CETTE COUCHEHIGHLY OXYGEN-SENSITIVE SILICON LAYER AND METHOD FOR OBTAINING THE LAYER
DESCRIPTIONDESCRIPTION
DOMAINE TECHNIQUETECHNICAL AREA
La présente invention concerne une couche de silicium qui est très sensible à l'oxygène ainsi qu'un procédé d'obtention de cette couche.The present invention relates to a silicon layer which is very sensitive to oxygen and a process for obtaining this layer.
Elle s'applique notamment en microélectronique .It applies in particular in microelectronics.
ETAT DE LA TECHNIQUE ANTERIEURESTATE OF THE PRIOR ART
Le carbure de silicium (SiC) est un matériau semi-conducteur composé IV-IV très intéressant, qui convient en particulier aux dispositifs et capteurs de grande puissance, haute tension ou haute température.Silicon carbide (SiC) is a very interesting IV-IV compound semiconductor material, which is particularly suitable for high power, high voltage or high temperature devices and sensors.
Récemment, de très importants progrès ont été accomplis dans la connaissance des surfaces de ce matériau et des interfaces de SiC avec les isolants et les métaux. Deux des questions importantes pour le succès des dispositifs électroniques à base de SiC (et en particulier de ceux qui sont fondés sur les polytypes hexagonaux de ce matériau) concernent l'obtention de transistors MOS (Métal Oxyde Semiconducteur) performants, la passivation de surface et donc l'oxydation de SiC, et la structure Isolant sur SiC. Remarquons que le silicium est actuellement le matériau semi-conducteur le plus utilisé, principalement à cause des propriétés exceptionnelles du dioxyde de silicium (SiO2) . De ce point de vue, SiC est spécialement intéressant puisque sa passivation de surface peut être réalisée par croissance de SiO2, dans des conditions similaires à celles du silicium.Recently, much progress has been made in understanding the surfaces of this material and SiC interfaces with insulators and metals. Two important questions for the success of SiC-based electronic devices (and in particular those based on the hexagonal polytypes of this material) concern the obtaining of efficient MOS (Metal Oxide Semiconductor) transistors, surface passivation and therefore the oxidation of SiC, and the insulating structure on SiC. Note that silicon is currently the most used semiconductor material, mainly because of the exceptional properties of silicon dioxide (SiO 2 ). From this point of view, SiC is especially interesting since its surface passivation can be carried out by growth of SiO 2 under conditions similar to those of silicon.
Cependant, du fait de la présence de carbone, l'oxydation classique (oxydation directe de SiC) des surfaces de SiC (en particulier des surfaces hexagonales de ce matériau) conduit en général à la formation d'oxydes de Si et de C, qui ont de médiocres propriétés électriques, et à des interfaces SiO2/SiC qui ne sont pas abruptes, la transition entre SiC et SiO2 se faisant sur plusieurs couches atomiques.However, due to the presence of carbon, the conventional oxidation (direct oxidation of SiC) of the SiC surfaces (in particular the hexagonal surfaces of this material) generally leads to the formation of oxides of Si and C, which have poor electrical properties, and SiO 2 / SiC interfaces that are not steep, the transition between SiC and SiO 2 being done on several atomic layers.
La mobilité électronique dans les couches d' inversion de structure MOS sur p-SiC est bien plus faible (d'un facteur 10) que sur le silicium du fait du désordre à l'interface.The electron mobility in the MOS structure inversion layers on p-SiC is much smaller (by a factor of 10) than on the silicon due to the disorder at the interface.
On connaît un procédé d'obtention d'une passivation, en SiO2, sur du SiC par le document EP-A-0637069 (Crée Research, Inc.). L'obtention d'une couche de SiO2 de 62nm à partir d'une couche de Si, conformément à ce document, nécessite une oxydation thermique à haute température (environ 12000C) et à une très forte pression d'oxygène (environ la pression atmosphérique c'est-à-dire environ 105Pa).A process for obtaining SiO 2 passivation on SiC is known from EP-A-0637069 (Created Research, Inc.). Obtaining a layer of SiO 2 of 62nm from a Si layer, in accordance with this document, requires high-temperature thermal oxidation (about 1200 0 C) and at a very high pressure of oxygen (approximately the atmospheric pressure, that is to say about 10 5 Pa).
Mais l'utilisation de hautes températures et de fortes pressions requiert beaucoup d'énergie. La réalisation de couches de passivation dans des conditions plus douces est donc un enjeu important pour l'industrie de l'électronique.But using high temperatures and high pressures requires a lot of energy. The realization of passivation layers in Softer conditions is therefore an important issue for the electronics industry.
Par ailleurs, la miniaturisation des dispositifs microélectroniques crée un besoin de couches de passivation de plus en plus minces, l'interface entre une couche de passivation et le substrat qui la porte devenant de plus en plus abrupte.Moreover, the miniaturization of microelectronic devices creates a need for increasingly thin passivation layers, the interface between a passivation layer and the substrate that carries it becoming more and more abrupt.
On connaît aussi, par le document US 6 667 102 A, correspondant à WO 01/39257 A, une couche de silicium qui est sensible à l'oxygène à température ambiante. Cette couche est formée sur du carbure de silicium hexagonal et a une structure de surface 4x3.No. 6,667,102 A corresponding to WO 01/39257 A discloses a silicon layer which is sensitive to oxygen at ambient temperature. This layer is formed on hexagonal silicon carbide and has a 4x3 surface structure.
EXPOSE DE L'INVENTIONSUMMARY OF THE INVENTION
La présente invention a pour but de remédier aux inconvénients précédents.The present invention aims to overcome the above disadvantages.
Elle a pour objet une couche de silicium qui favorise considérablement la croissance d'un oxyde sur un substrat et conduit à une interfaceIt relates to a silicon layer that greatly promotes the growth of an oxide on a substrate and leads to an interface
SiO2/substrat qui est abrupte, tout en permettant des conditions d' oxydation plus douces que celles qui sont permises par la technique connue, mentionnée plus haut.SiO 2 / substrate which is steep, while allowing softer oxidation conditions than those permitted by the known art, mentioned above.
De plus, l'invention permet d'obtenir des couches de passivation plus minces que celles qui sont obtenues par cette technique connue.In addition, the invention makes it possible to obtain thinner passivation layers than those obtained by this known technique.
De façon précise, la présente invention a pour objet une couche de silicium formée, en particulier déposée, sur un substrat, cette couche étant caractérisée en ce qu'elle a une structure 3x2, le substrat étant apte à recevoir cette structure 3x2 du silicium ou propre à favoriser sa formation.Specifically, the subject of the present invention is a formed silicon layer, in particular deposited on a substrate, this layer being characterized in that it has a 3 × 2 structure, the substrate being able to receive this 3 × 2 silicon structure or to promote its formation.
Selon un mode de réalisation préféré de l'invention, la couche a une structure de surface 3x2 (on dit aussi qu'elle est reconstruite 3x2), le substrat étant apte à recevoir cette structure de surface 3x2 du silicium ou propre à favoriser sa formation .According to a preferred embodiment of the invention, the layer has a 3 × 2 surface structure (it is also said to be 3 × 2 reconstructed), the substrate being able to receive this 3 × 2 surface structure of silicon or to promote its formation. .
De préférence, la couche est oxydable à une température inférieure ou égale à 65O0C.Preferably, the layer is oxidizable at a temperature of less than or equal to 65 ° C.
Selon un mode de réalisation préféré de l'invention, le substrat est du carbure de silicium β- SiC.According to a preferred embodiment of the invention, the substrate is β-SiC silicon carbide.
La présente invention concerne aussi une couche d'oxyde de silicium, cette couche résultant de l'oxydation de la couche de silicium objet de 1' invention .The present invention also relates to a silicon oxide layer, this layer resulting from the oxidation of the silicon layer that is the subject of the invention.
La présente invention concerne également une surface recouverte de cette couche d' oxyde de silicium.The present invention also relates to a surface covered with this layer of silicon oxide.
La présente invention concerne en outre un procédé d'obtention de la couche de silicium objet de l'invention, dans lequel on dépose de façon sensiblement uniforme du silicium sur une surface du substrat.The present invention furthermore relates to a method for obtaining the silicon layer that is the subject of the invention, in which silicon is deposited in a substantially uniform manner on a surface of the substrate.
La présente invention a aussi pour objet un autre procédé, pour obtenir une couche d'oxyde de silicium sur un substrat, cet autre procédé étant caractérisé en ce qu'il comprend les étapes successives suivantes : (a) la formation (en particulier le dépôt) de la couche de silicium objet de l'invention sur le substrat, etThe present invention also relates to another method for obtaining a silicon oxide layer on a substrate, this other method being characterized in that it comprises the following successive steps: (a) the formation (in particular the deposition) of the silicon layer which is the subject of the invention on the substrate, and
(b) l'oxydation de cette couche de silicium.(b) the oxidation of this silicon layer.
De préférence, l'oxydation de la couche de silicium est effectuée à une température inférieure ou égale à 65O0C, plus particulièrement à une température comprise dans l'intervalle allant de la température ambiante à 5000C. De façon avantageuse, cette température est la température ambiante (environ 2O0C).Preferably, the oxidation of the silicon layer is carried out at a temperature of less than or equal to 65 ° C., more particularly at a temperature ranging from room temperature to 500 ° C. Advantageously, this temperature is the ambient temperature (approximately 20 ° C.).
L'interface SiO/Si ou SiO2/substrat , qui est obtenue après l'oxydation, est abrupte, la transition entre le substrat et SiO2 se faisant quasiment sur quelques couches atomiques.The SiO / Si or SiO 2 / substrate interface, which is obtained after oxidation, is abrupt, the transition between the substrate and SiO 2 being practically on a few atomic layers.
Selon un mode de mise en œuvre préféré de cet autre procédé, la couche de silicium formée (en particulier déposée) sur le substrat a une structure de surface 3x2 (on dit aussi qu'elle est reconstruite 3x2), le substrat étant apte à recevoir cette structure de surface 3x2 du silicium ou propre à favoriser la formation de cette structure.According to a preferred embodiment of this other method, the silicon layer formed (in particular deposited) on the substrate has a 3 × 2 surface structure (it is also said that it is reconstructed 3 × 2), the substrate being able to receive this 3x2 surface structure of silicon or suitable to promote the formation of this structure.
De préférence, le substrat est fait d'un matériau choisi parmi le carbure de silicium et le silicium.Preferably, the substrate is made of a material selected from silicon carbide and silicon.
Le carbure de silicium peut être monocristallin, polycristallin, amorphe ou poreux.The silicon carbide may be monocrystalline, polycrystalline, amorphous or porous.
Avantageusement, la couche de silicium est formée sur une surface β-SiC, préférentiellement sur la face (001) . Avantageusement, dans la présente invention, lorsqu'on a besoin de chauffer le substrat, on peut utiliser l'effet Joule, de préférence en faisant passer un courant électrique continu à travers le substrat. De plus, les différentes étapes du procédé objet de l'invention sont préférentiellement effectuées dans une enceinte à ultravide, avantageusement la même enceinte durant tout le procédé.Advantageously, the silicon layer is formed on a β-SiC surface, preferentially on the (001) face. Advantageously, in the present invention, when it is necessary to heat the substrate, the Joule effect can be used, preferably by passing a continuous electric current through the substrate. In addition, the various steps of the method which is the subject of the invention are preferably carried out in an ultrahigh vacuum chamber, advantageously the same chamber during the entire process.
En variante, le chauffage du substrat peut se faire par bombardement électronique de ce substrat.Alternatively, the heating of the substrate can be done by electron bombardment of this substrate.
De manière préférentielle, la surface du substrat est rincée avant la formation de la couche de silicium sur cette surface. De préférence, le rinçage est effectué avec un solvant organique, ce solvant comprenant avantageusement de l'éthanol ou du méthanol.Preferably, the surface of the substrate is rinsed before the formation of the silicon layer on this surface. Preferably, the rinsing is carried out with an organic solvent, this solvent advantageously comprising ethanol or methanol.
Il est préférable que le substrat soit dégazé avant la formation de la couche de silicium.It is preferable that the substrate is degassed before the formation of the silicon layer.
Selon un mode de mise en œuvre préféré de l'invention, le substrat est chauffé, de préférence à environ 65O0C, en particulier pour du carbure de silicium, sous une pression réduite, avantageusement 3xlO~9 Pa , pendant une durée suffisante, par exemple 24 heures, pour être dégazé.According to a preferred embodiment of the invention, the substrate is heated, preferably at about 65 ° C., in particular for silicon carbide, under a reduced pressure, advantageously 3 × 10 -9 Pa, for a sufficient duration, for example 24 hours, to be degassed.
Avant la formation de la couche de silicium sur le substrat, un ou plusieurs recuits du substrat peuvent également être effectués, jusqu'à ce que l'on ne détecte plus aucun contaminant par LEED, c'est-à- dire par diffraction électronique à faible énergie (en anglais, low energy électron diffraction) , ou par RHEED, c'est-à-dire par diffraction électronique à haute énergie et réflexion (en anglais, reflexion high energy électron diffraction) . Avantageusement, on effectue au moins un recuit puis un refroidissement du substrat .Before the formation of the silicon layer on the substrate, one or more annealing of the substrate can also be carried out, until no LEED contaminant is detected, that is to say by electron diffraction. low energy (in English, low energy electron diffraction), or by RHEED, that is to say by high energy electron diffraction and reflection (in English, reflection high energy electron diffraction). Advantageously, at least one annealing and then cooling of the substrate is carried out.
De préférence, notamment dans le cas où le substrat est en carbure de silicium, chaque recuit est effectué de la manière suivante :Preferably, especially in the case where the substrate is silicon carbide, each annealing is carried out as follows:
- on chauffe le substrat à 10000C pendant 3 minutes puis à HOO0C pendant 1 minute puis à 12000C pendant 1 minute, puis - on refroidit lentement le substrat à une vitesse de 1000C par minute jusqu'à la température ambiante (environ 2O0C).the substrate is heated at 1000 ° C. for 3 minutes and then at 0 ° C. for 1 minute and then at 1200 ° C. for 1 minute, and then the substrate is slowly cooled at a rate of 100 ° C. per minute to the temperature ambient (approximately 20 ° C.).
Un tel procédé permet de déposer du silicium de façon sensiblement uniforme sur une surface du substrat.Such a method makes it possible to deposit silicon in a substantially uniform manner on a surface of the substrate.
De préférence, la couche de silicium de l'étape (a) est formée à température ambiante.Preferably, the silicon layer of step (a) is formed at room temperature.
L'épaisseur de cette couche est de préférence inférieure ou égale à lOnm. De préférence, on effectue au moins un recuit de la couche de silicium après la formation de cette couche à l'étape (a) .The thickness of this layer is preferably less than or equal to 10 nm. Preferably, at least one annealing of the silicon layer is carried out after the formation of this layer in step (a).
Selon un mode de mise en œuvre préféré du procédé objet de l'invention, on prépare, selon les modalités indiquées plus haut, une surface du substrat, maintenu à température ambiante, à recevoir la couche de silicium, puis on dépose de façon sensiblement uniforme le silicium sur la surface du substrat, on effectue au moins un recuit du substrat, sur lequel on a déposé le silicium, à au moins 10000C, le temps total de recuit étant d'au moins 5 minutes, et l'on refroidit jusqu'à la température ambiante (environ 2O0C) le substrat à une vitesse d'au moins 100 °C/minute .According to a preferred embodiment of the method that is the subject of the invention, a surface of the substrate, maintained at ambient temperature, is prepared, according to the methods indicated above, to receive the silicon layer, and then is deposited in a substantially uniform manner. the silicon on the surface of the substrate, at least one annealing of the substrate on which the silicon has been deposited is carried out at least 1000 ° C., the total annealing time being at least 5 minutes, and cooling is carried out up to ambient temperature (approximately 20 ° C.) the substrate at a speed of at least 100 ° C./minute.
Le substrat peut également être porté à une température supérieure à la température ambiante, par exemple à environ 65O0C, pour effectuer le dépôt. Les étapes de dépôt et de recuit peuvent également être effectuées de manière simultanée, le dépôt se faisant dans ce cas à haute température.The substrate may also be brought to a temperature above ambient temperature, for example at about 65 ° C., to effect the deposition. The deposition and annealing steps can also be performed simultaneously, the deposition being done in this case at high temperature.
De préférence, notamment dans le cas où le substrat est fait d'un carbure de silicium monocristallin, la couche de silicium est formée sur ce substrat à température ambiante, puis l'ensemble constitué par le substrat et cette couche est ensuite soumis à au moins un recuit à au moins 65O0C, le temps total de recuit étant d'au moins 7 minutes, le ou les recuits étant suivis d'un refroidissement à une vitesse d'au moins 50°C/minute.Preferably, especially in the case where the substrate is made of a monocrystalline silicon carbide, the silicon layer is formed on this substrate at room temperature, then the assembly constituted by the substrate and this layer is then subjected to at least annealing at least 65O 0 C, the total annealing time being at least 7 minutes, the annealing or annealing being followed by cooling at a speed of at least 50 ° C / minute.
De préférence, en particulier dans le cas où le substrat est fait d'un carbure de silicium monocristallin, la préparation de la surface du substrat à recevoir le silicium monocristallin et/ou à promouvoir la formation de ce dernier comprend un chauffage auxiliaire du substrat à au moins 10000C, un dépôt auxiliaire sensiblement uniforme de silicium monocristallin sur la surface du substrat ainsi chauffé et au moins un recuit auxiliaire du substrat après ce dépôt auxiliaire, à au moins 65O0C, le temps total de recuit auxiliaire étant d'au moins 7 minutes.Preferably, particularly in the case where the substrate is made of a monocrystalline silicon carbide, the preparation of the surface of the substrate to receive the monocrystalline silicon and / or to promote the formation of the latter comprises an auxiliary heating of the substrate to at least 1000 ° C., a substantially uniform auxiliary deposition of monocrystalline silicon on the surface of the substrate thus heated and at least one auxiliary annealing of the substrate after this auxiliary deposition, at least 65 ° C., the total auxiliary annealing time being at least 7 minutes.
Avant le chauffage auxiliaire, la préparation de la surface du substrat comprend de préférence un dégazage du substrat sous ultra-vide puis au moins un recuit de ce substrat, suivi d'un refroidissement du substrat.Before the auxiliary heating, the preparation of the surface of the substrate preferably comprises a degassing of the substrate under ultra-vacuum then at least one annealing of this substrate, followed by cooling of the substrate.
Dans la présente invention, la couche de silicium est de préférence formée par évaporation sous vide .In the present invention, the silicon layer is preferably formed by vacuum evaporation.
Il convient de noter que cette couche peut être formée d'autres façons, par exemple par chimisorption/interaction de silane ou par évaporation par bombardement électronique d'un échantillon de silicium.It should be noted that this layer can be formed in other ways, for example by chemisorption / interaction of silane or by evaporation by electron bombardment of a silicon sample.
Selon un mode de mise en œuvre préféré de l'invention, le silicium est déposé sur le substrat à partir d'un échantillon de silicium dont la surface est plus grande que celle du substrat. De préférence, la surface de l'échantillon de silicium et la surface du substrat sont séparées par une distance de l'ordre de 2 à 3 cm.According to a preferred embodiment of the invention, the silicon is deposited on the substrate from a silicon sample whose surface is larger than that of the substrate. Preferably, the surface of the silicon sample and the surface of the substrate are separated by a distance of the order of 2 to 3 cm.
Selon l'invention, l'oxydation de la couche de silicium est réalisée à la suite du dépôt de la couche de silicium, avantageusement dans la même enceinte .According to the invention, the oxidation of the silicon layer is carried out following the deposition of the silicon layer, advantageously in the same enclosure.
De préférence, l'oxydation de la couche de silicium est faite avec une exposition à l'oxygène comprise dans l'intervalle allant de 8000 langmuirs (environ 0,8Pa. s) à 15000 langmuirs (environ 1,5Pa. s), cette exposition étant de préférence égale à 10000 langmuirs (environ IPa. s) .Preferably, the oxidation of the silicon layer is made with an oxygen exposure in the range of 8000 langmuirs (about 0.8 Pa) to 15000 langmuirs (about 1.5 Pa). exposure is preferably equal to 10,000 langmuirs (about IPa. s).
Avec le procédé d'obtention d'une couche d'oxyde conformément à l'invention, il est possible de faire croître l'épaisseur de l'oxyde jusqu'à lOnm avec une interface restant abrupte. Pour obtenir un résultat identique, on peut avantageusement augmenter la quantité d' oxyde par des expositions plus importantes à l'oxygène et par des températures un peu plus élevées, proches 65O0C. Dans la présente invention, des recuits peuvent être effectués après l'oxydation de la couche de silicium de structure 3x2.With the method of obtaining an oxide layer according to the invention, it is possible to increase the thickness of the oxide to 10 nm with a steep remaining interface. To obtain a result Similarly, the amount of oxide can be advantageously increased by higher exposures to oxygen and by slightly higher temperatures, close to 65O 0 C. In the present invention, annealing can be carried out after the oxidation of the oxide. 3x2 structure silicon layer.
La présente invention est très utile pour la fabrication de dispositifs MOS et en particulier de dispositifs MOSFET (transistors à effet de champ de type MOS) .The present invention is very useful for the manufacture of MOS devices and in particular of MOSFET devices (MOS type field effect transistors).
Elle est également utile pour la passivation de tout composant, non seulement sur du carbure de silicium mais encore sur du silicium ou d'autres substrats, sur lesquels une telle structure 3x2 du silicium peut être déposée.It is also useful for the passivation of any component, not only on silicon carbide but also on silicon or other substrates, on which such a 3 × 2 silicon structure can be deposited.
Une couche de dioxyde de silicium (SiO2) obtenue par le procédé, objet principal de l'invention, subit moins de dommages sous l'impact de rayonnements ionisants incidents que les couches de SiO2 de l'art antérieur, parce qu'elle est réalisable à plus basse température que ces couches, elle est mince (elle est susceptible d'avoir une épaisseur aussi faible que lnm et en tout cas inférieure ou égale à 8nm) et elle a une interface abrupte avec le substrat sous-jacent.A layer of silicon dioxide (SiO 2 ) obtained by the process, the main object of the invention, undergoes less damage under the impact of incident ionizing radiation than the layers of SiO 2 of the prior art, because it is achievable at lower temperature than these layers, it is thin (it is likely to have a thickness as low as 1 nm and in any case less than or equal to 8 nm) and has a steep interface with the underlying substrate.
BRÈVE DESCRIPTION DES DESSINSBRIEF DESCRIPTION OF THE DRAWINGS
La présente invention sera mieux comprise à la lecture de la description d'exemples de réalisation donnés ci-après, à titre purement indicatif et nullement limitatif, en faisant référence à la figure unique annexée qui illustre schématiquement la fabrication d'une couche de silicium conformément à 1' invention .The present invention will be better understood on reading the description of exemplary embodiments given below, for purely indicative and non-limiting purposes, with reference to FIG. single appended which schematically illustrates the manufacture of a silicon layer in accordance with the invention.
EXPOSÉ DÉTAILLÉ DE MODES DE RÉALISATION PARTICULIERSDETAILED PRESENTATION OF PARTICULAR EMBODIMENTS
On indique tout d'abord qu'une couche de silicium ayant une structure 3x2 peut être obtenue selon les modalités décrites dans le document FR 2 823 770 A, correspondant à US 2004/0104406 A.It is firstly indicated that a silicon layer having a 3 × 2 structure can be obtained according to the methods described in document FR 2 823 770 A, corresponding to US 2004/0104406 A.
On donne maintenant un exemple de préparation d'une couche de silicium conforme à 1' invention .An example of preparation of a silicon layer in accordance with the invention is now given.
Dans cet exemple, on utilise un échantillon de carbure de silicium monocristallin cubique qui est commercialement disponible auprès des Sociétés NovaSiC et Hoya ainsi qu'auprès du LETI (un laboratoire du Commissariat à l'Energie Atomique) .In this example, a cubic monocrystalline silicon carbide sample is used which is commercially available from NovaSiC and Hoya Companies as well as from LETI (a laboratory of the Atomic Energy Commission).
La face utilisée de cet échantillon est la face (100) .The used face of this sample is the face (100).
Cet échantillon peut consister en un film mince, d'épaisseur supérieure ou égale à lμm, epitaxié sur une plaquette (en anglais, wafer) de silicium, ou peut être un échantillon massif, ayant une épaisseur d'environ 300 μm. De plus, cet échantillon a, par exemple, une longueur de 13 mm et une largeur de 5 mm.This sample may consist of a thin film, of thickness greater than or equal to 1 μm, epitaxied on a silicon wafer, or may be a solid sample having a thickness of about 300 μm. In addition, this sample has, for example, a length of 13 mm and a width of 5 mm.
On commence par préparer, à partir de l'échantillon, une surface propre β-SiC (100) reconstruite 3x2. On effectue d' abord un rinçage de l'échantillon à l'éthanol ou au méthanol.We begin by preparing, from the sample, a 3 × 2 reconstructed β-SiC (100) clean surface. The sample is first rinsed with ethanol or methanol.
Ensuite, on introduit l'échantillon dans une enceinte à ultravide où l'on établit une pression de l'ordre de 3xlCT9 Pa et où cet échantillon est chauffé par effet Joule direct grâce au passage d'un courant électrique à travers l'échantillon.Then, the sample is introduced into an ultrahigh vacuum chamber where a pressure of the order of 3xlCT 9 Pa is established and where this sample is heated by a direct Joule effect by passing an electric current through the sample. .
La température de ce dernier est mesurée à l'aide d'un pyromètre à infrarouge. Tout d'abord, on dégaze l'échantillon en le laissant pendant 24 heures à 65O0C sous ultravide.The temperature of the latter is measured using an infrared pyrometer. First, the sample is degassed, leaving it for 24 hours at 65 ° C. under ultrahigh vacuum.
On fait ensuite subir une série de recuits à l'échantillon jusqu'à ce qu'aucun contaminant ne soit détecté, par exemple par photoémission, et que la surface de l'échantillon soit bien ordonnée, ce que l'on vérifie par LEED ou par RHEED :The sample is then subjected to a series of annealing operations until no contaminants are detected, for example by photoemission, and the surface of the sample is well ordered, as verified by LEED or by RHEED:
- on chauffe l'échantillon à 10000C pendant 3 minutes puis à HOO0C pendant 1 minute puis à 12000C pendant 1 minute ; - on refroidit ensuite lentement l'échantillon à une vitesse de 1000C par minute, jusqu'à la température ambiante (environ 2O0C).the sample is heated at 1000 ° C. for 3 minutes and then at 0 ° C. for 1 minute and then at 1200 ° C. for 1 minute; the sample is then slowly cooled at a rate of 100 ° C. per minute to room temperature (approximately 20 ° C.).
Ensuite, pendant 10 minutes, à l'aide d'une évaporation sous vide effectuée au moyen d'un échantillon de silicium propre (ayant, par exemple, une longueur de 20 mm et une largeur de 10 mm) que l'on chauffe à 115O0C, on dépose uniformément du silicium sur la surface de l'échantillon de carbure de silicium maintenu à température ambiante. Pendant ce dépôt, l'échantillon de carbure de silicium et l'échantillon de silicium se font face et se trouvent à une distance D de 2 cm l'un deThen, for 10 minutes, using a vacuum evaporation carried out using a clean silicon sample (having, for example, a length of 20 mm and a width of 10 mm) that is heated to 115O 0 C, silicon is deposited uniformly on the surface of the sample of silicon carbide maintained at ambient temperature. During this deposition, the silicon carbide sample and the silicon sample face each other and are at a distance D of 2 cm one of
1' autre .The other.
La plus grande surface de l'échantillon de silicium permet l'homogénéité, c'est-à-dire l'uniformité, du dépôt de silicium sur l'échantillon de carbure de silicium.The larger surface area of the silicon sample allows homogeneity, i.e., uniformity, of silicon deposition on the silicon carbide sample.
Enfin on reproduit, pour l'échantillon deFinally we reproduce, for the sample of
SiC ainsi recouvert de silicium, la série de recuits décrite précédemment : cet échantillon est chauffé à 10000C pendant 3 minutes puis à HOO0C pendant 1 minute puis à 12000C pendant 1 minute.SiC thus coated with silicon, the annealing series described above: this sample is heated at 1000 ° C. for 3 minutes and then at 0 ° C. for 1 minute and then at 1200 ° C. for 1 minute.
L'échantillon ainsi recouvert de Si subit alors une nouvelle série de recuits : 1 minute à 75O0C puis 1 minute à 7000C puis 5 minutes à 65O0C. On refroidit ensuite lentement l'échantillon jusqu'à la température ambiante, à une vitesse de 5O0C par minute.The sample thus coated with Si then undergoes a new series of anneals: 1 minute at 75O 0 C then 1 minute at 700 0 C and then 5 minutes at 65O 0 C. The sample is then slowly cooled to room temperature, at a rate of 50 ° C. per minute.
La surface de β-SiC (100) ainsi obtenue a une structure 3x2 (maille carrée) . Les zones reconstruites 3x2 ont des dimensions de l'ordre de 550 nm x 450 nm, peuvent avoir une faible densité de marches et possèdent quelques îlots de Si en formation 3x2. Les îlots reconstruitsThe surface of β-SiC (100) thus obtained has a 3 × 2 structure (square mesh). The 3x2 reconstructed areas have dimensions of the order of 550 nm x 450 nm, can have a low density of steps and have a few islands of Si in formation 3x2. The reconstructed islets
3x2 sont alors sélectionnés pour l'étape suivante. Du silicium peut ensuite être ajouté et permet la croissance épitaxiale d'une couche de silicium reconstruite 3x2.3x2 are then selected for the next step. Silicon can then be added and allows the epitaxial growth of a 3x2 reconstructed silicon layer.
On peut ainsi obtenir une couche de silicium dont l'épaisseur correspond à plusieurs couches atomiques (de lnm à lOnm) . L'organisation de cette couche de Si en une structure 3x2 est ainsi assurée par une série de recuits à 75O0C, puis à 7000C puis à 65O0C, comme on l'a décrit ci-dessus. La figure unique annexée illustre très schématiquement la fabrication de la couche 2 de silicium, ayant une structure 3x2, sur la surface propre du substrat 4 de β-SiC (100) reconstruit 3x2.It is thus possible to obtain a silicon layer whose thickness corresponds to several atomic layers (from 1 nm to 10 nm). The organization of this Si layer in a 3 × 2 structure is thus ensured by a series of anneals at 75 ° C., then at 700 ° C. and then at 65 ° C., as described above. The single appended figure illustrates very schematically the manufacture of the silicon layer 2, having a 3 × 2 structure, on the clean surface of the 3 × 2 reconstructed β-SiC substrate (100).
On voit aussi l'enceinte 6 dans laquelle a lieu la préparation du substrat 4 et la formation de la couche 2.We also see the chamber 6 in which takes place the preparation of the substrate 4 and the formation of the layer 2.
Les moyens de pompage permettant l'obtention de l'utravide sont symbolisés par la flèche 8. Le substrat 4 est monté sur un support approprié 10 et les moyens de chauffage du substrat par effet Joule sont symbolisés par les flèches 12.The pumping means making it possible to obtain the utravide are symbolized by the arrow 8. The substrate 4 is mounted on a suitable support 10 and the heating means of the substrate by the Joule effect are symbolized by the arrows 12.
On voit aussi des moyens de chauffage par effet Joule de l'échantillon de silicium 14, ces moyens étant symbolisés par des flèches 16.Joule heating means of the silicon sample 14 are also seen, these means being symbolized by arrows 16.
On décrit maintenant l'oxydation de la couche de silicium de structure 3x2.The oxidation of the silicon layer of structure 3 × 2 is now described.
Cette oxydation se déroule de la manière suivante : l'échantillon recouvert d'une couche de Si- 3x2 est exposé à de l'oxygène, tout en étant maintenu à une température comprise dans l'intervalle allant de 250C à 65O0C ; l'exposition à l'oxygène est égale à 104 langmuirs (environ IPa. s) .This oxidation proceeds as follows: the sample coated with a layer of Si-3 × 2 is exposed to oxygen, while being maintained at a temperature in the range from 25 ° C. to 65 ° C. ; the exposure to oxygen is equal to 10 4 langmuirs (approximately IPa s).
Dans ces conditions, on obtient une couche d'oxyde de silicium représentée en pointillés sur la figure (référence 18), cette couche d'oxyde de silicium ayant une épaisseur moyenne de lnm.Under these conditions, a silicon oxide layer represented in dashed lines on the figure (reference 18), this silicon oxide layer having an average thickness of lnm.
Des épaisseurs plus importantes, par exemple lOnm, peuvent être obtenues en augmentant la quantité d'oxygène apporté ainsi que la température.Larger thicknesses, for example 10 μm, can be obtained by increasing the amount of oxygen supplied as well as the temperature.
Ce dernier processus peut-être réalisé plusieurs fois de suite, l'interface entre le SiO2 et le substrat restant abrupte.This last process can be done several times in a row, the interface between the SiO 2 and the substrate remaining abrupt.
Des échantillons d'épaisseurs variables, selon les besoins, peuvent donc être obtenus en faisant varier l'exposition à l'oxygène.Samples of varying thicknesses, as needed, can therefore be obtained by varying the exposure to oxygen.
L'oxydation de la couche de silicium 2 est faite, de préférence, dans l'enceinte 6. Dans ce cas, on munit cette enceinte des moyens nécessaires à cette oxydation, en particulier d'une entrée d'oxygène (non représentée) . The oxidation of the silicon layer 2 is preferably made in the chamber 6. In this case, the chamber is provided with the means necessary for this oxidation, in particular an oxygen input (not shown).

Claims

REVENDICATIONS
1. Couche de silicium formée sur un substrat, cette couche (2) étant caractérisée en ce qu'elle a une structure 3x2, le substrat (4) étant apte à recevoir cette structure 3x2 du silicium ou propre à favoriser sa formation.1. Silicon layer formed on a substrate, this layer (2) being characterized in that it has a 3 × 2 structure, the substrate (4) being able to receive this 3 × 2 silicon structure or to promote its formation.
2. Couche selon la revendication 1, cette couche ayant une structure de surface 3x2, le substrat2. Layer according to claim 1, this layer having a 3 × 2 surface structure, the substrate
(4) étant apte à recevoir cette structure de surface 3x2 du silicium ou propre à favoriser sa formation.(4) being able to receive this 3 × 2 surface structure of silicon or to promote its formation.
3. Couche selon l'une quelconque des revendications 1 et 2, cette couche étant oxydable à une température inférieure ou égale à 65O0C.3. Layer according to any one of claims 1 and 2, this layer being oxidizable at a temperature less than or equal to 65O 0 C.
4. Couche selon l'une quelconque des revendications 1 à 3, dans laquelle le substrat (4) est du carbure de silicium β-SiC.4. A layer according to any one of claims 1 to 3, wherein the substrate (4) is β-SiC silicon carbide.
5. Couche d'oxyde de silicium, cette couche (18) résultant de l'oxydation de la couche selon l'une quelconque des revendications 1 à 4.5. Silicon oxide layer, this layer (18) resulting from the oxidation of the layer according to any one of claims 1 to 4.
6. Surface recouverte de la couche d' oxyde de silicium selon la revendication 5.Surface covered with the silicon oxide layer according to claim 5.
7. Procédé d' obtention de la couche selon l'une quelconque des revendications 1 à 4, dans lequel on dépose de façon sensiblement uniforme du silicium sur une surface du substrat (4) .7. Process for obtaining the layer according to any one of Claims 1 to 4, in which there is substantially uniformly deposited silicon on a surface of the substrate (4).
8. Procédé d'obtention d'une couche d'oxyde de silicium sur un substrat (4), ce procédé étant caractérisé en ce qu'il comprend les étapes successives suivantes :8. Process for obtaining a silicon oxide layer on a substrate (4), this method being characterized in that it comprises the following successive steps:
(a) la formation d'une couche (2) de silicium selon l'une quelconque des revendications 1 et 2 sur le substrat, et(a) forming a layer (2) of silicon according to any one of claims 1 and 2 on the substrate, and
(b) l'oxydation de cette couche de silicium.(b) the oxidation of this silicon layer.
9. Procédé selon la revendication 8, dans lequel l'oxydation de la couche de silicium est effectuée à une température inférieure ou égale à 65O0C.9. The method of claim 8, wherein the oxidation of the silicon layer is performed at a temperature less than or equal to 65O 0 C.
10. Procédé selon la revendication 9, dans lequel l'oxydation de la couche de silicium est effectuée à la température ambiante.The method of claim 9, wherein the oxidation of the silicon layer is performed at room temperature.
11 Procédé selon l'une quelconque des revendications 8 et 10, dans lequel le substrat (4) est fait de carbure de silicium ou de silicium.The method of any of claims 8 and 10, wherein the substrate (4) is made of silicon carbide or silicon.
12. Procédé selon l'une quelconque des revendications 8 à 11, dans lequel l'étape (a) est précédée par une étape de rinçage de la surface du substrat, sur laquelle on forme ensuite la couche de silicium (2 ) . 12. A method according to any one of claims 8 to 11, wherein step (a) is preceded by a step of rinsing the surface of the substrate, which is then formed on the silicon layer (2).
13. Procédé selon la revendication 12, dans lequel le rinçage est effectué à l'aide d'un solvant organique .The method of claim 12, wherein the rinsing is performed with an organic solvent.
14. Procédé selon la revendication 13, dans lequel le solvant organique comprend de l'éthanol ou du méthanol .The process of claim 13, wherein the organic solvent comprises ethanol or methanol.
15. Procédé selon l'une quelconque des revendications 8 à 14, dans lequel l'étape (a) est précédée par une étape de dégazage du substrat.15. A method according to any one of claims 8 to 14, wherein step (a) is preceded by a step of degassing the substrate.
16. Procédé selon la revendication 15, dans lequel le dégazage est effectué en chauffant le substrat sous une pression réduite.The method of claim 15, wherein degassing is performed by heating the substrate under reduced pressure.
17. Procédé selon l'une quelconque des revendications 15 et 16, dans lequel le dégazage est effectué à environ 65O0C, sous une pression de 3xlO~9 Pa.17. A method according to any one of claims 15 and 16, wherein the degassing is carried out at about 65O 0 C under a pressure of 3x10 ~ 9 Pa.
18. Procédé selon l'une quelconque des revendications 8 à 17, dans lequel au moins un recuit du substrat est effectué avant la formation de la couche de silicium à l'étape (a) .The method of any one of claims 8 to 17, wherein at least one annealing of the substrate is performed prior to forming the silicon layer in step (a).
19. Procédé selon la revendication 18, dans lequel chaque recuit est effectué de la manière suivante : - on chauffe le substrat à 10000C pendant 3 minutes puis à HOO0C pendant 1 minute puis à 12000C pendant 1 minute, puisThe method of claim 18, wherein each annealing is performed as follows: the substrate is heated at 1000 ° C. for 3 minutes and then at 0 ° C. for 1 minute and then at 1200 ° C. for 1 minute, then
- on refroidit le substrat à une vitesse de 1000C par minute jusqu'à la température ambiante.the substrate is cooled at a rate of 100 ° C. per minute to room temperature.
20. Procédé selon l'une quelconque des revendications 8 à 19, dans lequel la couche de silicium est formée par évaporation sous vide, par chimisorption/interaction de silane ou par évaporation par bombardement électronique d'un échantillon de silicium.20. A method according to any one of claims 8 to 19, wherein the silicon layer is formed by evaporation under vacuum, by chemisorption / interaction of silane or by evaporation by electron bombardment of a silicon sample.
21. Procédé selon l'une quelconque des revendications 8 à 20, dans lequel la couche de silicium (2) de l'étape (a) est formée à température ambiante .The method of any one of claims 8 to 20, wherein the silicon layer (2) of step (a) is formed at ambient temperature.
22. Procédé selon l'une quelconque des revendications 8 à 21, dans lequel l'épaisseur de la couche de silicium formée à l'étape (a) est inférieure ou égale à lOnm.22. A method according to any one of claims 8 to 21, wherein the thickness of the silicon layer formed in step (a) is less than or equal to 10 nm.
23. Procédé l'une quelconque des revendications 8 à 22, dans lequel au moins un recuit de la couche de silicium est effectué après la formation de cette couche à l'étape (a) .23. The method of any one of claims 8 to 22, wherein at least one annealing of the silicon layer is performed after the formation of this layer in step (a).
24. Procédé selon l'une quelconque des revendications 8 à 23, dans lequel la couche de silicium (2) est formée sur le substrat à température ambiante, puis l'ensemble constitué par ce substrat et cette couche est soumis à au moins un recuit à au moins 65O0C, le temps total de recuit étant au moins égal à 7 minutes, le ou les recuits étant suivis d'un refroidissement à une vitesse d'au moins 50°C/minute.The method of any one of claims 8 to 23, wherein the silicon layer (2) is formed on the temperature substrate ambient, then the assembly consisting of this substrate and this layer is subjected to at least one annealing at least 65O 0 C, the total annealing time being at least equal to 7 minutes, the annealing or annealing being followed by a cooling at a rate of at least 50 ° C / min.
25. Procédé selon l'une quelconque des revendications 8 à 24, dans lequel l'oxydation de la couche de silicium (2) est faite avec une exposition à l'oxygène comprise dans un intervalle allant d'environ25. A process according to any one of claims 8 to 24, wherein the oxidation of the silicon layer (2) is made with an exposure to oxygen within a range of about
0,8Pa. s à environ 1,5Pa. s. 0,8Pa. s about 1.5Pa. s.
EP06764054A 2005-07-05 2006-07-04 Highly oxygen-sensitive silicon layer and method for obtaining same Ceased EP1900012A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0552059A FR2888398B1 (en) 2005-07-05 2005-07-05 HIGHLY OXYGEN-SENSITIVE SILICON LAYER AND METHOD OF OBTAINING THE LAYER
PCT/EP2006/063856 WO2007003638A1 (en) 2005-07-05 2006-07-04 Highly oxygen-sensitive silicon layer and method for obtaining same

Publications (1)

Publication Number Publication Date
EP1900012A1 true EP1900012A1 (en) 2008-03-19

Family

ID=36123124

Family Applications (1)

Application Number Title Priority Date Filing Date
EP06764054A Ceased EP1900012A1 (en) 2005-07-05 2006-07-04 Highly oxygen-sensitive silicon layer and method for obtaining same

Country Status (5)

Country Link
US (1) US20090294776A1 (en)
EP (1) EP1900012A1 (en)
JP (1) JP2008544945A (en)
FR (1) FR2888398B1 (en)
WO (1) WO2007003638A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2483702A (en) * 2010-09-17 2012-03-21 Ge Aviat Systems Ltd Method for the manufacture of a Silicon Carbide, Silicon Oxide interface having reduced interfacial carbon gettering
FR2974236A1 (en) * 2011-04-15 2012-10-19 St Microelectronics Sa Method for manufacturing complementary metal-oxide-semiconductor transistor of integrated circuit, involves subjecting silicon-germanium layer to epitaxy process to form silicon layer, and oxidizing silicon layer using oxidation process
US9105578B2 (en) * 2013-03-12 2015-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Interface for metal gate integration
US9263275B2 (en) 2013-03-12 2016-02-16 Taiwan Semiconductor Manufacturing Company, Ltd. Interface for metal gate integration
JP2018158858A (en) * 2017-03-22 2018-10-11 日本電信電話株式会社 Crystal growth method and apparatus

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3998862A (en) * 1973-07-16 1976-12-21 Rohm And Haas Company Alkyl ammonium carboxylite salt-ethoxylated alkyl phenol esters
US4735921A (en) * 1987-05-29 1988-04-05 Patrick Soukiassian Nitridation of silicon and other semiconductors using alkali metal catalysts
JP2534525B2 (en) * 1987-12-19 1996-09-18 富士通株式会社 Method for manufacturing β-silicon carbide layer
US4900710A (en) * 1988-11-03 1990-02-13 E. I. Dupont De Nemours And Company Process of depositing an alkali metal layer onto the surface of an oxide superconductor
WO1997039476A1 (en) * 1996-04-18 1997-10-23 Matsushita Electric Industrial Co., Ltd. SiC ELEMENT AND PROCESS FOR ITS PRODUCTION
FR2757183B1 (en) * 1996-12-16 1999-02-05 Commissariat Energie Atomique LONG LENGTH AND LONG STABILITY ATOMIC WIRES, PROCESS FOR PRODUCING THESE WIRES, APPLICATION IN NANO-ELECTRONICS
FR2801723B1 (en) * 1999-11-25 2003-09-05 Commissariat Energie Atomique HIGHLY OXYGEN-SENSITIVE SILICON LAYER AND METHOD FOR OBTAINING THE LAYER
WO2002052652A1 (en) * 2000-12-26 2002-07-04 Matsushita Electric Industrial Co., Ltd. Semiconductor device and its manufacturing method
US20020088970A1 (en) * 2001-01-05 2002-07-11 Motorola, Inc. Self-assembled quantum structures and method for fabricating same
FR2823770B1 (en) * 2001-04-19 2004-05-21 Commissariat Energie Atomique PROCESS FOR TREATING THE SURFACE OF A SEMICONDUCTOR MATERIAL, USING IN PARTICULAR HYDROGEN, AND SURFACE OBTAINED BY THIS PROCESS
JP4029595B2 (en) * 2001-10-15 2008-01-09 株式会社デンソー Method for manufacturing SiC semiconductor device
US7022378B2 (en) * 2002-08-30 2006-04-04 Cree, Inc. Nitrogen passivation of interface states in SiO2/SiC structures

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2007003638A1 *

Also Published As

Publication number Publication date
US20090294776A1 (en) 2009-12-03
JP2008544945A (en) 2008-12-11
FR2888398A1 (en) 2007-01-12
FR2888398B1 (en) 2007-12-21
WO2007003638A1 (en) 2007-01-11

Similar Documents

Publication Publication Date Title
EP0760162B1 (en) Method for production of a structure with a low level of dislocations and having an oxide layer buried in a semiconductor substrate
WO2011067394A1 (en) Method for manufacturing a semiconductor-on-insulator structure having low electrical losses, and corresponding structure
FR3104318A1 (en) METHOD FOR FORMING A HIGH STRENGTH HANDLING SUPPORT FOR COMPOSITE SUBSTRATE
EP0122822B1 (en) Process for manufacturing a semiconductor device of the type having at least one silicum layer deposited on an isolating substrate
CA2392445C (en) Silicon layer highly sensitive to oxygen and method for obtaining same
EP1900012A1 (en) Highly oxygen-sensitive silicon layer and method for obtaining same
FR3108774A1 (en) PROCESS FOR MANUFACTURING A COMPOSITE STRUCTURE INCLUDING A THIN SIC MONOCRISTALLINE SIC LAYER ON A SIC SUPPORT SUBSTRATE
EP3818561A1 (en) Substrate for an integrated radiofrequency device, and process for manufacturing same
EP1332517B1 (en) Method for revealing crystalline defects and/or stress field defects at the molecular adhesion interface of two solid materials
EP0262030A1 (en) Method of producing an electrical contact on a pHgCdTe substrate, and its use in producing an N/P diode
WO2007003639A2 (en) Substrate, in particular made of silicon carbide, coated with a thin stoichiometric film of silicon nitride, for making electronic components, and method for obtaining such a film
EP1568072A1 (en) Method of producing an n-type diamond with high electrical conductivity
EP1337683B1 (en) Method for automatic organisation of microstructures or nanostructures and related device obtained
WO2013093360A1 (en) Method for producing a mos stack on a diamond substrate
EP4030467B1 (en) Method for direct hydrophilic bonding of substrates
FR2930680A1 (en) PROCESS FOR MANUFACTURING THIN FILM SILICON PHOTOVOLTAIC CELL
FR2866982A1 (en) Fabrication of electronic components using a noble support for front end fabrication and a less costly support, with specific desired physical properties, for back end fabrication
FR2784232A1 (en) RADIATION DETECTORS AND METHOD FOR MANUFACTURING AND CONDITIONING SUCH DETECTORS
EP4154307A1 (en) Method for manufacturing a semiconductor-on-insulator substrate for radiofrequency applications
FR3042645A1 (en) PROCESS FOR PRODUCING A HETEROJUNCTION PHOTOVOLTAIC CELL
EP1656473A2 (en) Metal nano-objects, formed on semiconductor surfaces, and methods for making said nano-objects
FR2916302A1 (en) Substrate manufacturing method for integrated circuit, involves depositing semiconductor layer i.e. silicon layer, in gas plasma, where speed of deposition of atoms is lower than speed of homogenization of atoms
FR2879346A1 (en) PROCESS FOR FORMING A CRYSTALLINE LAYER ON A SILICON SUBSTRATE

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20071213

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR

DAX Request for extension of the european patent (deleted)
17Q First examination report despatched

Effective date: 20080418

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: UNIVERSITE PARIS-SUD (PARIS XI)

Owner name: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES

REG Reference to a national code

Ref country code: DE

Ref legal event code: R003

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION HAS BEEN REFUSED

18R Application refused

Effective date: 20120211