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EP1995712A1 - Verfahren zur Anwendung von Dithering für Videodaten und Anzeigevorrichtung mit diesem Verfahren - Google Patents

Verfahren zur Anwendung von Dithering für Videodaten und Anzeigevorrichtung mit diesem Verfahren Download PDF

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Publication number
EP1995712A1
EP1995712A1 EP07301059A EP07301059A EP1995712A1 EP 1995712 A1 EP1995712 A1 EP 1995712A1 EP 07301059 A EP07301059 A EP 07301059A EP 07301059 A EP07301059 A EP 07301059A EP 1995712 A1 EP1995712 A1 EP 1995712A1
Authority
EP
European Patent Office
Prior art keywords
dithering
input picture
pattern
video data
checker pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP07301059A
Other languages
English (en)
French (fr)
Inventor
Cédric Thebault
Carlos Correa
Sébastien Weitbruch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Deutsche Thomson OHG
Original Assignee
Deutsche Thomson OHG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche Thomson OHG filed Critical Deutsche Thomson OHG
Priority to EP07301059A priority Critical patent/EP1995712A1/de
Publication of EP1995712A1 publication Critical patent/EP1995712A1/de
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2044—Display of intermediate tones using dithering
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2059—Display of intermediate tones using error diffusion
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels

Definitions

  • the invention relates to a method for processing video data of an input picture comprising a dithering step to refine the grayscale portrayal of the video data of the input picture and a device implementing said method.
  • the invention will be described in the field of plasma display panels but is applicable to other types of display panels, for example LCD (Liquid Crystal Displays) or DLP (Digital Light Processing) projectors, wherein a dithering operation is required to improve the grayscale portrayal of the displayed pictures.
  • LCD Liquid Crystal Displays
  • DLP Digital Light Processing
  • a PDP (Plasma Display Panel) utilizes a matrix array of discharge cells, which can only be "ON", or "OFF". Unlike a CRT in which grey levels are expressed by analogue control of the light emission, a PDP controls the grey level by modulating the number of light pulses per frame (sustain pulses). This time-modulation will be integrated by the eye over a period corresponding to the eye time response. Since the video amplitude is portrayed by the number of light pulses, occurring at a given frequency, more amplitude means more light pulses and thus more "ON" time. For this reason, this kind of modulation is also known as PWM, pulse width modulation.
  • This PWM is responsible for one of the PDP image quality problems: the poor grey scale portrayal quality, especially in the darker regions of the picture. This is due to the fact, that displayed luminance is linear to the number of pulses, but the eye response and sensitivity to noise is not linear. In darker areas the eye is more sensitive than in brighter areas. This means that even though modern PDPs can display ca. 255 discrete video levels, quantization error will be quite noticeable in the darker areas.
  • a PDP uses PWM (pulse width modulation) to generate the different shades of grey. Contrarily to CRTs where luminance is approximately quadratic to applied cathode voltage, luminance is linear to the number of discharge impulses. Therefore an approximately digital quadratic gamma function has to be applied to video before the PWM.
  • PWM pulse width modulation
  • Dithering is a known technique for avoiding losing amplitude resolution bits due to truncation.
  • this technique only works if the required resolution is available before the truncation step. Usually this is the case in most applications, since the video data after a gamma operation used for pre-correction of the video signal has 16-bit resolution. Dithering can bring back as many bits as those lost by truncation in principle. However, the dithering noise frequency decreases, and therefore becomes more noticeable, with the number of dithered bits.
  • a quantization step of 1 shall be reduced by dithering.
  • the dithering technique uses the temporal integration property of the human eye.
  • the quantization step may be reduced to 0, 5 by using 1-bit dithering. Accordingly, half of the time within the time response of the human eye there is displayed the value 1 and half of the time there is displayed the value 0. As a result the eye sees the value 0.5.
  • the quantization steps may be reduced to 0.25.
  • Such dithering requires two bits. For obtaining the value 0.25 a quarter of the time the value 1 is shown and three quarters of the time the value 0. For obtaining the value 0.5 two quarters of the time the value 1 and two quarters of the time the value 0 is shown.
  • the value 0.75 may be generated.
  • quantization steps of 0.125 may be obtained by using 3-bit dithering. This means that 1 bit of dithering corresponds to multiply the number of available output levels by 2, 2 bits of dithering multiply by 4, and 3 bits of dithering multiply by 8 the number of output levels. A minimum of 3 bits of dithering may be required to give to the grey scale portrayal a 'CRT' look.
  • a checker pattern applied to an input picture consists generally in rounding up the value of a first pixel of a first line, then rounding down the value of the next pixel of the first line, then rounding up the value of the next pixel of the first line, then rounding down the value of the next pixel of the first line ... and doing the opposite for the next line....
  • rounding up means rounding up to the closest higher video level that can be displayed and rounding down means rounding down to the closest lower value that can be displayed.
  • a checker pattern is illustrated by the following chart wherein a bit 0 or 1 is associated to each pixel of a block of 6x14 pixels, 0 meaning that the value of the pixel is rounding down and 1 meaning that the value is rounding up.
  • One way of implementing a checker pattern is to round up if the number (pixel_counter+line_counter) is equal to 1 modulo 2, and to round down if the number (pixel_counter+line_counter) is equal to 0 modulo 2.
  • the number (pixel_counter+line_counter) can be replaced by the number (pixel_counter+line_counter+frame_counter) or other formulas.
  • checker pattern added to the picture is not always noticeable in the final picture. This is the case for pictures with high contrast and lots of details in which every pixel has a video information quite different from its neighbor pixels. For such pictures or parts of pictures, the used dithering is not really visible, and so not so important.
  • checker pattern dithering is easy to implement and quite efficient, some rendering systems like some computers graphic cards use such a pattern to reduce the number of video bits or to perform some special effects. Unfortunately if a display device using this checker dithering pattern is connected to such a rendering system, some interferences can appear which generate clearly visible low frequency flicker, typically at half display refresh rate.
  • the present invention concerns a method for processing video data of an input picture comprising applying a dithering function to the video data of at least a part of the input picture. According to the invention, it further comprises the steps of:
  • a checker pattern is detected in a block of pxq neighbor pixels if, in each row and column of pixels of said block, every pixel or the big majority of them is surrounded by pixels having higher video data or by pixels having lower video data.
  • the selected dithering function is a dithering pattern for at least the most significant dithering bit.
  • This dithering pattern can be a checker pattern.
  • the invention concerns also a display device for displaying an input picture comprising dithering means for applying a dithering function to the video data of at least a part of the input picture.
  • a display device for displaying an input picture comprising dithering means for applying a dithering function to the video data of at least a part of the input picture.
  • it further comprises :
  • the presence of a checker pattern is detected (step 10) in at least a part of the input picture provided to the display device and a dithering function (among a plurality of dithering functions) to be used by the dithering means of the display device is selected (step 20) in accordance with the presence or absence of a checker pattern in this part of picture.
  • the dithering step (step 30) is then applied to the part of input picture with the selected dithering function.
  • n designates the video information of a pixel n. If one of the two conditions is right, a checker pattern is detected.
  • a dithering function is to be selected and to be applied to said block of pixels by the dithering means.
  • a dithering function called default dithering function is selected and applied to said block of pixels.
  • This default dithering function uses for example a checker pattern for the most significant dithering bit which is, as mentioned before, the less visible deterministic dithering pattern.
  • a checker pattern is detected in the block of pixels, another predetermined dithering function is selected and applied to the block of pixels.
  • This dithering function is defined to not generate interferences with a checker pattern.
  • Such dithering function is for example a dither pattern like 1 1 0 0 1 1 0 0 0 0 0 1 1 0 0 1 1
  • the dithering functions are for example dithering patterns stored in the form of Look-Up Tables (LUTs) in a memory of the display device or are mathematical functions.
  • LUTs Look-Up Tables
  • FIG. 2 illustrates a possible implementation for the algorithm in the case of a PDP.
  • RGB input pictures indicated by the signals R 0 , G 0 and B 0 are forwarded to a gamma function block 100. It can consist of a look up table (LUT) or it can be formed by a mathematical function.
  • the outputs R 1 , G 1 and B 1 of the gamma function block 10 are forwarded to a dithering block 120 which can take into account the pixel position and eventually the frame parity as temporal component for the computation of the dithering value.
  • the dithering block 120 is controlled by a control signal C delivered by a control unit 180.
  • the video signals R 1 , G 1 , B 1 subjected to the dithering in the dithering block 120 are output as signals R 2 , G 2 , B 2 and are forwarded to a sub-field coding unit 14 which performs sub-field coding under the control of the control unit 180.
  • the sub-field signals for each colour output from the sub-field coding unit 140 are indicated by reference signs SF R , SF G , SF B .
  • these sub-field code words for one line are all collected in order to create a single very long code word which can be used for the linewise PDP addressing. This is carried out in a serial to parallel conversion unit 160 which is itself controlled by the plasma control unit 180. Furthermore, the control unit 180 generates all scan and sustain pulses for PDP control. It receives horizontal and vertical synchronizing signals for reference timing.
  • Figure 3 illustrates a possible implementation of the dithering block 120. It comprises a detection circuit 121 to detect the presence of a checker pattern in the video information delivered by the gamma function block 100, a selection circuit 122 for selecting a default dithering function or another predetermined function depending on the results delivered by the detection circuit 121 and a dithering block 123 to apply the selected dithering function to the video information coming from the gamma function block 100.
  • the dithering functions are for example patterns stored in a memory 124.
  • the invention is not restricted to the disclosed embodiments and particularly to Plasma Display Panels. It can be applied to other types of display panels like LCDs or DLP projectors.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
EP07301059A 2007-05-21 2007-05-21 Verfahren zur Anwendung von Dithering für Videodaten und Anzeigevorrichtung mit diesem Verfahren Withdrawn EP1995712A1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP07301059A EP1995712A1 (de) 2007-05-21 2007-05-21 Verfahren zur Anwendung von Dithering für Videodaten und Anzeigevorrichtung mit diesem Verfahren

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP07301059A EP1995712A1 (de) 2007-05-21 2007-05-21 Verfahren zur Anwendung von Dithering für Videodaten und Anzeigevorrichtung mit diesem Verfahren

Publications (1)

Publication Number Publication Date
EP1995712A1 true EP1995712A1 (de) 2008-11-26

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EP07301059A Withdrawn EP1995712A1 (de) 2007-05-21 2007-05-21 Verfahren zur Anwendung von Dithering für Videodaten und Anzeigevorrichtung mit diesem Verfahren

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113485662A (zh) * 2021-07-06 2021-10-08 维沃移动通信有限公司 防抖方法和电子设备

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0497304A2 (de) * 1991-01-30 1992-08-05 Mitsubishi Denki Kabushiki Kaisha Bildverarbeitungsgerät
US20050219176A1 (en) * 2004-03-31 2005-10-06 Song Byung C Dithering method and apparatus for liquid crystal display panel
JP2007041475A (ja) * 2005-08-05 2007-02-15 Matsushita Electric Ind Co Ltd 画像表示装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0497304A2 (de) * 1991-01-30 1992-08-05 Mitsubishi Denki Kabushiki Kaisha Bildverarbeitungsgerät
US20050219176A1 (en) * 2004-03-31 2005-10-06 Song Byung C Dithering method and apparatus for liquid crystal display panel
JP2007041475A (ja) * 2005-08-05 2007-02-15 Matsushita Electric Ind Co Ltd 画像表示装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113485662A (zh) * 2021-07-06 2021-10-08 维沃移动通信有限公司 防抖方法和电子设备

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