EP1980945A4 - Memory access control apparatus and memory access control method - Google Patents

Memory access control apparatus and memory access control method

Info

Publication number: EP1980945A4
Authority: EP; European Patent Office
Prior art keywords: access control; memory access; control method; control apparatus; memory
Prior art date: 2006-01-31
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Granted

Application number

EP06712717A

Other languages

German (de)

French (fr)

Other versions

EP1980945A1 (en

EP1980945B1 (en

Inventor

Hiroyuki Kojima

Tomoyuki Okawa

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Fujitsu Ltd

Original Assignee

Fujitsu Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2006-01-31

Filing date

2006-01-31

Publication date

2009-09-16

2006-01-31 Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd

2008-10-15 Publication of EP1980945A1 publication Critical patent/EP1980945A1/en

2009-09-16 Publication of EP1980945A4 publication Critical patent/EP1980945A4/en

2011-03-09 Application granted granted Critical

2011-03-09 Publication of EP1980945B1 publication Critical patent/EP1980945B1/en

Status Not-in-force legal-status Critical Current

2026-01-31 Anticipated expiration legal-status Critical

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G06F12/121—Replacement control using replacement algorithms
- G06F12/128—Replacement control using replacement algorithms adapted to multidimensional cache systems, e.g. set-associative, multicache, multiset or multilevel
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G06F12/121—Replacement control using replacement algorithms
- G06F12/122—Replacement control using replacement algorithms of the least frequently used [LFU] type, e.g. with individual count value

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Memory System Of A Hierarchy Structure (AREA)

EP06712717A 2006-01-31 2006-01-31 Memory access control apparatus and memory access control method Not-in-force EP1980945B1 (en)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
PCT/JP2006/301574 WO2007088591A1 (en)	2006-01-31	2006-01-31	Memory access control apparatus and memory access control method

Publications (3)

Publication Number	Publication Date
EP1980945A1 EP1980945A1 (en)	2008-10-15
EP1980945A4 true EP1980945A4 (en)	2009-09-16
EP1980945B1 EP1980945B1 (en)	2011-03-09

Family

ID=38327178

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
EP06712717A Not-in-force EP1980945B1 (en)	2006-01-31	2006-01-31	Memory access control apparatus and memory access control method

Country Status (7)

Country	Link
US (1)	US20080301372A1 (en)
EP (1)	EP1980945B1 (en)
JP (1)	JP4297961B2 (en)
KR (1)	KR100987996B1 (en)
CN (1)	CN101336419A (en)
DE (1)	DE602006020631D1 (en)
WO (1)	WO2007088591A1 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP2010262496A (en)	2009-05-08	2010-11-18	Fujitsu Ltd	Memory control method and memory control device
CN102521161B (en) *	2011-11-21	2015-01-21	华为技术有限公司	Data caching method, device and server
US9715461B2 (en)	2014-03-03	2017-07-25	Kabushiki Kaisha Toshiba	Cache memory control circuit and processor
US10095437B2 (en) *	2015-08-03	2018-10-09	Intel Corporation	Memory access control
JP6770230B2 (en) *	2016-09-30	2020-10-14	富士通株式会社	Arithmetic processing unit, information processing unit, control method of arithmetic processing unit
JP6947974B2 (en)	2017-09-13	2021-10-13	富士通株式会社	Arithmetic processing unit and control method of arithmetic processing unit
CN108920192B (en) *	2018-07-03	2021-07-30	中国人民解放军国防科技大学	Cache data consistency implementation method and device based on distributed limited directory
US11914516B1 (en) *	2022-08-30	2024-02-27	Micron Technology, Inc.	Memory side cache request handling

Citations (1)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US20040078702A1 (en) *	2002-06-28	2004-04-22	Fujitsu Limited	Cache memory device and reference history bit error detection method

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5815877B2 (en) *	1978-12-05	1983-03-28	富士通株式会社	Buffer memory control method
JPS5914826B2 (en)	1979-11-26	1984-04-06	富士通株式会社	Buffer memory control method
JP3100807B2 (en) *	1992-09-24	2000-10-23	松下電器産業株式会社	Cache memory device
KR960006484B1 (en) *	1992-09-24	1996-05-16	마쯔시다 덴기 산교 가부시끼가이샤	Cache memory device
JP2001051899A (en)	1999-08-12	2001-02-23	Hitachi Ltd	Cache memory device
US6401175B1 (en) *	1999-10-01	2002-06-04	Sun Microsystems, Inc.	Shared write buffer for use by multiple processor units
JP2002082832A (en) *	2000-09-08	2002-03-22	Nec Corp	Cache updating method, cache update control system and recording medium

2006
- 2006-01-31 EP EP06712717A patent/EP1980945B1/en not_active Not-in-force
- 2006-01-31 KR KR1020087018987A patent/KR100987996B1/en not_active IP Right Cessation
- 2006-01-31 CN CNA2006800520033A patent/CN101336419A/en active Pending
- 2006-01-31 DE DE602006020631T patent/DE602006020631D1/en active Active
- 2006-01-31 JP JP2007556731A patent/JP4297961B2/en not_active Expired - Fee Related
- 2006-01-31 WO PCT/JP2006/301574 patent/WO2007088591A1/en active Application Filing
2008
- 2008-07-31 US US12/222,056 patent/US20080301372A1/en not_active Abandoned

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US20040078702A1 (en) *	2002-06-28	2004-04-22	Fujitsu Limited	Cache memory device and reference history bit error detection method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2007088591A1 *

Also Published As

Publication number	Publication date
EP1980945A1 (en)	2008-10-15
DE602006020631D1 (en)	2011-04-21
EP1980945B1 (en)	2011-03-09
JPWO2007088591A1 (en)	2009-06-25
WO2007088591A1 (en)	2007-08-09
KR100987996B1 (en)	2010-10-18
US20080301372A1 (en)	2008-12-04
JP4297961B2 (en)	2009-07-15
KR20080089622A (en)	2008-10-07
CN101336419A (en)	2008-12-31

Publication	Publication Date	Title
GB2461803B (en)	2012-12-12	Data access control method and data access control apparatus
TWI369612B (en)	2012-08-01	Storage device and storage device access control method
EP2071468A4 (en)	2010-11-03	Memory control device, memory device, and memory control method
EP2016553A4 (en)	2011-06-29	Apparatus for access control and processing
TWI348644B (en)	2011-09-11	Update-startup apparatus and update-startup control method
EP2075706A4 (en)	2009-11-18	Memory device and refresh adjusting method
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IL200076A0 (en)	2010-04-15	Method and apparatus for securing location information and access control using the location information
GB2445249B (en)	2010-08-04	Apparatus and method for fast and secure memory context switching
EP2054803A4 (en)	2009-10-21	Memory circuit system and method
IL186614A0 (en)	2008-01-20	Memory repair system and method
GB2430778B (en)	2010-10-27	System and method for throttling memory accesses
GB2422926B (en)	2008-10-01	Data processing apparatus and method for controlling access to memory
EP1912222A4 (en)	2009-05-13	Memory control method and memory system
GB2427721B (en)	2007-12-12	System and method for communicating with memory devices
TWI370361B (en)	2012-08-11	Memory access controlling apparatus and control method thereof
EP1980945A4 (en)	2009-09-16	Memory access control apparatus and memory access control method
GB2443212B (en)	2009-09-16	Access control system and method
TWI347610B (en)	2011-08-21	Memory control circuit and related method
GB2441276B (en)	2010-03-10	Multiple media access control apparatus and method
TWI318369B (en)	2009-12-11	Multi-functional storage apparatus and control method thereof
EP2096507A4 (en)	2009-12-09	Servo control apparatus and control method thereof
EP1862906A4 (en)	2009-01-07	Cache memory control method and cache memory control device
SG138585A1 (en)	2008-01-28	Memory access control apparatus and method, and communication apparatus
EP1988466A4 (en)	2009-12-23	Cache memory device and cache memory control method

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Date	Code	Title	Description
2008-09-12	PUAI	Public reference made under article 153(3) epc to a published international application that has entered the european phase	Free format text: ORIGINAL CODE: 0009012
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2009-03-04	DAX	Request for extension of the european patent (deleted)
2009-03-04	RBV	Designated contracting states (corrected)	Designated state(s): DE FR GB
2009-09-16	A4	Supplementary search report drawn up and despatched	Effective date: 20090817
2010-05-19	RIC1	Information provided on ipc code assigned before grant	Ipc: G06F 12/08 20060101AFI20100409BHEP Ipc: G06F 12/12 20060101ALI20100409BHEP
2010-08-31	GRAP	Despatch of communication of intention to grant a patent	Free format text: ORIGINAL CODE: EPIDOSNIGR1
2011-01-17	GRAS	Grant fee paid	Free format text: ORIGINAL CODE: EPIDOSNIGR3
2011-02-04	GRAA	(expected) grant	Free format text: ORIGINAL CODE: 0009210
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