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EP1720384A3 - Plaque à circuit imprimé - Google Patents

Plaque à circuit imprimé Download PDF

Info

Publication number
EP1720384A3
EP1720384A3 EP06252299A EP06252299A EP1720384A3 EP 1720384 A3 EP1720384 A3 EP 1720384A3 EP 06252299 A EP06252299 A EP 06252299A EP 06252299 A EP06252299 A EP 06252299A EP 1720384 A3 EP1720384 A3 EP 1720384A3
Authority
EP
European Patent Office
Prior art keywords
ground lines
ground
another
circuit board
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP06252299A
Other languages
German (de)
English (en)
Other versions
EP1720384A2 (fr
EP1720384B1 (fr
Inventor
Mitsuru c/o Nitto Denko Corporation Honjo
Yuki c/o Nitto Denko Corporation Saitou
Yoshifumi c/o Nitto Denko Corporation Morita
Yoshifumi c/o Nitto Denko Corporation Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nitto Denko Corp
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Publication of EP1720384A2 publication Critical patent/EP1720384A2/fr
Publication of EP1720384A3 publication Critical patent/EP1720384A3/fr
Application granted granted Critical
Publication of EP1720384B1 publication Critical patent/EP1720384B1/fr
Not-in-force legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/025Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0253Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224Patterned shielding planes, ground planes or power planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0393Flexible materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09218Conductive traces
    • H05K2201/09236Parallel layout
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09681Mesh conductors, e.g. as a ground plane
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24926Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including ceramic, glass, porcelain or quartz layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Chemical And Physical Treatments For Wood And The Like (AREA)
  • Polysaccharides And Polysaccharide Derivatives (AREA)
EP06252299A 2005-04-28 2006-04-28 Plaque à circuit imprimé Not-in-force EP1720384B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005131308A JP3872084B2 (ja) 2005-04-28 2005-04-28 配線回路基板

Publications (3)

Publication Number Publication Date
EP1720384A2 EP1720384A2 (fr) 2006-11-08
EP1720384A3 true EP1720384A3 (fr) 2007-11-21
EP1720384B1 EP1720384B1 (fr) 2010-09-29

Family

ID=36999884

Family Applications (1)

Application Number Title Priority Date Filing Date
EP06252299A Not-in-force EP1720384B1 (fr) 2005-04-28 2006-04-28 Plaque à circuit imprimé

Country Status (6)

Country Link
US (1) US7473854B2 (fr)
EP (1) EP1720384B1 (fr)
JP (1) JP3872084B2 (fr)
CN (1) CN1856214B (fr)
AT (1) ATE483352T1 (fr)
DE (1) DE602006017141D1 (fr)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008124317A (ja) * 2006-11-14 2008-05-29 Toshiba Matsushita Display Technology Co Ltd フレキシブルプリント基板
US8256111B2 (en) * 2006-12-22 2012-09-04 Hon Hai Precision Industry Co., Ltd. Circuit board layout method
CN101207968B (zh) * 2006-12-22 2011-11-09 鸿富锦精密工业(深圳)有限公司 电路板
EP2112871B1 (fr) * 2008-04-22 2016-07-13 Hon Hai Precision Industry Co., Ltd. Carte de circuit imprimé avec une couche de terre améliorée
CN101594732A (zh) * 2008-05-27 2009-12-02 鸿富锦精密工业(深圳)有限公司 电路板
JP4399019B1 (ja) * 2008-07-31 2010-01-13 株式会社東芝 電子機器、フレキシブルプリント配線板、およびフレキシブルプリント配線板の製造方法
CN102257684A (zh) * 2009-01-16 2011-11-23 株式会社藤仓 连接器以及线缆组件
WO2011007660A1 (fr) 2009-07-13 2011-01-20 株式会社村田製作所 Ligne de signal et carte de circuit imprimé
JP2012094646A (ja) * 2010-10-26 2012-05-17 Daisho Denshi Co Ltd 特性インピーダンスコントロール対応プリント配線基板
USD720310S1 (en) * 2011-06-17 2014-12-30 Soraa, Inc. Triangular semiconductor die
KR20130033868A (ko) * 2011-09-27 2013-04-04 삼성전기주식회사 메쉬 패턴을 갖는 패키지 기판 및 그 제조방법
US8791371B2 (en) 2011-11-28 2014-07-29 International Business Machines Corporation Mesh planes with alternating spaces for multi-layered ceramic packages
US8952263B2 (en) * 2012-08-10 2015-02-10 Eastman Kodak Company Micro-wire electrode pattern
US20140216783A1 (en) * 2013-02-05 2014-08-07 David P. Trauernicht Micro-wire pattern with offset intersections
US20140216790A1 (en) * 2013-02-05 2014-08-07 David P. Trauernicht Conductive micro-wire structure with offset intersections
TWI457055B (zh) * 2013-02-20 2014-10-11 Novatek Microelectronics Corp 軟性電路板及其接地線結構
US9536848B2 (en) * 2014-10-16 2017-01-03 Globalfoundries Inc. Bond pad structure for low temperature flip chip bonding
JP6745712B2 (ja) 2016-11-30 2020-08-26 日東電工株式会社 配線回路基板およびその製造方法
JP6987700B2 (ja) * 2018-05-29 2022-01-05 京セラ株式会社 印刷配線板
EP4329438A1 (fr) * 2021-08-05 2024-02-28 Samsung Electronics Co., Ltd. Élément de connexion flexible et dispositif électronique comprenant celui-ci
CN114786328B (zh) * 2022-05-23 2024-04-30 西安易朴通讯技术有限公司 多层印制电路板

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4855537A (en) * 1987-09-25 1989-08-08 Kabushiki Kaisha Toshiba Wiring substrate having mesh-shaped earth line
JPH07302979A (ja) * 1994-05-10 1995-11-14 Toshiba Corp 多層配線基板
JPH09275251A (ja) * 1996-04-03 1997-10-21 Fujitsu Ltd プリント配線板
US6184478B1 (en) * 1998-09-30 2001-02-06 Adtec Corporation Printed wiring device with base layer having a grid pattern
US20020040807A1 (en) * 2000-09-29 2002-04-11 Doberenz Philip W. Method of making higher impedance traces on low impedance circuit board

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05152768A (ja) 1991-11-27 1993-06-18 Nec Corp 多層構造基板
JPH05343820A (ja) 1992-06-04 1993-12-24 Toshiba Corp マルチチップモジュール用回路基板
JPH06326476A (ja) 1993-05-13 1994-11-25 Sony Corp 多層配線基板
JPH07202359A (ja) 1993-12-30 1995-08-04 Sony Corp 回路基板
JPH11298149A (ja) 1998-04-09 1999-10-29 Sumitomo Metal Ind Ltd 多層配線基板
TW476229B (en) 1998-08-24 2002-02-11 Adv Flexible Circuits Co Ltd Circuit board having shielding plate with empty-hole opening pattern to control impedance and transmission time
JP2003133659A (ja) 2001-10-19 2003-05-09 Kazunori Aoki 屈曲性能を具備した高周波用フレキシブルプリント配線板

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4855537A (en) * 1987-09-25 1989-08-08 Kabushiki Kaisha Toshiba Wiring substrate having mesh-shaped earth line
JPH07302979A (ja) * 1994-05-10 1995-11-14 Toshiba Corp 多層配線基板
JPH09275251A (ja) * 1996-04-03 1997-10-21 Fujitsu Ltd プリント配線板
US6184478B1 (en) * 1998-09-30 2001-02-06 Adtec Corporation Printed wiring device with base layer having a grid pattern
US20020040807A1 (en) * 2000-09-29 2002-04-11 Doberenz Philip W. Method of making higher impedance traces on low impedance circuit board

Also Published As

Publication number Publication date
EP1720384A2 (fr) 2006-11-08
US20060246268A1 (en) 2006-11-02
JP2006310545A (ja) 2006-11-09
CN1856214A (zh) 2006-11-01
JP3872084B2 (ja) 2007-01-24
US7473854B2 (en) 2009-01-06
CN1856214B (zh) 2010-09-01
EP1720384B1 (fr) 2010-09-29
DE602006017141D1 (de) 2010-11-11
ATE483352T1 (de) 2010-10-15

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