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EP1119906B1 - Method and apparatus for preventing power amplifier saturation - Google Patents

Method and apparatus for preventing power amplifier saturation Download PDF

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Publication number
EP1119906B1
EP1119906B1 EP99951329A EP99951329A EP1119906B1 EP 1119906 B1 EP1119906 B1 EP 1119906B1 EP 99951329 A EP99951329 A EP 99951329A EP 99951329 A EP99951329 A EP 99951329A EP 1119906 B1 EP1119906 B1 EP 1119906B1
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EP
European Patent Office
Prior art keywords
power amplifier
amplifier
voltage
output
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP99951329A
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German (de)
French (fr)
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EP1119906A1 (en
Inventor
Lars Thomas Hansson
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Telefonaktiebolaget LM Ericsson AB
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Telefonaktiebolaget LM Ericsson AB
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H03F1/0216Continuous control
    • H03F1/0233Continuous control by using a signal derived from the output signal, e.g. bootstrapping the voltage supply

Definitions

  • the present invention generally relates to radiocommunication systems and, more specifically, to an apparatus and associated method for efficiently controlling power amplifiers within radio transmitters in cellular systems.
  • PCN personal communication networks
  • FDMA frequency division multiple access
  • TDMA time division multiple access
  • a channel In most TDMA systems, a channel consists of a time slot in a periodic train of time intervals over the same frequency. Each period of time slots is called a frame. A given signal's energy is confined to one of these time slots. Adjacent channel interference is limited by the use of a time gate or other synchronization element that only passes signal energy received at the proper time. Thus, the portion of the interference from different relative signal strength levels is reduced.
  • Capacity in a TDMA system is increased by compressing the transmission signal into a shorter time slot.
  • the information must be transmitted at a correspondingly faster bit rate which increases the amount of occupied spectrum proportionally.
  • CDMA code division multiple access
  • PAs Power amplifiers
  • the power level at which the RF signal is transmitted is normally set to one of several predefined power level increments which is based upon the power level of a received transmission at a base station. The more accurate the PA in the amplification of these signals to the predefined power levels, the more efficient the transmitter operation.
  • One goal in power amplifier operation is to reduce the power dissipation that occurs.
  • the voltage supplied to the amplifier is reduced via control techniques.
  • the amplifier can be brought into a saturated state. The power amplifier would then act nonlinearly, causing distortion of the output signal.
  • U.S. Patent No. 5,430,410 describes the use of an envelope detector to detect the output of a power amplifier.
  • the output signal of the power amplifier is compared to the input side of a power amplifier.
  • the difference between the output and input is used to control the bias level of the power amplifier in order to maintain linear operation of a saturated power amplifier and thereby reduce distortion.
  • this document does not address increasing efficiency in a power amplifier before saturation.
  • the abstract of SU 1417174 is believed to describe the power amplification of signals in radio communication devices which attempts to improve amplifier operation and reduce distortion by inserting a differential amplifier between a power amplifier's inverting input and the output of the power amplifier.
  • the inputs into the differential amplifier are a peak detected value of the output of amplifier and the difference between the peak value of the amplifier and a changing voltage value.
  • the effect of this circuit is to reduce distortion by adjusting the supply voltage to compensate for the change in the bias level of the preceding amplifier stage.
  • Exemplary embodiments of the invention employ an amplifier and control circuit which comprises a power amplifier powered by a voltage supply, a peak detector which detects a peak amplitude of an output voltage of said power amplifier, and a differential amplifier which compares the amplitude of the output of said power amplifier to a constant reference voltage and outputs a corrected voltage supply signal.
  • a method of controlling a power amplifier circuit comprises detecting a peak amplitude of an output voltage from a power amplifier in said power amplifier circuit, comparing the detected amplitude of the output voltage to a constant reference voltage, outputting a corrected voltage signal and controlling a voltage supply of said power amplifier circuit based upon the corrected voltage signal.
  • Additional embodiments of the present invention include a communications device which comprises a transmitter for transmitting an outgoing signal and a receiver for receiving an incoming signal, where the transmitter further comprises a power amplifier to amplify said outgoing signals before transmission, a peak detector which detects a peak amplitude of an output of said power amplifier, and a differential amplifier which compares the amplitude of the output of said power amplifier to a reference voltage and outputs a corrected signal to be input to said power amplifier.
  • FIG. 1 A schematic diagram of a typical power amplifier circuit 110 is shown in Figure 1 that can be employed within a typical signal transmission system.
  • An RF input signal, RF IN is input to a power amplifier 112 of the power amplifier circuit 110 in order to be amplified for transmission.
  • the power amplifier 112 comprises an NPN bipolar junction transistor (BJT) shown in Figure 1. Additionally, the BJT has a base 116, a emitter 118 and an collector 113.
  • Collector 113 has an inductor 114 connected between the emitter and a supply voltage, V CC . The purpose of the inductor 114 is to act as a current source. The voltage across the inductor reflects the rate of bias change in the transistor.
  • BJT NPN bipolar junction transistor
  • NPN transistor While an NPN transistor is shown, it would be apparent to one of ordinary skill to employ a PNP transistor or any other active amplification element such as a field-effect transistor (FET) in order to amplify an RF input signal. It should also be understood that the amplification of the RF IN signal does not necessarily require only one transistor. Instead, it is possible that multiple transistors or FET devices could be employed to properly amplify RF IN . For example, a multiple transistor arrangement such as a Darlington arrangement could also be employed to amplify the signal. As such, the transistor illustrated in Figure 1 can represent only the output stage of the entire power amplifier 112.
  • FET field-effect transistor
  • the power amplifier circuit 110 also comprises an impedance matching network 130 located on the output of the power amplifier 112.
  • the impedance matching network 130 further comprises an array of inductors 120 and 122 and an array of capacitors 124, 126 and 128.
  • the purpose of the impedance matching network is to match the load of the power amplifier for optimal signal output and achieve the required signal gain from the output of the power amplifier 112.
  • an output filter such as an RC circuit (not shown in the present embodiment) can also be employed to filter the output signal of unwanted noise.
  • the amplified output signal, RF OUT is then coupled to an antenna and transmitted to a receiver (not shown).
  • V S the maximum amplitude of the output swing that can occur is the rated voltage of the supply voltage V CC minus the saturation voltage, V S .
  • the saturation voltage is the voltage at which the transistor enters a saturated mode.
  • V S i.e., the voltage drop across the collector and emitter of the power amplifier 112 is approximately 0.2 Volts.
  • a graphical representation of a sinusoidal output voltage, V OUT , of the transistor of power amplifier 112 shows the margin to saturation when employing an exemplary 4.8V voltage supply. If the voltage supply is reduced, the signal as shown in Figure 2A is shifted toward the x-axis. Alternatively, if the voltage supply were increased, the output voltage illustrated in Figure 2A would shift away, vertically, from the x-axis. Input power to the power amplifier can be increased (or the supply voltage to the power amplifier can be decreased) as the lowest peaks of the voltage supply approach zero, as long as the voltage swing of the output voltage, V OUT does not cross the 0.2V level on the y-axis of the graph.
  • V CC the supply voltage
  • I CC bias current
  • the power amplifier control circuit 300 includes a peak detector 310, a differential amplifier 320 and loop filter 330. These elements are employed to ensure that the voltage supply, V CC , is decreased while not sending the power amplifier 112 into a saturated state.
  • the peak detector 310 includes a resistor 312 in series with a diode 314 on an input line from the output of the power amplifier 112. Additionally, a second resistor 316 is placed in parallel with a capacitor 318 each receiving voltage from the voltage supply, V CC .
  • the peak detector 310 is designed to follow the minimum envelope, i.e., to identify the negative peaks in the output from the power amplifier 112. This enables the system of the present invention to determine if the voltage supply is getting too close to the "clipping" voltage which would send the power amplifier 112 into saturation.
  • the peak detected voltage value detected in peak detector 310 is output to an inverting input of the differential amplifier 320.
  • the peak detected voltage value is then compared to a voltage reference value, V REF .
  • the differential amplifier 320 controls the voltage supply to ensure optimum power amplifier operation to thereby keep a distance to the point of saturation.
  • the difference signal which is output from the differential amplifier 320 is sent, via a loop filter 330 (a resistance 332 in series with a capacitance 334), to control the V CC value input into power amplifier 112.
  • the loop filter is employed to restrict the signal bandwidth to a specific level in order to prevent the loop from being unstable and to attenuate transient signals and noise signals.
  • the voltage reference value sets the margin between the amplifier's operating point and saturation.
  • the voltage reference value is chosen so that the distance between the lowest envelope of V OUT and the point of saturation is kept to a value that is greater than zero.
  • This reference voltage can be adjusted and optimized using a temperature coefficient to account for temperature deviations in the power amplifier and/or peak detector.
  • power amplifier circuits according to the present invention may be used in, for example, cellular telephone units. These devices can be used to amplify and transmit messages at different power levels used to support communications between mobile and base stations in radio communication systems.
  • Figure 4 represents a block diagram of an exemplary cellular mobile radio telephone system according to one embodiment of the present invention in which power amplifiers described above can be used to generate RF signals for data transmission.
  • the system shows an exemplary base station 910 and a mobile 920.
  • the base station includes a control and processing unit 930 which is connected to the MSC 940 which in turn is connected to the public switched telephone network (not shown).
  • the base station 910 for a cell includes a plurality of voice channels handled by voice channel transceiver 950 which is controlled by the control and processing unit 930. Also, each base station includes a control channel transceiver 960 which may be capable of handling more than one control channel. The control channel transceiver 960 is controlled by the control and processing unit 930. The control channel transceiver 960 broadcasts control information over the control channel of the base station or cell to mobiles locked to that control channel. The voice channel transceiver handles the traffic or voice channels which can include digital control channel location information as described previously.
  • the mobile 920 When the mobile 920 first enters the idle mode, it periodically scans the control channels of base stations like base station 910 to determine which cell to lock on or camp to. The mobile 920 receives the absolute and relative information broadcasted on a control channel at its voice and control channel transceiver 970. Then, the processing unit 980 evaluates the received control channel information which includes the characteristics of the candidate cells and determines which cell the mobile should lock to. The received control channel information not only includes absolute information concerning the cell with which it is associated, but also contains relative information concerning other cells proximate to the cell with which the control channel is associated. These adjacent cells are periodically scanned while monitoring the primary control channel to determine if there is a more suitable candidate. Additional information relating to specifics of mobile and base station implementations can be found in U.S. Patent Application Serial No. 07/967,027 entitled "Multi-Mode Signal Processing" filed on October 27, 1992 to P. Dent and B. Ekelund.
  • satellites could transmit and receive data in communication with remote devices, including portable units, PCS devices, personal digital assistants, etc.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Transmitters (AREA)
  • Amplifiers (AREA)
  • Control Of Amplification And Gain Control (AREA)

Description

    BACKGROUND
  • The present invention generally relates to radiocommunication systems and, more specifically, to an apparatus and associated method for efficiently controlling power amplifiers within radio transmitters in cellular systems.
  • The cellular telephone industry has made phenomenal strides in commercial operations in the United States as well as the rest of the world. Growth in major metropolitan areas has far exceeded expectations and is outstripping system capacity.
  • If this trend continues, the effects of rapid growth will soon reach even the smallest markets. Innovative solutions are required to meet these increasing capacity needs as well as to maintain high quality service and avoid rising prices.
  • Throughout the world, one important step in cellular systems is to change from analog to digital transmissions. Equally important is the choice of an effective digital transmission scheme for implementing the next generation of cellular technology. Furthermore, it is widely believed that the first generation of personal communication networks (PCN) (employing low cost, pocket-sized, cordless telephones that can be carried comfortably and used to make and receive calls in the home, office, street, car, etc.), would be provided by the cellular carriers using the next generation digital cellular system infrastructure and the cellular frequencies. The key feature demanded in these new systems is increased traffic capacity.
  • Currently, channel access is most commonly achieved using frequency division multiple access (FDMA) and time division multiple access (TDMA) methods. In FDMA, a communication channel is a single radio frequency band into which a signal's transmission power is concentrated. Interference with adjacent channels is limited by the use of bandpass filters which only pass signal energy within the specified frequency band. Thus, with each channel being assigned a different frequency, system capacity is limited by the available frequencies.
  • In most TDMA systems, a channel consists of a time slot in a periodic train of time intervals over the same frequency. Each period of time slots is called a frame. A given signal's energy is confined to one of these time slots. Adjacent channel interference is limited by the use of a time gate or other synchronization element that only passes signal energy received at the proper time. Thus, the portion of the interference from different relative signal strength levels is reduced.
  • Capacity in a TDMA system is increased by compressing the transmission signal into a shorter time slot. As a result, the information must be transmitted at a correspondingly faster bit rate which increases the amount of occupied spectrum proportionally.
  • With FDMA or TDMA systems, or a hybrid FDMA/TDMA system, it is desirable to avoid the case where two potentially interfering signals occupy the same frequency at the same time. In contrast, code division multiple access (CDMA) allows signals to overlap in both time and frequency. Thus, all CDMA signals share the same frequency spectrum. In either the frequency or the time domain, the multiple access signals appear to be on top of each other.
  • For all such systems, but especially CDMA systems, power control is an important technique for balancing the desire to provide an end user with a sufficiently strong signal while at the same time not causing too much interference to other users. Power amplifiers (PAs) are widely utilized in radio transmitters in order to amplify an unamplified RF signal to a predefined power level at which the RF signal is to be transmitted. The power level at which the RF signal is transmitted is normally set to one of several predefined power level increments which is based upon the power level of a received transmission at a base station. The more accurate the PA in the amplification of these signals to the predefined power levels, the more efficient the transmitter operation.
  • One goal in power amplifier operation is to reduce the power dissipation that occurs. To reduce the power dissipation within a power amplifier, the voltage supplied to the amplifier is reduced via control techniques. However, when the supply voltage is reduced too much, the amplifier can be brought into a saturated state. The power amplifier would then act nonlinearly, causing distortion of the output signal.
  • While there have been attempts to increase power amplifier efficiency and power output, they have not been fully successful. For example, U.S. Patent No. 5,430,410 describes the use of an envelope detector to detect the output of a power amplifier. The output signal of the power amplifier is compared to the input side of a power amplifier. The difference between the output and input is used to control the bias level of the power amplifier in order to maintain linear operation of a saturated power amplifier and thereby reduce distortion. However, this document does not address increasing efficiency in a power amplifier before saturation.
  • U.S. Patent No. 4,631,491 describes a bipolar transistor RF power amplifier in which feedback is used to control simultaneously the amplitude and phase distortion. However, this patent is not able to comprehensively avoid amplifier saturation.
  • Additionally, the abstract of SU 1417174 is believed to describe the power amplification of signals in radio communication devices which attempts to improve amplifier operation and reduce distortion by inserting a differential amplifier between a power amplifier's inverting input and the output of the power amplifier. The inputs into the differential amplifier are a peak detected value of the output of amplifier and the difference between the peak value of the amplifier and a changing voltage value. The effect of this circuit is to reduce distortion by adjusting the supply voltage to compensate for the change in the bias level of the preceding amplifier stage.
  • None of the present power amplifiers and associated control circuits known by Applicant operate to reduce the power supply voltage thereby initiating a reduction in power dissipation and overall temperature of the mobile unit, while at the same time avoiding saturating the amplifier. Additionally, the current consumption from the battery which powers a mobile employing a power amplifier is reduced, thereby improving its performance. Thus, there is a need for a system that can utilize the advantages provided by a non-saturated power amplifier which is highly efficient.
  • SUMMARY
  • It is therefore an object of the present invention to provide a power amplifier having a reduced voltage supply which, in turn, reduces amplifier power dissipation and which can be efficiently used by a communication device during signal transmission. It is a further object of the present invention to provide a circuit for controlling the power amplifier which addresses the problems associated with reducing power dissipation and distortion while increasing power amplifier efficiency and ensuring that the power amplifier is not saturated.
  • Exemplary embodiments of the invention employ an amplifier and control circuit which comprises a power amplifier powered by a voltage supply, a peak detector which detects a peak amplitude of an output voltage of said power amplifier, and a differential amplifier which compares the amplitude of the output of said power amplifier to a constant reference voltage and outputs a corrected voltage supply signal.
  • In yet another exemplary embodiment of the present invention a method of controlling a power amplifier circuit is described which comprises detecting a peak amplitude of an output voltage from a power amplifier in said power amplifier circuit, comparing the detected amplitude of the output voltage to a constant reference voltage, outputting a corrected voltage signal and controlling a voltage supply of said power amplifier circuit based upon the corrected voltage signal.
  • Additional embodiments of the present invention include a communications device which comprises a transmitter for transmitting an outgoing signal and a receiver for receiving an incoming signal, where the transmitter further comprises a power amplifier to amplify said outgoing signals before transmission, a peak detector which detects a peak amplitude of an output of said power amplifier, and a differential amplifier which compares the amplitude of the output of said power amplifier to a reference voltage and outputs a corrected signal to be input to said power amplifier.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • These and other features, objects and advantages associated with the present invention will be more readily understood upon reading the following detailed description, when read in conjunction with the drawings in which like reference numerals refer to like elements and where:
  • Figure 1 is a schematic diagram of a known power amplifier circuit that can be used in a transmitter;
  • Figure 2A is a graph of the output voltage swing of a power amplifier in a non-saturated mode;
  • Figure 2B is a graph of the output voltage swing of a power amplifier in a saturated mode;
  • Figure 3 is a schematic diagram of a power amplifier circuit and a feedback circuit in accordance with an exemplary embodiment of the present invention; and
  • Figure 4 is a block diagram of a cellular mobile radiotelephone system in accordance with an exemplary embodiment of the present invention.
  • DESCRIPTION
  • The present invention will now be described with reference to the accompanying drawings, in which various exemplary embodiments of the invention are shown. However, this invention may be embodied in many different forms and should not be construed as limited to the specific embodiments shown.
  • A schematic diagram of a typical power amplifier circuit 110 is shown in Figure 1 that can be employed within a typical signal transmission system. An RF input signal, RFIN, is input to a power amplifier 112 of the power amplifier circuit 110 in order to be amplified for transmission. The power amplifier 112 comprises an NPN bipolar junction transistor (BJT) shown in Figure 1. Additionally, the BJT has a base 116, a emitter 118 and an collector 113. Collector 113 has an inductor 114 connected between the emitter and a supply voltage, VCC. The purpose of the inductor 114 is to act as a current source. The voltage across the inductor reflects the rate of bias change in the transistor. While an NPN transistor is shown, it would be apparent to one of ordinary skill to employ a PNP transistor or any other active amplification element such as a field-effect transistor (FET) in order to amplify an RF input signal. It should also be understood that the amplification of the RFIN signal does not necessarily require only one transistor. Instead, it is possible that multiple transistors or FET devices could be employed to properly amplify RFIN. For example, a multiple transistor arrangement such as a Darlington arrangement could also be employed to amplify the signal. As such, the transistor illustrated in Figure 1 can represent only the output stage of the entire power amplifier 112.
  • The power amplifier circuit 110 also comprises an impedance matching network 130 located on the output of the power amplifier 112. The impedance matching network 130 further comprises an array of inductors 120 and 122 and an array of capacitors 124, 126 and 128. The purpose of the impedance matching network is to match the load of the power amplifier for optimal signal output and achieve the required signal gain from the output of the power amplifier 112.
  • Additionally, an output filter such as an RC circuit (not shown in the present embodiment) can also be employed to filter the output signal of unwanted noise. The amplified output signal, RFOUT, is then coupled to an antenna and transmitted to a receiver (not shown).
  • When the power amplifier 112 is at maximum output power, the maximum amplitude of the output swing that can occur is the rated voltage of the supply voltage VCC minus the saturation voltage, VS. The saturation voltage is the voltage at which the transistor enters a saturated mode. Generally, for a bipolar junction transistor, such as the one described above with respect to Figure 1, VS (i.e., the voltage drop across the collector and emitter of the power amplifier 112) is approximately 0.2 Volts.
  • As illustrated in Figure 2A, a graphical representation of a sinusoidal output voltage, VOUT, of the transistor of power amplifier 112 shows the margin to saturation when employing an exemplary 4.8V voltage supply. If the voltage supply is reduced, the signal as shown in Figure 2A is shifted toward the x-axis. Alternatively, if the voltage supply were increased, the output voltage illustrated in Figure 2A would shift away, vertically, from the x-axis. Input power to the power amplifier can be increased (or the supply voltage to the power amplifier can be decreased) as the lowest peaks of the voltage supply approach zero, as long as the voltage swing of the output voltage, VOUT does not cross the 0.2V level on the y-axis of the graph. As shown in Figure 2B, if VCC is reduced too much, the minimum voltage swing of the output voltage, VOUT, will become less than or equal to approximately 0.2V. The margin to saturation will become zero. As a result, the power amplifier 112 would enter a saturation mode and "clip" (i.e., distort) the output voltage as shown. When the output voltage is distorted, as illustrated in Figure 2B, the power amplifier circuits 110 operation is hampered.
  • To further illustrate the considerations associated with optimizing amplifier operation, the efficiency of the power amplifier 112 is defined as follows: Efficiency = POUT /VCC *ICC, where POUT is the output power of the power amplifier 112. As can be deduced from the equation, one or both of the supply voltage VCC or the bias current, ICC, must be minimized in order to increase the efficiency of the power amplifier. However, as illustrated above, control of the voltage supply should be performed without "clipping" the signal.
  • This issue is addressed according to exemplary embodiments of the present invention by, as illustrated in Figure 3, providing a power amplifier control circuit 300 in addition to the power amplifier circuit 110 described with respect to Figure 1. The power amplifier control circuit 300 includes a peak detector 310, a differential amplifier 320 and loop filter 330. These elements are employed to ensure that the voltage supply, VCC, is decreased while not sending the power amplifier 112 into a saturated state.
  • The peak detector 310 includes a resistor 312 in series with a diode 314 on an input line from the output of the power amplifier 112. Additionally, a second resistor 316 is placed in parallel with a capacitor 318 each receiving voltage from the voltage supply, VCC. The peak detector 310 is designed to follow the minimum envelope, i.e., to identify the negative peaks in the output from the power amplifier 112. This enables the system of the present invention to determine if the voltage supply is getting too close to the "clipping" voltage which would send the power amplifier 112 into saturation.
  • The peak detected voltage value detected in peak detector 310 is output to an inverting input of the differential amplifier 320. The peak detected voltage value is then compared to a voltage reference value, VREF. The differential amplifier 320 controls the voltage supply to ensure optimum power amplifier operation to thereby keep a distance to the point of saturation. The difference signal which is output from the differential amplifier 320 is sent, via a loop filter 330 (a resistance 332 in series with a capacitance 334), to control the VCC value input into power amplifier 112. The loop filter is employed to restrict the signal bandwidth to a specific level in order to prevent the loop from being unstable and to attenuate transient signals and noise signals.
  • The voltage reference value sets the margin between the amplifier's operating point and saturation. The voltage reference value is chosen so that the distance between the lowest envelope of VOUT and the point of saturation is kept to a value that is greater than zero. This reference voltage can be adjusted and optimized using a temperature coefficient to account for temperature deviations in the power amplifier and/or peak detector.
  • As mentioned earlier, power amplifier circuits according to the present invention may be used in, for example, cellular telephone units. These devices can be used to amplify and transmit messages at different power levels used to support communications between mobile and base stations in radio communication systems. Figure 4 represents a block diagram of an exemplary cellular mobile radio telephone system according to one embodiment of the present invention in which power amplifiers described above can be used to generate RF signals for data transmission. The system shows an exemplary base station 910 and a mobile 920. The base station includes a control and processing unit 930 which is connected to the MSC 940 which in turn is connected to the public switched telephone network (not shown).
  • The base station 910 for a cell includes a plurality of voice channels handled by voice channel transceiver 950 which is controlled by the control and processing unit 930. Also, each base station includes a control channel transceiver 960 which may be capable of handling more than one control channel. The control channel transceiver 960 is controlled by the control and processing unit 930. The control channel transceiver 960 broadcasts control information over the control channel of the base station or cell to mobiles locked to that control channel. The voice channel transceiver handles the traffic or voice channels which can include digital control channel location information as described previously.
  • When the mobile 920 first enters the idle mode, it periodically scans the control channels of base stations like base station 910 to determine which cell to lock on or camp to. The mobile 920 receives the absolute and relative information broadcasted on a control channel at its voice and control channel transceiver 970. Then, the processing unit 980 evaluates the received control channel information which includes the characteristics of the candidate cells and determines which cell the mobile should lock to. The received control channel information not only includes absolute information concerning the cell with which it is associated, but also contains relative information concerning other cells proximate to the cell with which the control channel is associated. These adjacent cells are periodically scanned while monitoring the primary control channel to determine if there is a more suitable candidate. Additional information relating to specifics of mobile and base station implementations can be found in U.S. Patent Application Serial No. 07/967,027 entitled "Multi-Mode Signal Processing" filed on October 27, 1992 to P. Dent and B. Ekelund.
  • Although the foregoing exemplary embodiment has been described in terms of base and mobile stations, the present invention can be applied to any radiocommunication system. For example, satellites could transmit and receive data in communication with remote devices, including portable units, PCS devices, personal digital assistants, etc.
  • While the present invention has been described with respect to its preferred embodiment, those skilled in the art will recognize that the present invention is not limited to the specific embodiment described and illustrated herein. Different embodiments and adaptations besides those shown herein and described as well as many variations, modifications and equivalent arrangements will now be apparent or will be reasonably suggested by the foregoing specification and drawings.
  • The scope of the invention is defined by the appended claims.

Claims (15)

  1. An amplifier and control circuit, comprising:
    a power amplifier (112) powered by a voltage supply;
    a peak detector (310) which detects a peak amplitude of an output voltage of said power amplifier; and characterized by
    a differential amplifier (320) which compares the peak amplitude of the output of said power amplifier to a reference voltage and outputs a corrected voltage supply signal, wherein said reference voltage is chosen to ensure that said power amplifier does not enter a saturated state.
  2. The amplifier and control circuit of claim 1, further comprising:
    a loop filter (330) connected to the output of said differential amplifier.
  3. The amplifier and control circuit of claim 1, wherein said power amplifier further comprises:
    multiple stages of individual transistor elements.
  4. The amplifier and control circuit of claim 1, further comprising:
    an impedance matching network (130) connected to the output of said power amplifier.
  5. The amplifier and control circuit of claim 1, wherein said reference voltage is chosen to account for temperature deviations in at least one of said power amplifier and said peak detector.
  6. The amplifier and control circuit of claim 1, wherein said peak amplitude is a negative peak amplitude of said output voltage.
  7. A method of controlling a power amplifier circuit, comprising the steps of:
    detecting a peak amplitude (310) of an output voltage from a power amplifier (112) in said power amplifier circuit,
    comparing the detected amplitude of the output voltage to a reference voltage and outputting a corrected voltage signal (320); and
    controlling a voltage supply of said power amplifier circuit based upon the corrected voltage signal,
       characterised by the step of:
    choosing the reference voltage to ensure that the power amplifier does not enter a saturated mode.
  8. The method of controlling the power amplifier circuit of claim 7, wherein said peak amplitude is a negative peak amplitude of said output voltage.
  9. The method of controlling the power amplifier circuit of claim 7, further comprising the step of:
    impedance matching said corrected voltage signal.
  10. The method of controlling the power amplifier circuit of claim 7, wherein said reference voltage is chosen to account for temperature deviations.
  11. A transmitter for transmitting an outgoing signal, said transmitter further comprising:
    a power amplifier (112) to amplify said outgoing signals before transmission;
    a peak detector (310) which detects a peak amplitude of an output of said power amplifier; and characterized by
    a differential amplifier (320) which compares the amplitude of the output of said power amplifier to a reference voltage and outputs a corrected signal to be input to said power amplifier, wherein said reference voltage is chosen to ensure that said power amplifier does not enter a saturated state.
  12. The transmitter of claim 11, further comprising:
    a loop filter (330) connected to the output of said differential amplifier.
  13. The transmitter of claim 11, wherein said power amplifier further comprises:
    multiple stages of individual transistor elements.
  14. The transmitter of claim 11, further comprising:
    a matching circuit (130) connected to the output of said power amplifier.
  15. The transmitter of claim 11, wherein said constant reference voltage is chosen to account for temperature deviations in one of said power amplifier and said peak detector.
EP99951329A 1998-09-17 1999-09-17 Method and apparatus for preventing power amplifier saturation Expired - Lifetime EP1119906B1 (en)

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US09/154,502 US6133792A (en) 1998-09-17 1998-09-17 Method and apparatus for preventing power amplifier saturation
US154502 1998-09-17
PCT/SE1999/001621 WO2000016474A1 (en) 1998-09-17 1999-09-17 Method and apparatus for preventing power amplifier saturation

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EP1119906A1 EP1119906A1 (en) 2001-08-01
EP1119906B1 true EP1119906B1 (en) 2002-07-24

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JP (1) JP2002525900A (en)
KR (1) KR20010075166A (en)
CN (1) CN1185784C (en)
AR (1) AR020468A1 (en)
AT (1) ATE221275T1 (en)
AU (1) AU753728B2 (en)
BR (1) BR9913792B1 (en)
DE (1) DE69902289T2 (en)
MY (1) MY124616A (en)
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7236752B2 (en) 2003-07-22 2007-06-26 Infineon Technologies Ag Circuit arrangement for increasing a supply voltage

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1543614B1 (en) * 2002-09-17 2010-05-05 Nxp B.V. Preserving linearity of a rf power amplifier
JP2005235536A (en) * 2004-02-19 2005-09-02 Konica Minolta Photo Imaging Inc Battery pack and electronic apparatus
JP4497470B2 (en) * 2004-09-17 2010-07-07 ソニー・エリクソン・モバイルコミュニケーションズ株式会社 High frequency power amplifier and transmitter
US7138861B2 (en) * 2004-12-29 2006-11-21 Telefonaktiebolaget L M Ericsson (Publ) Load mismatch adaptation in coupler-based amplifiers
KR100690772B1 (en) * 2005-03-23 2007-03-09 엘지전자 주식회사 Methods and apparatus' of protecting dc/dc power supplier for mobile phone
US7279979B2 (en) * 2005-09-12 2007-10-09 Nokia Corporation Method and arrangement for adjusting an output impedance of a power amplifier
US7330070B2 (en) * 2005-11-10 2008-02-12 Nokia Corporation Method and arrangement for optimizing efficiency of a power amplifier
US7761065B2 (en) * 2006-02-03 2010-07-20 Quantance, Inc. RF power amplifier controller circuit with compensation for output impedance mismatch
US7933570B2 (en) * 2006-02-03 2011-04-26 Quantance, Inc. Power amplifier controller circuit
US8095090B2 (en) * 2006-02-03 2012-01-10 Quantance, Inc. RF power amplifier controller circuit
US7917106B2 (en) * 2006-02-03 2011-03-29 Quantance, Inc. RF power amplifier controller circuit including calibrated phase control loop
US7869542B2 (en) * 2006-02-03 2011-01-11 Quantance, Inc. Phase error de-glitching circuit and method of operating
US8032097B2 (en) * 2006-02-03 2011-10-04 Quantance, Inc. Amplitude error de-glitching circuit and method of operating
CN101401261B (en) * 2006-02-03 2012-11-21 匡坦斯公司 Power amplifier controller circuit
US20080003962A1 (en) * 2006-06-30 2008-01-03 Wai Lim Ngai Method and apparatus for providing adaptive supply voltage control of a power amplifier
US7514010B2 (en) * 2007-03-08 2009-04-07 Salmon Daniel J Water filtering method and apparatus
US7466195B2 (en) * 2007-05-18 2008-12-16 Quantance, Inc. Error driven RF power amplifier control with increased efficiency
US7783269B2 (en) * 2007-09-20 2010-08-24 Quantance, Inc. Power amplifier controller with polar transmitter
US8014735B2 (en) * 2007-11-06 2011-09-06 Quantance, Inc. RF power amplifier controlled by estimated distortion level of output signal of power amplifier
US8018277B2 (en) * 2008-09-09 2011-09-13 Quantance, Inc. RF power amplifier system with impedance modulation
US7782134B2 (en) * 2008-09-09 2010-08-24 Quantance, Inc. RF power amplifier system with impedance modulation
US8103226B2 (en) * 2008-10-28 2012-01-24 Skyworks Solutions, Inc. Power amplifier saturation detection
CN101771386B (en) * 2008-12-30 2012-09-19 龙鼎微电子(上海)有限公司 Class D audio power amplifier with anti-saturation distortion circuit
US7777566B1 (en) * 2009-02-05 2010-08-17 Quantance, Inc. Amplifier compression adjustment circuit
CN105790719B (en) * 2014-12-25 2024-07-19 南京中兴新软件有限责任公司 Method and device for improving DPD performance of radio frequency power amplifier
CN107086879A (en) * 2017-02-27 2017-08-22 宇龙计算机通信科技(深圳)有限公司 Adjustable RF circuit, communication terminal and adjustable RF circuit control method

Family Cites Families (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2376556A1 (en) * 1976-12-31 1978-07-28 Thomson Csf SELF-ADAPTIVE POWER AMPLIFIER DEVICE DEPENDING ON OPERATING SERVITUDES
JPS54104760A (en) * 1978-02-03 1979-08-17 Nec Corp Amplifier of low power consumption type
US4317083A (en) * 1979-03-19 1982-02-23 Rca Corporation Bias adjustment responsive to signal power
JPS55127709A (en) * 1979-03-24 1980-10-02 Nippon Columbia Co Ltd Power amplifier
US4378530A (en) * 1979-07-04 1983-03-29 Unisearch Limited High-efficiency low-distortion amplifier
JPS5612111A (en) * 1979-07-10 1981-02-06 Matsushita Electric Ind Co Ltd Electric power supply unit of electric power amplifier
JPS5935207B2 (en) * 1979-07-27 1984-08-27 ヤマハ株式会社 power amplifier
JPS58158517U (en) * 1982-04-16 1983-10-22 ヤマハ株式会社 power amplifier
IT1190872B (en) * 1982-06-17 1988-02-24 Sgs Microelettronica Spa AUDIO AMPLIFICATION SYSTEM WITH INCREASE IN THE AVERAGE LISTENING POWER
GB2150378B (en) * 1983-11-21 1987-06-03 Philips Electronic Associated Polar loop transmitter
GB2163311A (en) * 1984-08-17 1986-02-19 Philips Electronic Associated Bipolar transistor rf power amplifier
US4636741A (en) * 1985-11-01 1987-01-13 Motorola, Inc. Multi-level power amplifying circuitry for portable radio transceivers
JPS62213404A (en) * 1986-03-14 1987-09-19 Fujitsu Ltd Power amplifier circuit
JPH04592Y2 (en) * 1987-03-06 1992-01-09
SU1417174A1 (en) * 1987-04-02 1988-08-15 Ленинградский Электротехнический Институт Связи Им.Проф.Бонч-Бруевича Power amplifier
US5105164A (en) * 1989-02-28 1992-04-14 At&T Bell Laboratories High efficiency uhf linear power amplifier
CA2035455C (en) * 1989-06-30 1995-08-22 Kouji Chiba Linear transmitter
JPH03174810A (en) * 1989-09-29 1991-07-30 Nippon Telegr & Teleph Corp <Ntt> Linear transmitter
US4994757A (en) * 1989-11-01 1991-02-19 Motorola, Inc. Efficiency improvement of power amplifiers
JPH03179927A (en) * 1989-12-08 1991-08-05 Kokusai Electric Co Ltd Automatic power control circuit
IT1239643B (en) * 1990-02-22 1993-11-11 Sgs Thomson Microelectronics HIGH EFFICIENCY AUDIO AMPLIFIER FOR USE IN HIGH LOYALTY
JPH0440105A (en) * 1990-06-06 1992-02-10 Oki Electric Ind Co Ltd Linear amplifier circuit
US5172877A (en) * 1990-08-31 1992-12-22 Usui Kokusai Sangyo Kaisha Ltd. Pipe fixing structure using clamp member
JP2765211B2 (en) * 1990-09-21 1998-06-11 沖電気工業株式会社 Power control circuit for linearized power amplifier
JP3130919B2 (en) * 1990-11-06 2001-01-31 三菱電機株式会社 Pulse width modulation amplifier
JPH0685580A (en) * 1991-04-11 1994-03-25 Nippon Telegr & Teleph Corp <Ntt> Power controller
JPH05145345A (en) * 1991-11-19 1993-06-11 Fujitsu Ltd Low noise amplifier circuit
DE69316880T2 (en) * 1993-05-31 1998-05-28 St Microelectronics Srl Numerical gain control
FR2708399B1 (en) * 1993-06-30 1995-08-25 Alcatel Telspace Amplifier polarization control system.
IT1268475B1 (en) * 1993-11-12 1997-03-04 Sgs Thomson Microelectronics DISTORTION CONTROL IN AMPLIFIERS WITH VARIABLE POWER SUPPLY AND MAXIMUM OUTPUT DYNAMICS
JPH07283657A (en) * 1994-04-08 1995-10-27 Alps Electric Co Ltd Transmission circuit and power amplifier
IT1270173B (en) * 1994-06-07 1997-04-29 Sits Soc It Telecom Siemens MICROWAVE LINEAR POWER AMPLIFIER WITH POWER SUPPLY INJECTION COMMANDED BY MODULATION ENVELOPE
JPH0851317A (en) * 1994-08-05 1996-02-20 Mitsubishi Electric Corp High frequency amplifier circuit
JP2964883B2 (en) * 1994-09-30 1999-10-18 日本電気株式会社 Transmitter
JP3338577B2 (en) * 1995-01-13 2002-10-28 三洋電機株式会社 Power amplifier
JP3223750B2 (en) * 1995-03-31 2001-10-29 株式会社日立製作所 Power control power amplifier, wireless communication terminal and wireless communication base station
US5796309A (en) * 1996-07-02 1998-08-18 Nippondenso Co., Ltd. Temperature compensated wide dynamic range power detection circuitry for portable RF transmission terminals
JP3310889B2 (en) * 1996-11-29 2002-08-05 日本電波工業株式会社 Class B output amplifier circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7236752B2 (en) 2003-07-22 2007-06-26 Infineon Technologies Ag Circuit arrangement for increasing a supply voltage

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US6133792A (en) 2000-10-17
CN1326610A (en) 2001-12-12
CN1185784C (en) 2005-01-19
PL346693A1 (en) 2002-02-25
DE69902289T2 (en) 2003-02-06
WO2000016474A1 (en) 2000-03-23
AU753728B2 (en) 2002-10-24
JP2002525900A (en) 2002-08-13
BR9913792B1 (en) 2012-01-10
BR9913792A (en) 2001-05-29
DE69902289D1 (en) 2002-08-29
ATE221275T1 (en) 2002-08-15
MY124616A (en) 2006-06-30
AR020468A1 (en) 2002-05-15
AU6378899A (en) 2000-04-03
KR20010075166A (en) 2001-08-09
EP1119906A1 (en) 2001-08-01
PL195104B1 (en) 2007-08-31

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