EP1021831A1

EP1021831A1 - Improved leadframe structure with preplated leads and process for manufacturing the same

Info

Publication number: EP1021831A1
Application number: EP98910140A
Authority: EP
Inventors: Guiseppe D. Bucci; Paul H. Voisin
Original assignee: GCB Technologies Inc
Current assignee: GCB Technologies Inc
Priority date: 1997-01-30
Filing date: 1998-01-05
Publication date: 2000-07-26
Also published as: JP2002511187A; TW444309B; TW383436B; WO1998034277A1

Abstract

An improved leadframe structure, process of manufacturing the same, and improved IC package (190) and packaging process using the same are provided. The leadframe includes a plurality of leads (85) having inner portions (95) located within an IC encapsulation area and outer portions (80) extending outside the encapsulation area into contact with the ou tside environment. A plating mask cooperates with a polymer structure having a preselected configuration to form a substantially fluid-tight gasket to facilitate selective preplating (92) of the outer portions of the leads of the leadframe prior to beginning the IC packaging process. Since the polymer structure (160) is electrically insulative, concerns regarding plating mask (200) misalignment are minimized.

Description

IMPROVED LEADFRAME STRUCTURE WITH PREPLATED LEADS AND PROCESS FOR MANUFACTURING THE SAME

This application is related to Application No. 08/744.520. filed November 5, 1996. for IMPROVED LEADFRAME STRUCTURE AND PROCESS FOR PACKAGING INTEGRATED CIRCUITS, and to Application No. filed December 19. 1996 for IMPROVED LEADFRAME STRUCTURE WITH

LOCKED INNER LEADS AND PROCESS FOR MANUFACTURING THE SAME, both naming as inventors Giuseppe D. Bucci and Paul Voisin, the inventors of the invention which is the subject matter of the present application, and both assigned to the assignee of the present application, GCB Technologies, LLC. The disclosure of those applications are incorporated herein by reference as if fully set forth herein.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to the packaging of semiconductor integrated circuits and more particularly to "leadframes" that provide electrical connection between a packaged integrated circuit and the external environment.

2. Background and Related Art

Current leadframe designs used in the packaging of integrated circuits ("ICs") have a number of shortcomings that result in increased costs and reduced yields. A number of such shortcomings are identified and described in our above-identified co-pending related Application Nos. 08/744,520 and . As described below, additional shortcomings relate to the outer lead plating process, which is an integral and necessary part of current IC packaging processes. Leadframes in current use are typically made of a copper or nickel based alloy. To facilitate good metallurgical bonding between the ends of the inner portions of the leads and the bonding wires used to electrically interconnect the leads with the bonding pads on a mounted IC, the inner tips of the leads are typically coated with a thin layer of a suitable metal, such as silver or gold, before the bonding process is carried out. A variety of processes exist for this purpose, including chemical and electrochemical plating, and vapor deposition. The particular process selected depends in part on the material of the bonding wire used. Typical materials include gold and copper.

Similarly, the outer portions of the leads, i.e. , those portions that extend outside the finished IC package, are typically coated with a thin layer of a selected material. In many commercial applications, the outer leads are electrically and physically connected with other components on a printed circuit board or similar substrate with the use of an electrically conductive solder, such as a variety of well known tin lead (Sn/Pb) solder compositions. The solder composition may also include such materials as tin (Sn), indium (In), silver (Ag) and/or bismuth (Bi), depending on the particular application. In order to facilitate the formation of sound solder joints, the outer leads are typically coated with a thin layer of a similar solder composition, the exact composition of which will vary depending on the particular application, but which may include tin (Sn) and lead (Pb) in a selected ratio. Under the application of a relatively high temperature, the solder composition and the solder coating on the leads melt and are joined together, or "reflow, " to form solder joints that physically and electrically connect the leads to the substrate. In some IC packages for military and other applications requiring a higher degree of reliability, gold is used as a coating for the outer portions of the leads. Gold is generally quite compatible with conventional Sn Pb solder compositions. However, the thickness of the gold coating must be carefully controlled in order to limit the concentration of the gold in the Sn Pb solder mix. Concentrations of gold in excess of about 3 % tend to form undesirable metallurgical phases such as Au₄Sn, which can result in cracks in the solder joint, so-called "purple plague," and reliability problems.

Recently, palladium and palladium/nickel alloy have also been used as a coating for the outer leads. Like gold, palladium is quite compatible with conventional Sn Pb solder compositions. Palladium has the added advantage that it typically costs only about 30-40% what gold costs, although the cost of both materials is highly market dependent.

In IC packaging processes in commercial use today, plating of the outer leads is typically performed near the end of the process. In a typical process, the plating operation is performed after encapsulation, and after any dambar removal and deflash operations. It is typically performed just prior to the final trim/form operations in which the rails and outer frame of the leadframe are removed, and the outer leads are separated and shaped. Plating the outer leads at this late stage in the packaging process has a number of disadvantages. For one, unlike the rest of the packaging process, which is largely mechanical in nature, the coating process is typically electrochemical in nature. Thus, a packager of ICs must invest in and maintain not only facilities for performing the mechanical packaging operations, but also facilities for performing chemical operations as well. The packager must also contend with the environmental and health concerns associated with the plating chemicals, especially lead (Pb). For another, the encapsulating materials typically used, e.g. , silica filled epoxies. are not hermetic and therefore there is a risk of ingress of the plating solution into the package. For yet another, during the plating process, tin "whiskers" can sometimes form between adjacent leads as a result of deposition of the plating material in channels along the surface of the epoxy package sometimes formed by removal of the dambar. This can result in reduced electrical performance or even shorting of adjacent leads. These disadvantages and others combine to lengthen the packaging cycle, decrease yields, and increase costs.

In view of the foregoing disadvantages, it would be desirable to preplate the outer leads prior to beginning the packaging process, e.g. , prior to mounting the IC die on the leadframe. Various efforts have been made to develop preplating processes. However, such efforts, while reasonably successful in achieving the general objective of preplating, have created new problems and disadvantages.

For example, efforts to selectively preplate the exposed outer portions of the leads with conventional Sn/Pb solder compositions have been reasonably successful. However, such solder compositions typically melt at temperatures in the range 160-200 degrees C. and therefore are limited to use with relatively low cost, low reliability IC packages where die attachment, molding and curing operations are carried out at relatively low temperatures, and relatively low grade epoxies are used. For standard applications, complete gold plating could be used instead of

Sn/Pb compositions. However, because of its relatively high cost gold has been used only occasionally for small quantity prototypes. Recently, palladium and various palladium/ nickel alloys have found limited use as preplating materials due to their ability to withstand relatively high temperature packaging operations and their relatively lower cost than gold. Texas Instruments has developed a process to coat the entire leadframe with a thin layer of palladium or a palladium/nickel alloy prior to die attachment. In this process, not only the outer exposed portions of the leads are coated, but also the inner portions, including the surfaces where the bonding wires will be bonded to the leads. This process, while achieving the desired goal of preplating the leads, is not selective and creates several new problems and disadvantages. Even though palladium and palladium/ nickel alloys are less costly than gold, it is still not very cost efficient to coat the entire leadframe. The inner portions of the leads that will be encapsulated with the IC and that are not involved in making any connections to the IC are not exposed to the environment, and do not require a protective coating. Additionally, the reason the ends of the inner portions of the leads are conventionally coated with silver is to facilitate bonding with the bonding wires, which are typically made of gold. When the silver coating is replaced with palladium or palladium/ nickel alloy, the bonding process may require modification to ensure the continued integrity of the bond. In addition, there are concerns about the adhesion of the silver epoxy die attachment adhesive compound. Moreover, it has been suggested that to ensure the integrity of a bond between gold bonding wire and palladium or palladium/nickel alloy, the coating should be no more than about 3-5 micro inches in thickness. However, generally a slightly thicker coating is desired for the exposed outer portions of the leads to prevent porosity and damage by scratching, cracking or otherwise during the packaging process, particularly the trim/ form operations. Thinner coatings may also require the use of additional chemicals for the deflash operations rather than slurry media in order to avoid damage to the leads. These differing thickness requirements pose a considerable challenge for process design and control. Additionally, typical epoxy molding compounds used in the encapsulation process generally adhere better to copper and nickel-based surfaces than they do to palladium or palladium alloy. As a result, there is an increased risk of delamination between the leads and the epoxy package, and moismre ingress into the package, with non-selective palladium or palladium/ nickel alloy plating. Such moisture can accumulate in the IC die attachment epoxy and result in so-called "popcorning" of the IC package. Another shortcoming common to existing processes for preplating conventional leadframes is that when the dambar is removed, portions of the underlying base metal of the leadframe become exposed to the environment with no protective coating. This occurs regardless whether the entire leadframe is initially coated or only the outer exposed portions, and regardless of the coating material used.

Still further shortcomings of existing non-selective preplating processes are that they significantly reduce the scrap value of portions of the copper leadframe excised during trim and form operations, e.g., the outer frame and rails, because the plating material is considered a contaminant, which must be removed from the scrap. In cases where the plating material itself is relatively expensive and is to be recycled, e.g., palladium, there is also the increased cost of separation which increases the recycling cost.

In many IC markets today, price and reliability are critical issues. As a result, packaging cost, improved yields, and good reliability are critical issues with IC manufacturers. There is thus a need for an improved leadframe and attendant manufacturing process wherein only the outer exposed portions of the leads are selectively preplated in order to reduce the amount of expensive plating material used, thus reducing the packaging cost to fabricators, and allowing lower selling prices. There is also a need for an improved leadframe and attendant manufacturing process wherein selective preplating of the outer exposed portions of the leads do not substantially effect the remainder of the packaging operations, and wherein the packager is relieved of the burden to invest in and maintain additional facilities, and to deal with various environmental and health related concerns.

There is also a need for an improved leadframe and attendant manufacturing process that overcomes the common problem of base metal exposure resulting from dambar removal operations.

It is therefore an object of the present invention to provide an improved leadframe structure and attendant manufacturing process which overcome the shortcomings of known leadframes and leadframe plating processes. Other objects of the invention are to provide such a structure and process which are cost effective, which are integral to and which do not adversely affect the other operations of the packaging process, and which relieve the packager of investing in and maintaining chemical facilities, with the health and environmental concerns attendant thereto.

Another object of the present invention is to provide such a structure and process which overcome the common problem of base metal exposure resulting from removal of the leadframe dambar.

Yet another object of the present invention is to increase the value of scrap leadframe material by reducing the contamination thereof by non-selective plating material and to reduce the cost of recycling relatively expensive plating materials such as palladium. Still other objects of the invention are to provide an improved IC package and IC packaging process which integrally employ the improved leadframe structure and manufacturing process respectively.

SUMMARY OF THE INVENTION One aspect of the present invention is an improved leadframe structure and method for manufacturing the same. The improved leadframe structure has a frame, a pad adapted to mount an integrated circuit chip, and a plurality of leads having inner portions extending toward the pad and outer portions extending toward the frame. The improved leadframe is provided with a polymer structure which extends between at least some of the leads intermediate their inner and outer portions. The polymer structure cooperates with a plating mask to allow selective preplating of the outer portions of the leads with a selected material, such as gold, gold alloy, palladium, palladium-nickel alloys, tin-lead solder or others, e.g. , indium, bismuth, tin, silver, etc., while substantially preventing access of the plating material to the inner portions of the leads. Another aspect of the invention is an improved IC package and packaging process using the improved leadframe structure. The improved IC package includes a leadframe having a pad, a plurality of leads having inner portions and outer portions, and a polymer structure extending between at least some of the leads intermediate the inner and outer portions. The polymer structure cooperates with a plating mask such that the outer portions of the leads are selectively preplated with a selected plating material substantially up to the location of the polymer structure, while the plating material is substantially blocked from access to the inner portions of the leads. An IC is mounted on the pad and electrical conductors connect the IC and leadframe. An epoxy package structure encapsulates the IC. the electrical conductors and the inner portions of the leads. The preplated outer portions of the leads extend outside the epoxy structure. The polymer structure remains an integral pan of the finished IC package, which eliminates the need for process steps relating to dambar removal and deflashing, and therefore eliminates exposure of the base metal of the exposed outer portions of the leads.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a plan view of a known 208 pin leadframe structure for a plastic quad flat pack (QFP) IC package having a dambar;

Figure la is a plan view of a known 176 pin padless leadframe structure with dambar for use with a multichip module (MCM) substrate;

Figure 2 is a graphical cross-sectional view of a portion of a padless leadframe structure with a laminated substrate for mounting an IC chip; Figure 3 is a plan view of a preferred leadframe according to the invention, formed in a 208 pin QFP configuration and having a polymer structure in place of the dambar;

Figure 4 is an expanded perspective view of a portion of a preferred leadframe according to the invention having polymer structure in place of the dambar; Figure 5 is an expanded perspective view of a portion of a conventional leadframe after packaging and dambar removal showing exposed adjacent outer leads and base metal;

Figure 6 is an expanded perspective view of a portion of a preferred leadframe according to the invention having a polymer structure in place of the dambar and showing preplated outer leads and rails;

Figure 7 is an expanded perspective view of a portion of a preferred leadframe according to the invention having a polymer structure in place of the dambar and showing selectively preplated outer leads; and

Figure 8 is an expanded perspective view of a portion of a preferred leadframe according to the invention having a polymer structure in place of the dambar. following packaging, showing the polymer structure incorporated as part of the finished IC package and the plated outer leads. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

A presently preferred embodiment of an improved leadframe structure according to the invention may be manufactured using known stamping or etching methods, or any other suitable method. The invention is not limited with respect to the manner in which the leadframe is formed. Any suitable material may be used for the leadframe, including such known materials as various copper or nickel alloys. Applicability of the invention is not limited by the specific material used for the leadframe.

In addition, the leadframe may be formed in essentially any configuration, including presently known quad flat pack (QFP), molded carrier ring (MCR), small outline (SO), chip carrier (CC), or dual in line package (DIP) configurations. Applicability of the invention is not limited by the configuration, lead count, or lead pitch of the leadframe.

One example of a typical leadframe in a QFP configuration is shown in Figure 1. Other examples of known leadframe structures for use with MCM and laminated substrates are shown in Figs, la and 2. As shown, the leadframe 10 typically includes an outer frame 15. Many hundreds or thousands of leadframes may be formed from a common strip of material according to known methods, and the outer frame 15 will be common to all leadframes in the same strip, until the individual leadframes are separated. The outer frame 15 typically includes one or more placement and location openings 20. All of the functional elements of the leadframe are precisely located relative to these openings 20 to facilitate the precise positioning of the elements during formation of the leadframe and during the IC assembly process. The QFP type leadframe of Fig. 1 also includes a pad or paddle 25, on which an IC chip will be mounted, and a plurality of leads 30, in this case 208 of them. While the leadframes of Figs, la and 2 similarly have a plurality of leads 30 (176 of them in the case of the leadframe of Fig. la) neither has an IC mounting pad. Instead, in the leadframe of Fig. 1, the IC chip is mounted on a multichip module (MCM) substrate. The substrate may be single or multi-layer and is glass reinforced. Several IC chips can be accommodated. Similarly, in the leadframe of Fig. 2, the IC chip is mounted on a laminated substrate 35. Typically, the laminated substrate 35 will comprise multiple layers of glass reinforced dielectric material joined with epoxy. The substrate may be single or double sided and may have one or more mounting areas 36 for one or more IC chips on either or both sides. Inner portions of the leads 30 are laminated with the substrate 35. The layers of the substrate may have vias (not shown) formed therein and filled with copper or have copper traces formed thereon in conventional fashion for making various electrical interconnections. Each lead 30 has an inner portion with a free end 32 adjacent to the pad

25, or the substrate 35, and an outer portion with an end 34. The inner free ends provide points for electrical connection to the IC, once it is mounted on the pad. or alternatively to the substrate which may in turn be wire bonded to the IC. The inner portions of the leads are typically encapsulated along with the IC (and the substrate, if applicable) and thus are protected from exposure to the environment. The outer portions typically extend outside the IC package and are exposed to the environment. The outer portions provide a point of electrical connection with external electrical components and circuits.

Most current leadframe designs, including those shown in Figs. 1 and la, include a "dambar" strucmre 40, which interconnects the leads at a point intermediate their inner and outer ends. The primary purpose of the dambar 40 is to serve as a barrier during the molding or encapsulation process to prevent epoxy from escaping the mold and "flashing" onto the outer leads, as described in further detail in our co-pending related Application No. 08/744,520. In the case of an MCM or laminated substrate, the epoxy layer 42 is overmolded, unlike in case of a QFP configuration. However, the dambar 40 functions similarly in both cases. Secondarily, the dambar provides support for the leads to assist in maintaining the relative positions of the leads during the IC assembly process.

Referring to Figure 3, an example of a preferred leadframe 75 in a QFP configuration is shown having an outer frame 80, pad 100, and a plurality of leads 85 with outer 90 and inner 95 portions. In the preferred leadframe of Figure 3, a section of which is also shown in Figure 4, no dambar strucmre is present. Instead, a polymer structure 160 is formed intermediate the inner 95 and outer 90 ends of the leads 85. As described and shown in detail in our co-pending related Application No. 08/744.520, the polymer structure serves purposes similar to the dambar. It acts as a barrier to epoxy escape and flashing during the IC encapsulation process and provides additional support for the leads. Advantageously, and unlike the dambar, the polymer structure is incorporated as a pan of the finished IC package 190. as shown in Figure 8. and eliminates the need for dambar removal, deflash and dejunk operations as pan of the packaging process. For purposes of the present invention, the polymer structure is preferably located, configured and formed in the manner and with the materials described in our related co-pending Application No. 08/744,520. Also for purposes of the present invention, the polymer structure is preferably formed prior to staning the IC packaging process, i.e., prior to mounting an IC chip on the pad 100 in a QFP configuration. In a padless leadframe for use with an MCM or laminated substrate, the polymer strucmre is preferably formed prior to laminating the leadframe with the substrate. Indeed, in a most preferred embodiment, by preforming the polymer strucmre on each of the leads before they are separated from the strip, it can be used with a mask to selectively preplate the leads, while the leads are still in strip form and prior to mounting IC chips thereon. This has the advantage of then allowing IC packagers to purchase selectively preplated leadframes for use in the packaging process and relieving them of the burden of investing in and maintaining chemical or electrochemical plating facilities, in addition to the required mechanical packaging facilities.

Standard leadframe bath chemistries for plating with palladium, palladium- nickel alloys, gold, etc., are well known and commercially available from such vendors as Lucent Technologies. These chemistries are suitable for use with the present invention. Masking operations, such as mechanical or photoresist masking approaches, for selectively plating areas of the leadframes in strip form are also well known and need not be described in detail herein for those skilled in the an to gain a full appreciation of the present invention.

In the present invention, however, unlike other leadframe masking processes, especially those practiced with dambar-containing leadframes, the polymer strucmre 160 provides beneficial results. Referring to Figures 5-7, since the polymer strucmre is located at the package periphery, it is in a perfect location to be used with a mechanical plating mask 200 for selectively preplating 92 the outer portions 90 of the leads 85. In the case of a dambar strucmre 40, which may be used with a photoresist or mechanical plating mask to perform selective lead plating, the dambar strucmre must subsequently be removed. As shown in Figure 5 in particular, removal of the dambar excises the dambar 40. and any excess epoxy 45 that is contained within the dam 87 portion of the outer portions 90 of the leads during the encapsulation process. This undesirably leaves areas of the base metal 47 underlying the plating material exposed. Since the polymer strucmre 160 remains an integral part of the finished package, as shown in Figure 8. and is not removed, no underlying base metal is left exposed.

In addition, the polymer strucmre 160 cooperates with the mask 200 to form a substantially fluid-tight gasket. Unlike the dambar strucmre. the polymer strucmre actually encases the leads. It thus provides an effective electrically insulating, fluid tight gasket to substantially prevent bleeding or leakage of fluid plating material into the inner lead area, where plating is neither desired nor required, since the inner leads 95 will be within the epoxy package 190 or layer 42. Typically, the polymer strucmre 160 may be on the order of 10-15 mils wide. It is suitable for the edge of the mask 200 to contact the polymer strucmre substantially anywhere on its top surface. This provides a relatively wide alignment tolerance between the mask 200 and polymer strucmre 160. A benefit of the invention is that the edge of the mask may not align precisely with the outer edge of the polymer strucmre and still function appropriately. Since the polymer strucmre is electrically insulating it will not be plated in a typical electrochemical plating process, even though exposed to plating solution by mask misalignment.

As shown in Figures 6 and 7, either the entire outer portions 90 of the leads 85, including the rails 80, can be preplated, or another mask 210 can be used to limit the preplating to the area 94 where the leads will be trimmed in the subsequent trim/ form operation. The latter alternative is especially preferred when precious metals are used for plating, due to the high cost associated therewith.

Yet another advantage of the present invention is that by selectively preplating the outer portions of the leads, the inner portions adjacent the IC bonding pad or substrate may be selectively preplated with silver, which is compatible with current bonding processes. Packaging cost is thus reduced since modifications of the cunent bonding processes are not required, as might otherwise be required for full lead plating with palladium or palladium/ nickel alloy, for example, and a much reduced amount of plating material is used. The foregoing description of a presently preferred embodiment of the invention is by way of example only and is not intended to be limiting of the scope of the invention. It will be apparent to persons skilled in the art that various changes in materials, designs, dimensions and the like, may be made without departing from the spirit of the invention, the scope of which is intended to be defined solely by the following claims.

Claims

WHAT IS CLAIMED IS:

1. An improved leadframe strucmre for use in packaging an integrated circuit chip, comprising: a frame strucmre; a plurality of leads having inner portions and outer portions, said outer portions extending outwardly toward said frame strucmre and said inner portions extending inwardly therefrom; a polymer strucmre extending between at least some of said leads intermediate said inner and outer portions; and said outer portions being selectively plated with a selected plating material.

2. The leadframe strucmre of a claim 1 including a pad for mounting said integrated circuit chip located inwardly of said inner portions of said leads.

3. The leadframe strucmre of claim 1 wherein said outer portions are plated substantially completely up to the location of said polymer strucmre.

4. The leadframe strucmre of claim 1 wherein said outer portions are plated substantially between a trim point and the location of said polymer strucmre.

5. The leadframe strucmre of claim 1 wherein said plating material is selected from a group including gold, palladium, palladium/nickel alloys, tin-lead solder. tin, silver, indium and bismuth.

6. Method of manufacturing an improved leadframe strucmre for use in packaging an integrated circuit chip, comprising: forming a leadframe strucmre including: a frame strucmre; a plurality of leads having inner portions and outer portions, said outer portions extending outwardly toward said frame strucmre and said inner portions extending inwardly therefrom; providing a polymer strucmre extending between at least some of said leads intermediate said inner and outer portions; and selectively plating said outer portions with a selected plating material.

7. The method of claim 6 wherein forming a leadframe strucmre further includes forming a pad for mounting said integrated circuit chip inwardly of said inner portions of said leads.

8. The method of claim 6 wherein selectively plating said outer portions further includes: masking the inner portions of said leads using a mask, said polymer strucmre cooperating with said mask to substantially prevent access of plating material to said inner portions; and applying plating material to substantially the entire unmasked area of said outer portions.

9. The method of claim 6 wherein selectively plating said outer portions further includes: masking the inner portions of said leads using a mask, said polymer strucmre cooperating with said mask to substantially prevent access of plating material to said inner portions; masking said outer portions beyond a selected trim point; and applying plating material to substantially the entire unmasked area of said outer portions between the location of said trim point and the location of said polymer strucmre.

10. The method of claim 6 wherein said plating material is selected from a group including gold, palladium, palladium/ nickel alloys, tin-lead solder, tin, silver, indium and bismuth.

11. An improved integrated circuit package, comprising: a leadframe including: mounting means for mounting an integrated circuit chip; a plurality of leads having inner portions and outer portions, said^" inner portions extending toward said mounting means; a polymer strucmre extending between at least some of said leads intermediate said inner and outer portions, said outer portions being selectively preplated with a selected plating material up to the location of said polymer strucmre; an integrated circuit chip mounted to said mounting means; a plurality of electrical conductors connecting said integrated circuit chip and said leadframe; and an epoxy strucmre encapsulating said integrated circuit chip, said mounting means, said electrical conductors and said inner portions of said leads, said outer portions of said leads extending outside said epoxy strucmre.

12. The integrated circuit package of claim 11 wherein said plating material is selected from a group including gold, palladium, palladium/nickel alloys, tin- lead solder, tin, silver, indium and bismuth.

13. An improved method for packaging an integrated circuit, comprising: forming a leadframe strucmre including: a mounting means for mounting an integrated circuit chip; a plurality of leads having inner portions and outer portions, said inner portions extending toward said mounting means; and a polymer strucmre extending between at least some of said leads intermediate said inner and outer portions; selectively plating said outer portions of said leads with a selected plating material; mounting an integrated circuit chip to said mounting means;; connecting said integrated circuit chip and said leadframe with a plurality of electrical conductors; and encapsulating said integrated circuit chip, said mounting means, said electrical conductors and said inner portions of said leads within an epoxy strucmre, with said plated outer portions of said leads extending outside said epoxy strucmre.

14. The method of claim 13 wherein selectively plating said outer portions of said leads further includes: masking the inner portions of said leads using a mask, said polymer strucmre cooperating with said mask to substantially prevent access of plating material to said inner portions: and applying plating material to substantially the entire unmasked area of said outer portions.

15. The method of claim 13 wherein: said leadframe strucmre initially includes a frame strucmre: selectively plating said outer portions of said leads further includes: masking the inner portions of said leads using a mask, said polymer strucmre cooperating with said mask to substantially prevent access of plating material to said inner portions; masking said outer portions beyond a selected trim point; and applying plating material to substantially the entire unmasked area of said outer portions between the location of said trim point and the location of said polymer strucmre; and excising the unplated areas of said outer portions, including said frame strucmre.

16. The method of claim 13 wherein said plating material is selected from a group including gold, palladium, palladium/nickel alloys, tin-lead solder, tin, silver, indium and bismuth.