[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

EP1085594A3 - High frequency circuit apparatus - Google Patents

High frequency circuit apparatus Download PDF

Info

Publication number
EP1085594A3
EP1085594A3 EP00119475A EP00119475A EP1085594A3 EP 1085594 A3 EP1085594 A3 EP 1085594A3 EP 00119475 A EP00119475 A EP 00119475A EP 00119475 A EP00119475 A EP 00119475A EP 1085594 A3 EP1085594 A3 EP 1085594A3
Authority
EP
European Patent Office
Prior art keywords
high frequency
circuit apparatus
frequency circuit
substrate
transferring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP00119475A
Other languages
German (de)
French (fr)
Other versions
EP1085594A2 (en
EP1085594B1 (en
Inventor
Masaaki Toshiba Corporation Ishida
Norio Toshiba Corporation Matsui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of EP1085594A2 publication Critical patent/EP1085594A2/en
Publication of EP1085594A3 publication Critical patent/EP1085594A3/en
Application granted granted Critical
Publication of EP1085594B1 publication Critical patent/EP1085594B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00—Waveguides; Transmission lines of the waveguide type
    • H01P3/02—Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
    • H01P3/08—Microstrips; Strip lines
    • H01P3/088—Stacked transmission lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32153—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/32175—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
    • H01L2224/32188—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic the layer connector connecting to a bonding area protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01055—Cesium [Cs]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/141—Analog devices
    • H01L2924/1423—Monolithic Microwave Integrated Circuit [MMIC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/021—Components thermally connected to metal substrates or heat-sinks by insert mounting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0352—Differences between the conductors of different layers of a multilayer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

A high frequency circuit apparatus whose thermal dissipation characteristics is excellent and which is advantageous in the compact design and in the massproductivity is provided. The high frequency circuit apparatus comprises a multilayer substrate 12 in which direct current circuit patterns 16 and 17 for transferring direct current signals are formed on an upper substrate 121 of the multilayer substrate 12 while a high frequency current circuit pattern 18 for transferring high frequency signals is formed on a lower substrate located lower than the upper substrate.
EP00119475A 1999-09-17 2000-09-15 High frequency circuit apparatus Expired - Lifetime EP1085594B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP26369799A JP3500335B2 (en) 1999-09-17 1999-09-17 High frequency circuit device
JP26369799 1999-09-17

Publications (3)

Publication Number Publication Date
EP1085594A2 EP1085594A2 (en) 2001-03-21
EP1085594A3 true EP1085594A3 (en) 2003-01-08
EP1085594B1 EP1085594B1 (en) 2010-01-06

Family

ID=17393089

Family Applications (1)

Application Number Title Priority Date Filing Date
EP00119475A Expired - Lifetime EP1085594B1 (en) 1999-09-17 2000-09-15 High frequency circuit apparatus

Country Status (4)

Country Link
US (1) US6621162B1 (en)
EP (1) EP1085594B1 (en)
JP (1) JP3500335B2 (en)
DE (1) DE60043636D1 (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2669223B2 (en) * 1991-10-14 1997-10-27 三菱電機株式会社 Optical sensor device for rendezvous docking
JP2003110049A (en) * 2001-09-28 2003-04-11 Fujitsu Ten Ltd High-frequency ic package and high-frequency unit using the same and manufacturing method thereof
JP4388284B2 (en) * 2003-01-31 2009-12-24 アイ電子株式会社 High frequency circuit package and its mounting structure
US6917265B2 (en) 2003-05-22 2005-07-12 Synergy Microwave Corporation Microwave frequency surface mount components and methods of forming same
JP2005026263A (en) * 2003-06-30 2005-01-27 Nec Compound Semiconductor Devices Ltd Hybrid integrated circuit
US7948069B2 (en) * 2004-01-28 2011-05-24 International Rectifier Corporation Surface mountable hermetically sealed package
JP4664670B2 (en) * 2004-12-24 2011-04-06 株式会社東芝 Semiconductor device
JP4690938B2 (en) * 2006-05-16 2011-06-01 株式会社東芝 High frequency element module
CN101627450B (en) * 2007-03-08 2013-10-30 日本电气株式会社 Capacitance element, printed circuit board, semiconductor package, and semiconductor circuit
JP5477157B2 (en) * 2010-05-17 2014-04-23 富士電機株式会社 Semiconductor device
JP5827476B2 (en) * 2011-03-08 2015-12-02 株式会社東芝 Semiconductor module and manufacturing method thereof
JP5851439B2 (en) * 2013-03-07 2016-02-03 株式会社東芝 High frequency semiconductor package
JP2016096300A (en) * 2014-11-17 2016-05-26 三菱電機株式会社 Printed circuit board
JP6373779B2 (en) * 2015-03-12 2018-08-15 株式会社東芝 High frequency semiconductor device
US9960127B2 (en) * 2016-05-18 2018-05-01 Macom Technology Solutions Holdings, Inc. High-power amplifier package
US10134658B2 (en) 2016-08-10 2018-11-20 Macom Technology Solutions Holdings, Inc. High power transistors
WO2019198199A1 (en) * 2018-04-12 2019-10-17 三菱電機株式会社 Semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5307240A (en) * 1992-12-02 1994-04-26 Intel Corporation Chiplid, multichip semiconductor package design concept
US5796165A (en) * 1996-03-19 1998-08-18 Matsushita Electronics Corporation High-frequency integrated circuit device having a multilayer structure
JPH1117349A (en) * 1997-06-27 1999-01-22 Nec Corp High-frequency integrated circuit device and manufacture thereof
US5874321A (en) * 1995-01-09 1999-02-23 Integrated Device Technology, Inc. Package integrated circuit having thermal enhancement and reduced footprint size

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61239649A (en) * 1985-04-13 1986-10-24 Fujitsu Ltd High-speed integrated circuit package
US4873566A (en) * 1985-10-28 1989-10-10 American Telephone And Telegraph Company Multilayer ceramic laser package
US5136271A (en) * 1989-01-09 1992-08-04 Mitsubishi Denki Kabushiki Kaisha Microwave integrated circuit mountings
JP3267409B2 (en) * 1992-11-24 2002-03-18 株式会社日立製作所 Semiconductor integrated circuit device
JPH07321140A (en) * 1994-05-19 1995-12-08 Toshiba Corp Semiconductor device
JP3859340B2 (en) * 1998-01-06 2006-12-20 三菱電機株式会社 Semiconductor device
JPH11238846A (en) * 1998-02-20 1999-08-31 Rohm Co Ltd Semiconductor device
US5973928A (en) * 1998-08-18 1999-10-26 International Business Machines Corporation Multi-layer ceramic substrate decoupling

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5307240A (en) * 1992-12-02 1994-04-26 Intel Corporation Chiplid, multichip semiconductor package design concept
US5874321A (en) * 1995-01-09 1999-02-23 Integrated Device Technology, Inc. Package integrated circuit having thermal enhancement and reduced footprint size
US5796165A (en) * 1996-03-19 1998-08-18 Matsushita Electronics Corporation High-frequency integrated circuit device having a multilayer structure
JPH1117349A (en) * 1997-06-27 1999-01-22 Nec Corp High-frequency integrated circuit device and manufacture thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 04 30 April 1999 (1999-04-30) *

Also Published As

Publication number Publication date
JP3500335B2 (en) 2004-02-23
EP1085594A2 (en) 2001-03-21
DE60043636D1 (en) 2010-02-25
EP1085594B1 (en) 2010-01-06
US6621162B1 (en) 2003-09-16
JP2001085569A (en) 2001-03-30

Similar Documents

Publication Publication Date Title
EP1085594A3 (en) High frequency circuit apparatus
EP0851724A3 (en) Printed circuit board and electric components
EP0836227A3 (en) Heat conductive substrate mounted in PC board hole for transferring heat from IC to heat sink
HK1027899A1 (en) Circuit board having thereon coupled ceramic capacitors and method for the manufacture thereof.
HUP0103706A3 (en) Substrate which is made from paper and is provided with an integrated circuit
WO2002050848A3 (en) Planar inductor with segmented conductive plane
AU6121598A (en) Electronic component and semiconductor device, method for manufacturing the same, circuit board have the same mounted thereon, and electronic equipment having the circuit board
TW200520635A (en) Flexible printed circuit board
EP0917189A4 (en) Method for mounting encapsulated body on mounting board and optical converter
EP0977145A3 (en) Radio IC card
EP0810655A3 (en) A package for a semiconductor device
SE9904595L (en) Power transistor module, power amplifier and method of manufacture thereof
GB2350727B (en) Method for forming conductive pattern and producing ceramic multi-layer substrate
SG73514A1 (en) Heavy-current flowing circuit substrate a method for producing the heavy-current flowing circuit substrate and an assembled unit of a heavy-current flowing circuit substrate and a printed circuit substrate
EP1397031A3 (en) Circuit board for mounting electronic parts
EP0814510A3 (en) TAB tape and semiconductor device using the TAB tape
EP1041865A3 (en) Device to produce multi-layer electronic circuits
CA2338595A1 (en) Integrated image reading/writing head and image processing apparatus incorporating the same
HK1020394A1 (en) Substrate for semiconductor device, semiconductor device and method for manufacturing the same, circuit board, and electronic equipment
GB9828656D0 (en) High density printed wiring board having in-via surface mounting pads
EP0817266A3 (en) Mounting structure for an integrated circuit
GB0017613D0 (en) Method for forming an electrical conductive pattern on a substrate
EP1239539A3 (en) Antenna
TW200501845A (en) Multi-layered circuit board and electromagnetic shielding method for the multi-layered circuit board
EP1130674A3 (en) High frequency circuit module

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20000915

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

AX Request for extension of the european patent

Free format text: AL;LT;LV;MK;RO;SI

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

AX Request for extension of the european patent

Free format text: AL;LT;LV;MK;RO;SI

AKX Designation fees paid

Designated state(s): DE FR GB

17Q First examination report despatched

Effective date: 20061222

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REF Corresponds to:

Ref document number: 60043636

Country of ref document: DE

Date of ref document: 20100225

Kind code of ref document: P

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20101007

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20110907

Year of fee payment: 12

Ref country code: GB

Payment date: 20110914

Year of fee payment: 12

Ref country code: FR

Payment date: 20110922

Year of fee payment: 12

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20120915

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

Effective date: 20130531

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20120915

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20130403

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20121001

REG Reference to a national code

Ref country code: DE

Ref legal event code: R119

Ref document number: 60043636

Country of ref document: DE

Effective date: 20130403