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EP0907965A1 - Component housing for surface mounting a semiconductor component - Google Patents

Component housing for surface mounting a semiconductor component

Info

Publication number
EP0907965A1
EP0907965A1 EP97931678A EP97931678A EP0907965A1 EP 0907965 A1 EP0907965 A1 EP 0907965A1 EP 97931678 A EP97931678 A EP 97931678A EP 97931678 A EP97931678 A EP 97931678A EP 0907965 A1 EP0907965 A1 EP 0907965A1
Authority
EP
European Patent Office
Prior art keywords
chip carrier
circuit board
component
chip
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP97931678A
Other languages
German (de)
French (fr)
Inventor
Jürgen WINTERER
Gottfried Beer
Bernd Stadler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19626082A external-priority patent/DE19626082C2/en
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0907965A1 publication Critical patent/EP0907965A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/047—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
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    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
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    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10161—Shape being a cuboid with a rectangular active surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10568—Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742—Details of leads
    • H05K2201/10886—Other details
    • H05K2201/10931—Exposed leads, i.e. encapsulation of component partly removed for exposing a part of lead, e.g. for soldering purposes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • Designation of the invention Component housing for surface mounting of a semiconductor component
  • the invention relates to a component housing with a mounting level for a surface mounting of a semiconductor component on the component surface of a printed circuit board, consisting of a chip carrier having an in particular approximately flat chip carrier surface, which consists in particular of electrically insulating material, on which chip carrier surface a semiconductor chip, preferably with an integrated electronic circuit is fastened, and the electrode carrier passing through the chip carrier and electrically connected to the semiconductor chip with a surface-mountable arrangement.
  • Such a surface mounting also known as a surface mounted design (SMD) arrangement
  • SMD surface mounted design
  • a surface mounted design enables the application of an electronic component on a circuit board in a particularly space-saving or low-profile manner.
  • the component connections are no longer inserted into holes in the printed circuit board as in plug-in assembly, but instead are placed on connection spots on the printed circuit board and soldered there.
  • Components for surface mounting can be smaller than for plug-in mounting, since no more hole and soldering eye diameters determine the grid dimension of the connections.
  • the present invention is based on the object of providing a component housing for surface mounting a semiconductor component on the component surface of a printed circuit board, which eliminates the use of any trim and shaping tools when populating the printed circuit board, and at the same time compensates for deflections caused by tolerances the circuit board as well as thermal or mechanical tension of the circuit board.
  • the outer boundary surfaces of the chip carrier which are provided facing the component surface of the printed circuit board, that is to say toward the assembly plane, are designed such that they have a distance from the assembly plane that increases continuously from the edge region to the center region of the chip carrier.
  • the assembly of the printed circuit board is cheaper because it ensures good adhesion of the placement adhesive used in the assembly, possible tolerances of the printed circuit board in the form of deflections are compensated for, and tension of a thermal or mechanical nature is counteracted, since contact of the component with the Printed circuit board is given only by the connecting legs.
  • the outer boundary surfaces of the chip carrier facing the component surface of the printed circuit board have a substantially V-shaped profile in the cross section of the chip carrier as seen from the inside of the chip carrier.
  • the greatest distance between the outer boundary surfaces of the chip carrier facing the component surface and the printed circuit board has a value of approximately 0.1 to approximately 0.5 mm.
  • the electrode connections passing through the chip carrier and electrically connected to the semiconductor chip are designed in the form of connecting legs which are led out to at least one side, preferably to two sides, of the chip carrier and which are bent into short, rocker-shaped connecting stubs and are cut.
  • the chip carrier which is made of electrically insulating material and in particular is made in one piece, has a lower part which is raised relative to the component surface of the printed circuit board and has side parts arranged on both sides of the lower part.
  • the bends of the connection pins are partially or completely accommodated within the side parts of the chip carrier.
  • connection pins are mechanically anchored within the component, which ultimately contributes to an increase in the electrical reliability
  • the ends of the connecting pins protruding from the side parts of the chip carrier have a slight inclination with respect to the component surface of the printed circuit board, such that they extend downward from the center region of the chip carrier in the direction of the assembly plane
  • the chip carrier is made in one piece from a thermoplastic material
  • Figure 1 shows a schematic sectional view of a component housing according to an exemplary embodiment of the invention
  • Figure 2 is a schematic overall view of the chip carrier of a component housing according to the embodiment.
  • the figures show an exemplary embodiment of a component housing 1 according to the invention with a mounting level for surface mounting on the component surface 2 of a printed circuit board 3.
  • the component housing 1 has an approximately flat chip carrier surface 4 having a chip carrier 5 made of electrically insulating plastic material, on which chip carrier surface 4
  • Semiconductor chip 6 is fastened with an integrated pressure sensor and associated electronic circuit, the pressure sensor and the circuit not being shown in the figures, and the electrode terminals 7 penetrating the chip carrier 5 and electrically connected to the semiconductor chip 6, their ends 8 Terminal pads (not shown) are placed on the mounting surface 2 of the circuit board 3 and soldered there.
  • the chip carrier 5 which is produced in particular in one piece by means of a plastic casting method known per se, comprises a lower part 9, which is raised relative to the assembly plane and consequently with respect to the mounting surface 2, on which the semiconductor chip 6 is supported, and side parts 10, 10a and 11 arranged on the sides of the lower part 9 , 11a, which form the laterally closing housing walls of the pressure sensor housing.
  • the chip carrier 5 is designed in the manner shown in FIG. 1, essentially to scale, in such a way that the outer boundary surfaces 12, 13 of the chip carrier 5 facing the component surface 2 of the printed circuit board 3 continuously increase from the lower edge regions 14, 15 to the central region 16 of the chip carrier 5 Have a distance to the mounting surface 2 of the circuit board 3.
  • the outer boundary surfaces 12, 13 of the chip carrier 5, seen in cross-section, have an essentially inverted V-shaped course or roof-shaped course such that the tip of the inverted V is arranged in the center, the greatest distance at this point from the circuit board a value of about 0.1 mm to about 0.5 mm.
  • the electrode connections 7 m penetrating the chip carrier 5 and electrically connected to the semiconductor chip 6 are designed in the form of connecting legs which are led to at least two sides of the chip carrier 5 and which are bent and cut into short, rocker-shaped connecting stubs 17. Such an arrangement ensures the lowest overall height of the sensor component.
  • the bends 18 of the connecting pins are completely accommodated within the side parts 10, 11 of the chip carrier 5, which has the advantage that the dimensions of the housing are reduced again, the size of the leadframe is reduced, and, moreover, the creepage distances for corrosive media are considerably increased
  • such an arrangement enables the leadframe or the electrode connections 7 to be mechanically anchored within the housing of the component and thus an additional increase in the overall mechanical stability.
  • this can be done by means of so-called trimming and shaping tools omitted, and at the same time the specified requirements for the ground clearance to be maintained are taken into account.
  • the mounting must be carried out favorably, since a good adhesion of the Bestuckkleber ⁇ is ensured and over ", possible tolerances in the circuit board 3 with respect to deflections are balanced, and there is counteracted tension thermal and / or mechanical type, since a contact with the circuit board 3 is only given by the connecting legs.
  • a wire contacting method can be used for the electrical connection of the pressure sensor integrated on the semiconductor chip 6 or the electronic circuit associated therewith with the electrode connections 7, in which bond wires 21 are attached to the chip on metallic chip connection locations 2la and connected to the corresponding connection Electrode legs are pulled.
  • a so-called Sp der contacting can also be used for this electrical connection, in which an electrically conductive system carrier plate or a so-called lead frame is used instead of bond wires.
  • the silicon integrated on the semiconductor chip 6 pressure sensor represents a so-called piezoresistive sensor, in which a thin silicon membrane is provided in the surface of the chip 6 by methods of micromechanics, which is electrically coupled with pressure-dependent resistors, which are also in the Silicon substrate are formed and are connected in a conventional manner in a bridge circuit. Also integrated in the semiconductor chip 6 is a circuit assigned to the sensor, which serves for signal processing (amplification and correction), but also for adjustment and compensation of the sensor.
  • semiconductor pressure sensors on which the invention is based are primarily suitable for applications in which the smallest overall size is important. for example in the case of pressure measurements in the motor vehicle sector, for example in the measurement of brake pressures, tire pressures, combustion chamber pressures and the like.
  • semiconductor pressure sensors that operate on the principle of piezoresistive pressure measurement, it also those ver ⁇ are reversible addition that work with capacitive measuring principles.
  • the chip carrier 5 is designed to be open on one side on its side 22 facing away from the component surface 2 of the printed circuit board 3, and has a support means 26 on the upper edge regions 24, 25 delimiting the opening 23 for a positive mechanical, play-free Connection with a holding means of a connector (not shown in detail) which can be placed on the chip carrier 5 such that when the connector is placed on the chip carrier 5, the holding means and the support means 26 alternately engage.
  • the support means 26 of the chip carrier 5 has on its outer circumference a circumferential abutment surface 29 which supports the holding means of the connecting piece. As shown, this can be designed in the form of a circumferential groove 30 on the edge region of the chip carrier 5, into which a groove 30 Outer periphery of the connector shaped spring engages at least partially.
  • the chip carrier 5 is filled with a flowable filler 32 which completely covers the semiconductor chip 6 and which in particular represents a gel which transmits pressures to the semiconductor pressure sensor almost without delay and without errors.
  • the gel serves on the one hand to protect the sensitive pressure sensor chip 6 and the further, in particular metallic components of the electronic component, in particular the bonding wires 21, the connecting pins 7 or the leadframe, from contact with the medium 33 to be measured, and in this way one Contamination of the component by ions or other harmful components of the medium 33, or the risk of corrosion due to the medium 33 to prevent.
  • the gel 32 serves as a filling material in order to keep the dead volume between the sensor component and the attached connector as small as possible, in order to avoid falsifications or delays in the measurement of the pressure.
  • the side of the connector facing the chip carrier 5 is closed with an elastic membrane.
  • the membrane is able to pass on the pressure pulse of the medium supplied to the sensor without significant falsification or time delay, but prevents the risk of contamination of an endangered component by ions or other harmful parts of the medium.
  • the side walls 24, 25 of the chip carrier 5, which is open on one side, can furthermore be equipped with a flow stop edge 36 arranged continuously on the inside.
  • the inside of the chip carrier 5 is only filled with the gel 32 up to the level of the flow stop edge 36.
  • This flow stop edge 36 enables a defined stop of the capillary forces of the adhesive gel 32 and thus prevents an undesired rising of the gel 32 beyond the housing edges due to capillary forces.
  • the flow stop edge advantageously also enables the effective thickness of the flowable filler to be kept as small as possible in order not to worsen the undesirable influence on the measurement sensitivity of the pressure sensor with regard to the accelerations or pressures to be measured, which is known to decrease with increasing Geldicke.

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Abstract

A component housing for surface mounting a semiconductor component on the components side (2) of a printed circuit board (3) consists of a chip-carrier (5) made of an electro-insulating material and having an approximately flat chip-carrying surface (4) to which is secured a semiconductor chip (6), preferably provided with an integrated electronic circuit, and electrode terminals (7) which extend through the chip-carrier, are electrically connected to the semiconductor chip (6) and are arranged in such a way that they enable a component to be surface mounted thereon. The distance between the components side (2) of the printed circuit board (3) and the outer delimiting surfaces (12, 13) of the chip-carrier (5) that face the components side (2) of the printed circuit board (3) continuously increases from the edge area (14, 15) to the central area (16) of the chip-carrier (5).

Description

Beschreibungdescription
Bezeichnung der Erfindung: Bauelementgehäuse für eine Oberlächenmontage eines Halbleiter-BauelementesDesignation of the invention: Component housing for surface mounting of a semiconductor component
Die Erfindung bezieht sich auf ein Bauelementgehäuse mit einer Montageebene für eine Oberflächenmontage eines Halbleiter-Bauelementes auf der Bestückungsoberfläche einer Leiterplatte, bestehend aus einem eine insbesondere annähernd ebene Chipträgerfläche aufweisenden Chipträger, der insbesondere aus elektrisch isolierendem Material besteht, auf welcher Chipträgerfläche ein Halbleiterchip, vorzugsweise mit einer integriert ausgebildeten elektronischen Schaltung befestigt ist, und den Chipträger durchsetzenden und elektrisch mit dem Halbleiterchip verbundenen Elektrodenanschlüssen mit einer oberflächenmontierbaren Anordnung .The invention relates to a component housing with a mounting level for a surface mounting of a semiconductor component on the component surface of a printed circuit board, consisting of a chip carrier having an in particular approximately flat chip carrier surface, which consists in particular of electrically insulating material, on which chip carrier surface a semiconductor chip, preferably with an integrated electronic circuit is fastened, and the electrode carrier passing through the chip carrier and electrically connected to the semiconductor chip with a surface-mountable arrangement.
Eine solche, auch als Surface Mounted Design (SMD) -Anordnung bekanntgewordene Oberflächenmontage ermöglicht die Applikati- on eines elektronischen Bauelementes auf einer Platine in besonders platzsparender bzw. niedrigbauender Weise. Bei dieser Montageform werden die Bauelementanschlüsse nicht mehr in Löcher der Leiterplatte wie bei der Einsteckmontage hineingesteckt, sondern auf Anschlußflecken auf der Leiterplatte auf- gesetzt und dort verlötet. Bauelemente für die Oberflächenmontage können kleiner sein als für die Einsteckmontage, da nicht mehr Loch- und Lötaugendurchmesser der Leiterplatte das Rastermaß der Anschlüsse bestimmen. Weiterhin entfallen auf der Leiterplatte die nur zur Bestückung notwendigen Löcher, wobei die lediglich noch zur Durchkontaktierung benötigtenSuch a surface mounting, also known as a surface mounted design (SMD) arrangement, enables the application of an electronic component on a circuit board in a particularly space-saving or low-profile manner. With this type of assembly, the component connections are no longer inserted into holes in the printed circuit board as in plug-in assembly, but instead are placed on connection spots on the printed circuit board and soldered there. Components for surface mounting can be smaller than for plug-in mounting, since no more hole and soldering eye diameters determine the grid dimension of the connections. Furthermore, there are no holes on the circuit board that are only required for assembly, the holes only required for through-plating
Löcher so klein wie technologisch möglich ausgeführt werden können. Da dazu noch eine doppelseitige Bestückung der Leiterplatte möglich ist, kann durch die Oberflächenmontage eine beträchtliche Platzeinsparung und erhebliche Kostensenkung erzielt werden. Eine besonders geringe Bauhöhe des elektronisches Bauelementes ergibt sich hierbei, wenn die den Chipträger durchsetzenden und elektrisch mit dem Halbleiterchip ver- bundenen Elektrodenanschlüsse in der Form von nach wenigstens zwei Seiten des Chipträgers herausgeführten Anschlußbeinchen ausgebildet sind, die zu kurzen schwingenförmigen Anschluß- stummeln gebogen und geschnitten sind.Holes can be made as small as technologically possible. Since a double-sided assembly of the circuit board is also possible, the surface mounting can result in considerable space savings and considerable cost reductions. A particularly low overall height of the electronic component is obtained if the ones that pass through the chip carrier and are electrically connected to the semiconductor chip tied electrode connections are designed in the form of lead pins which are led out to at least two sides of the chip carrier and which are bent and cut into short, rocker-shaped connection stubs.
Bei der Applikation von oberflächenmontierbaren Halbleiter- Bauelementen auf der Bestückungsoberfläche der Leiterplatte ist der möglichen, hauptsächlich toleranzbedingten Durchbiegung der Leiterplatte Rechnung zu tragen, welche andernfalls Probleme bei der Bestückung und beim späteren Einsatz der bestückten Leiterplatte bereiten könnte. Wegen der nur geringsten Bodenabstände der Enden der aus den Gehäuseseitenteilen ragenden Anschlußbeinchen im Bereich 1/10 mm erfordert die Bestückung solcher Bausteine auf der Leiterplatte exakt ar- beitende Trimm- und Formwerkzeuge bei der Herstelllung der Bausteine .When applying surface-mountable semiconductor components to the assembly surface of the printed circuit board, the possible, mainly tolerance-related deflection of the printed circuit board must be taken into account, which could otherwise cause problems with the assembly and later use of the assembled printed circuit board. Because the ends of the connecting legs protruding from the housing side parts are only very close to the bottom in the area of 1/10 mm, the assembly of such modules on the printed circuit board requires precisely working trimming and shaping tools during the manufacture of the modules.
Der vorliegenden Erfindung liegt die Aufgabe zugrunde, ein Bauelementgehäuse für eine Oberflächenmontage eines Halblei- ter-Bauelementes auf der Bestückungsoberfläche einer Leiterplatte zur Verfügung zu stellen, welches den Einsatz jeglicher Trim- und Formwerkzeuge bei der Bestückung der Leiterplatte erübrigt, und gleichzeitig einen Ausgleich toleranzbedingter Durchbiegungen der Leiterplatte sowie Verspannungen thermischer oder mechanischer Art der Leiterplatte ermöglicht.The present invention is based on the object of providing a component housing for surface mounting a semiconductor component on the component surface of a printed circuit board, which eliminates the use of any trim and shaping tools when populating the printed circuit board, and at the same time compensates for deflections caused by tolerances the circuit board as well as thermal or mechanical tension of the circuit board.
Diese Aufgabe wird durch ein Bauelementgehäuse nach Anspruch 1 gelöst.This object is achieved by a component housing according to claim 1.
Erfindungsgemäß ist vorgesehen, daß die der Bestückungsoberfläche der Leiterplatte, also der Montageebene zugewandt vorgesehenen äußeren Begrenzungsflächen des Chipträgers derart ausgebildet sind, daß sie einen vom Randbereich zum Mittenbe- reich des Chipträgers stetig zunehmenden Abstand zur Montageebene aufweisen. Durch die erfindungsgemäße Anordnung wird durch Ausbildung des Unterteiles des Gehäuses in einer Dachform dieses von der Bestückungsoberfläche der Leiterplatte abgehoben. Dadurch kann der Einsatz eines Trim- und Formwerkzeuges gänzlich ent- fallen, und damit auch die Anforderungen an den Bodenabstand zwischen der Unterseite des Bauelementgehäuses und der Bestückungsoberfläche der Leiterplatte niedriger angesetzt werden. Allgemein wird die Bestückung der Leiterplatte günstiger, da eine gute Adhäsion des bei der Bestückung zum Einsatz kommenden Bestückklebers gewährleistet ist, mögliche Toleranzen der Leiterplatte m Form von Durchbiegungen ausgeglichen werden, und Verspannungen thermischer oder mechanischer Art entgegengewirkt wird, da ein Kontakt des Bauelementes mit der Leiterplatte nur durch die Anschlußbeinchen gegeben ist.According to the invention, it is provided that the outer boundary surfaces of the chip carrier, which are provided facing the component surface of the printed circuit board, that is to say toward the assembly plane, are designed such that they have a distance from the assembly plane that increases continuously from the edge region to the center region of the chip carrier. As a result of the arrangement according to the invention, by forming the lower part of the housing in a roof shape, it is lifted off the assembly surface of the printed circuit board. As a result, the use of a trim and molding tool can be dispensed with entirely, and the requirements for the ground clearance between the underside of the component housing and the assembly surface of the printed circuit board can also be set lower. In general, the assembly of the printed circuit board is cheaper because it ensures good adhesion of the placement adhesive used in the assembly, possible tolerances of the printed circuit board in the form of deflections are compensated for, and tension of a thermal or mechanical nature is counteracted, since contact of the component with the Printed circuit board is given only by the connecting legs.
Bei einer bevorzugten Ausführung der Erfindung ist vorgesehen, daß die der Bestückungsoberfläche der Leiterplatte zugewandten äußeren Begrenzungsflächen des Chipträgers im Querschnitt des Chiptragers einen vom Inneren des Chipträgers ge- sehen im wesentlichen V-förmigen Verlauf besitzen. Hierbei kann bei einer beispielhaften Ausbildung vorgesehen sein, daß der größte Abstand der der Bestückungsoberfläche zugewandten äußeren Begrenzungsflächen des Chiptragers zur Leiterplatte einen Wert von etwa 0,1 bis etwa 0,5 mm besitzt.In a preferred embodiment of the invention, it is provided that the outer boundary surfaces of the chip carrier facing the component surface of the printed circuit board have a substantially V-shaped profile in the cross section of the chip carrier as seen from the inside of the chip carrier. In an exemplary embodiment, it can be provided that the greatest distance between the outer boundary surfaces of the chip carrier facing the component surface and the printed circuit board has a value of approximately 0.1 to approximately 0.5 mm.
Dem Prinzip der Erfindung folgend ist vorgesehen, daß die den Chipträger durchsetzenden und elektrisch mit dem Halbleiter- chip verbundenen Elektrodenanschlüssen in der Form von nach wenigstens einer Seite, bevorzugt nach zwei Seiten des Chip- trägers herausgeführten Anschlußbeinchen ausgebildet sind, die zu kurzen schwingenförmigen Anschlußstummeln gebogen und geschnitten sind.According to the principle of the invention, it is provided that the electrode connections passing through the chip carrier and electrically connected to the semiconductor chip are designed in the form of connecting legs which are led out to at least one side, preferably to two sides, of the chip carrier and which are bent into short, rocker-shaped connecting stubs and are cut.
Bei einer besonders vorteilhaften Ausführung kann vorgesehen sein, daß der aus elektrisch isolierendem Material und insbesondere einstückig hergestellte Chipträger ein gegenüber der Bestückungsoberfläche der Leiterplatte abgehobenes Unterteil und zu beiden Seiten des Unterteiles angeordnete Seitenteile aufweist Die Biegungen der Anschlußbeinchen sind bei einer besonders bevorzugten Ausfuhrungs orm teilweise oder voll- standig innerhalb der Seitenteile des Chiptragers aufgenom- men.In a particularly advantageous embodiment, it can be provided that the chip carrier, which is made of electrically insulating material and in particular is made in one piece, has a lower part which is raised relative to the component surface of the printed circuit board and has side parts arranged on both sides of the lower part. In a particularly preferred embodiment, the bends of the connection pins are partially or completely accommodated within the side parts of the chip carrier.
Durch die teilweise bzw vollständige Integration der Bem- chenbiegungen innerhalb des Gehäuses kann das Gehäuse des elektronischen Bauelementes in seinen Abmessungen nocn weiter verkleinert, und dar ber hinaus die Große des metallischen Systemtragers bzw Leadframe verkleinert werden Durch das Vorεenen der Beinchenbiegungen innerhalb des SMD-Gehauses werden die Kriechwege für korrosive Medien erheblich verlängert und somit die Gefahr einer Penetration durch Chemikalien wesentlich reduziert Gleichzeitig wird eine mechanische Verankerung der Anschlußbeinchen innerhalb des Bauteiles erreicht, was letztlich zu einer Erhöhung der elektrischen Aus- fallsicherheit beitragtDue to the partial or complete integration of the metal bends within the housing, the dimensions of the housing of the electronic component can still be reduced, and moreover the size of the metallic system support or lead frame can be reduced by the leg bends inside the SMD housing the creepage distances for corrosive media are considerably extended and thus the risk of penetration by chemicals is significantly reduced. At the same time, the connection pins are mechanically anchored within the component, which ultimately contributes to an increase in the electrical reliability
Bei einer weiterhin bevorzugten Ausfuhrung kann vorgesehen sein, daß die aus den Seitenteilen des Chiptragers ragenden Enden der Anschlußbeinchen gegenüber der Bestückungsoberfläche αer Leiterplatte eine geringfügige Neigung besitzen, derart, daß s e vom Mittenbreich des Chiptragers gesehen nach unten in Richtung der Montageebene verlaufenIn a further preferred embodiment, it can be provided that the ends of the connecting pins protruding from the side parts of the chip carrier have a slight inclination with respect to the component surface of the printed circuit board, such that they extend downward from the center region of the chip carrier in the direction of the assembly plane
In besonders bevorzugter Weise ist der Chiptrager einstuckig aus einem Thermoplastkunststoffmaterial hergestelltIn a particularly preferred manner, the chip carrier is made in one piece from a thermoplastic material
Weitere Merkmale, Vorteile und Zweckmäßigkeiten der Erfindung ergeben sich aus der Beschreibung eines Ausfuhrungsbeispielε anhand der Zeichnung. Es zeigtFurther features, advantages and expediencies of the invention result from the description of an exemplary embodiment with reference to the drawing. It shows
Figur 1 eine schematische Schnittansicht eines Bauelementge- hauses gemäß einem Ausfuhrungsbeispiel der Erfindung, und Figur 2 eine schematische Gesamtansicht des Chiptragers eines Bauelementgehäuses nach dem Ausführungsbeispiel.1 shows a schematic sectional view of a component housing according to an exemplary embodiment of the invention, and Figure 2 is a schematic overall view of the chip carrier of a component housing according to the embodiment.
Die Figuren zeigen ein Ausführungsbeispiel eines erfindungs- gemäßen Bauelementgehäuses 1 mit einer Montageebene für eine Oberflächenmontage auf der Bestückungsoberfläche 2 einer Leiterplatte 3. Das Bauelementgehäuse 1 besitzt einen eine annähernd ebene Chipträgerfläche 4 aufweisenden Chipträger 5 aus elektrisch isolierendem Kunststoffmaterial, auf welcher Chip- trägerfläche 4 ein Halbleiterchip 6 mit einem integriert ausgebildeten Drucksensor und diesem zugeordnete elektronischen Schaltung befestigt ist, wobei der Drucksensor und die Schaltung in den Figuren nicht näher dargestellt sind, und den Chipträger 5 durchsetzenden und elektrisch mit dem Halblei - terchip 6 verbundenen Elektrodenanschlüssen 7, deren Enden 8 auf (nicht näher dargestellten) Anschlußflecken auf der Bestückungsoberfläche 2 der Leiterplatte 3 aufgesetzt und dort verlötet werden. Der insbesondere einstückig, vermittels eines an sich bekannten Kunststoffgießverfahrens hergestellte Chipträger 5 umfaßt ein gegenüber der Montageebene und folglich gegenüber der Bestückungsoberfläche 2 abgehobenes Unterteil 9, auf dem der Halbleiterchip 6 abgestützt ist, sowie zu den Seiten des Unterteiles 9 angeordnete Seitenteile 10, 10a und 11, 11a, welche die seitlich abschließenden Gehäusewan- d ngen des Drucksensorgehäuses bilden. Der Chipträger 5 ist nach der in Figur 1 im wesentlichen maßstabsgerecht dargestellten Weise derart ausgebildet, daß die der Bestückungsoberfläche 2 der Leiterplatte 3 zugewandten äußeren Begrenzungsflächen 12, 13 des Chipträgers 5 einen von den unteren Randbereichen 14, 15 zum Mittenbereich 16 des Chipträgers 5 stetig zunehmenden Abstand zur Bestückungsoberfläche 2 der Leiterplatte 3 aufweisen. Insbesondere besitzen die äußeren Begrenzungsflächen 12, 13 des Chipträgers 5 im Querschnitt gesehen einen im wesentlichen umgekehrten V-förmigen Verlauf, bzw. dachförmig gestalteten Verlauf, derart, daß die Spitze des umgekehrten V mittig angeordnet ist, wobei der größte Abstand an dieser Stelle zur Leiterplatte eine Wert von etwa 0,1 mm bis etwa 0,5 mm besitzt. Weiterhin ist vorgesehen, daß die den Chiptrager 5 durchsetzenden und elektrisch mit dem Halbleiterchip 6 verbundenen Elektrodenanschlusse 7 m der Form von nach wenigstens zwei Seiten des Chiptragers 5 her- ausgeführten Anschlußbeinchen ausgebildet sind, die zu kurzen schwingenformigen Anschlußstummeln 17 gebogen und geschnitten sind Eine solche Anordnung gewahrleistet eine geringste Bauhohe des Sensorbauelementes. Weiterhin sind die Biegungen 18 der Anschlußbeinchen vollständig innerhalb der Seitenteile 10, 11 des Chiptragers 5 aufgenommen, was den Vorteil besitzt, daß das Gehäuse in seinen Abmessungen nochmals verkleinert, die Große des Leadframe verkleinert ist, und im übrigen die Kriechwege für korrosive Medien erheblich verlan gert und somit eine Durchsetzung mit Chemikalien reduziert wird Darüber hinaus ermöglicht eine solche Anordnung eine mechanische Verankerung des Leadframe bzw der Elektrodenanschlusse 7 innerhalb des Gehäuses des Bauteiles und damit eine zusatzliche Erhöhung der mechanischen Stabilität insgesamt Weiterhin besitzen die aus den Seitenteilen 10, 11 des Chiptragers 5 ragenden Enden 8 der Anschlußbeinchen gegenüber der Bestückungsoberfläche 2 der Leiterplatte 3 eine geringfügige Neigung dergestalt, daß die der Bestückungsoberfläche 2 zugewandte äußerste Kante 19 des Endes 8 der Anschlußbeinchen einen Abstand von etwa 0,1 mm zu der strichliert dargestell- ten Hilfsebene 20 besitzt Durch diese Anordnung wird gewährleistet, daß ein Kontakt des Bauelementes mit der Bestuk- kungsoberflache 2 der Leiterplatte 3 nur durch die äußersten Enden 8 der Anschlußbeinchen gegeben ist, was zusammen mit der dargestellten, gunstigen Gehauseanordnung, bei dem der Unterteil von der Leiterplatte abgehoben ausgebildet ist und das Gehäuse wie dargestellt in Dachform ausgebildet ist, den möglichen Durchbiegungen der Leiterplatte 3 Rechnung getragen w rd, und darüber hinaus Probleme bei der Bestückung des Bauelementes auf der Leiterplatte 3, sowie beim spateren Einsatz der Leiterplatte 3 vermieden werden. In vorteilhafter Weise kann hierbei ein bislang bei der Bestückung erforderliches Einstellen vermittels sogenannter Trimm und Formwerkzeugen entfallen, und gleichzeitig den vorgegebenen Anforderungen an den einzuhaltenden Bodenabstand Rechnung getragen werden. Die Bestückung ist günstiger durchzuführen, da eine gute Adhäsion des Bestuckkleberε gewährleistet ist, und darüber 'hinaus werden mögliche Toleranzen der Leiterplatte 3 im Hinblick auf Durchbiegungen ausgeglichen, und es wird Verspannungen thermischer und/oder mechanischer Art entgegengewirkt, da ein Kontakt mit der Leiterplatte 3 nur durch die Anschlußbeinchen gegeben ist.The figures show an exemplary embodiment of a component housing 1 according to the invention with a mounting level for surface mounting on the component surface 2 of a printed circuit board 3. The component housing 1 has an approximately flat chip carrier surface 4 having a chip carrier 5 made of electrically insulating plastic material, on which chip carrier surface 4 Semiconductor chip 6 is fastened with an integrated pressure sensor and associated electronic circuit, the pressure sensor and the circuit not being shown in the figures, and the electrode terminals 7 penetrating the chip carrier 5 and electrically connected to the semiconductor chip 6, their ends 8 Terminal pads (not shown) are placed on the mounting surface 2 of the circuit board 3 and soldered there. The chip carrier 5, which is produced in particular in one piece by means of a plastic casting method known per se, comprises a lower part 9, which is raised relative to the assembly plane and consequently with respect to the mounting surface 2, on which the semiconductor chip 6 is supported, and side parts 10, 10a and 11 arranged on the sides of the lower part 9 , 11a, which form the laterally closing housing walls of the pressure sensor housing. The chip carrier 5 is designed in the manner shown in FIG. 1, essentially to scale, in such a way that the outer boundary surfaces 12, 13 of the chip carrier 5 facing the component surface 2 of the printed circuit board 3 continuously increase from the lower edge regions 14, 15 to the central region 16 of the chip carrier 5 Have a distance to the mounting surface 2 of the circuit board 3. In particular, the outer boundary surfaces 12, 13 of the chip carrier 5, seen in cross-section, have an essentially inverted V-shaped course or roof-shaped course such that the tip of the inverted V is arranged in the center, the greatest distance at this point from the circuit board a value of about 0.1 mm to about 0.5 mm. Furthermore, it is provided that the electrode connections 7 m penetrating the chip carrier 5 and electrically connected to the semiconductor chip 6 are designed in the form of connecting legs which are led to at least two sides of the chip carrier 5 and which are bent and cut into short, rocker-shaped connecting stubs 17. Such an arrangement ensures the lowest overall height of the sensor component. Furthermore, the bends 18 of the connecting pins are completely accommodated within the side parts 10, 11 of the chip carrier 5, which has the advantage that the dimensions of the housing are reduced again, the size of the leadframe is reduced, and, moreover, the creepage distances for corrosive media are considerably increased In addition, such an arrangement enables the leadframe or the electrode connections 7 to be mechanically anchored within the housing of the component and thus an additional increase in the overall mechanical stability. Furthermore, they have the side parts 10, 11 of the chip carrier 5 projecting ends 8 of the connection legs relative to the assembly surface 2 of the printed circuit board 3 have a slight inclination such that the outermost edge 19 of the end 8 of the connection legs facing the assembly surface 2 represents a distance of approximately 0.1 mm from the dashed line This arrangement ensures that contact of the component with the mounting surface 2 of the printed circuit board 3 is only provided by the outermost ends 8 of the connecting legs, which together with the inexpensive housing arrangement shown, in which the lower part is lifted from the printed circuit board and the housing is designed in the shape of a roof, as shown, the possible deflections of the printed circuit board 3 are taken into account, and problems in the assembly of the component on the printed circuit board 3 and in the later use of the printed circuit board 3 are also avoided . Advantageously, this can be done by means of so-called trimming and shaping tools omitted, and at the same time the specified requirements for the ground clearance to be maintained are taken into account. The mounting must be carried out favorably, since a good adhesion of the Bestuckkleberε is ensured and over ", possible tolerances in the circuit board 3 with respect to deflections are balanced, and there is counteracted tension thermal and / or mechanical type, since a contact with the circuit board 3 is only given by the connecting legs.
Für die elektrische Verbindung des auf dem Halbleiterchip 6 integriert ausgebildeten Drucksensors bzw. der diesem zugeordneten elektronischen Schaltung mit den Elektrodenanschlüssen 7 kann wie dargestellt ein Drahtkontaktierverfahren zum Einsatz gelangen, bei dem Bonddrähte 21 auf metallischen Chipanschlußstellen 2la auf dem Chip befestigt und an das entsprechend zu verbindende Elektrodenbeinchen gezogen werden. Darüber hinaus kann für diese elektrische Verbindung auch eine sogenannte Sp der-Kontaktierung Verwendung finden, bei der anstelle von Bonddrähten eine elektrisch leitende Systemträgerplatte bzw. ein sogenanntes Leadframe zum Einsatz gelangt .As shown, a wire contacting method can be used for the electrical connection of the pressure sensor integrated on the semiconductor chip 6 or the electronic circuit associated therewith with the electrode connections 7, in which bond wires 21 are attached to the chip on metallic chip connection locations 2la and connected to the corresponding connection Electrode legs are pulled. In addition, a so-called Sp der contacting can also be used for this electrical connection, in which an electrically conductive system carrier plate or a so-called lead frame is used instead of bond wires.
Der auf dem Halbleiterchip 6 aus Silizium integrierte Druck- sensor stellt einen sogenannten piezoresistiven Sensor dar, bei dem eine in der Oberfläche des Chips 6 nach Methoden der Mikromechanik gefertigte dünne Silizium-Membran vorgesehen ist, die elektrisch mit druckabhängigen Widerstanden gekoppelt ist, welche gleichfalls im Silizium-Substrat ausgebildet sind und in an sich bekannter Weise in einer Brückenschaltung geschaltet sind. Gleichfalls im Halbleiterchip 6 integriert ist eine dem Sensor zugeordnete Schaltung, die der Signalaufbereitung (Verstärkung und Korrektur) , aber auch einem Abgleich und Kompensation des Sensors dient. Gegenüber sonsti- gen Bauformen eignen sich solche, der Erfindung zugrunde liegenden Halbleiter-Drucksensoren vornehmlich für solche Anwendungen, bei denen es auf eine geringste Baugröße ankommt, al- so beispielsweise bei Druckmessungen im Kraftfahrzeugbereich, beispielsweise bei der Messung von Bremsdrücken, Reifendrük- ken, Brennraumdrücken und dergleichen. Neben Halbleiter- Drucksensoren, die nach dem Prinzip der piezoresistiven Druckmessung arbeiten, sind darüber hinaus auch solche ver¬ wendbar, die mit kapazitiven Meßprinzipien arbeiten.The silicon integrated on the semiconductor chip 6 pressure sensor represents a so-called piezoresistive sensor, in which a thin silicon membrane is provided in the surface of the chip 6 by methods of micromechanics, which is electrically coupled with pressure-dependent resistors, which are also in the Silicon substrate are formed and are connected in a conventional manner in a bridge circuit. Also integrated in the semiconductor chip 6 is a circuit assigned to the sensor, which serves for signal processing (amplification and correction), but also for adjustment and compensation of the sensor. Compared to other designs, such semiconductor pressure sensors on which the invention is based are primarily suitable for applications in which the smallest overall size is important. for example in the case of pressure measurements in the motor vehicle sector, for example in the measurement of brake pressures, tire pressures, combustion chamber pressures and the like. In addition to semiconductor pressure sensors that operate on the principle of piezoresistive pressure measurement, it also those ver ¬ are reversible addition that work with capacitive measuring principles.
Bei dem in Figur 1 dargestellten Ausführungsbeispiel ist der Chipträger 5 an seiner der Bestückungsoberfläche 2 der Lei- terplatte 3 abgewandten Seite 22 einseitig offen ausgebildet, und besitzt an den die Öffnung 23 begrenzenden oberen Randbereichen 24, 25 ein Stützmittel 26 für eine formschlüssig mechanische, spielfreie Verbindung mit einem Haltemittel eines auf den Chipträger 5 aufsetzbaren (nicht näher dargestellten) Anschlußstückes derart, daß beim Aufsetzen des Anschlußstük- kes auf den Chipträger 5 das Haltemittel und das Stützmittel 26 wechselweise in Eingriff gelangen. Zu diesem Zweck besitzt das Stützmittel 26 des Chipträgers 5 an seinem Außenumfang eine umlaufende und das Haltemittel des Anschlußstückes ab- stützende Widerlagerfläche 29. Diese kann wie dargestellt in der Form einer am Randbereich des Chipträgers 5 umlaufend ausgebildeten Nut 30 ausgebildet sein, in welche eine am Außenumfang des Anschlußstückes geformte Feder wenigstens teilweise eingreift.In the exemplary embodiment shown in FIG. 1, the chip carrier 5 is designed to be open on one side on its side 22 facing away from the component surface 2 of the printed circuit board 3, and has a support means 26 on the upper edge regions 24, 25 delimiting the opening 23 for a positive mechanical, play-free Connection with a holding means of a connector (not shown in detail) which can be placed on the chip carrier 5 such that when the connector is placed on the chip carrier 5, the holding means and the support means 26 alternately engage. For this purpose, the support means 26 of the chip carrier 5 has on its outer circumference a circumferential abutment surface 29 which supports the holding means of the connecting piece. As shown, this can be designed in the form of a circumferential groove 30 on the edge region of the chip carrier 5, into which a groove 30 Outer periphery of the connector shaped spring engages at least partially.
Der Chipträger 5 ist mit einem den Halbleiterchip 6 vollständig überdeckenden, fließfähigen Füllmittel 32 befüllt, welches insbesondere ein Gel darstellt, welches Drücke nahezu verzögerungsfrei sowie fehlerfrei auf den Halbleiterdrucksen- sor überträgt. Das Gel dient zum einen dazu, den empfindlichen Drucksensorchip 6 und die weiteren, insbesondere metallischen Bestandteile des elektronischen Bauelementes, insbesondere die Bonddrähte 21, die Anschlußbeinchen 7 bzw. das Leadframe vor Berührungen mit dem zu messenden Medium 33 zu schützen, und auf diese Weise eine Kontamination des Bauteiles durch Ionen oder andere schädliche Bestandteile des Mediums 33, oder die Gefahr einer Korrosion aufgrund des Mediums 33 zu verhindern. Darüber hinaus dient das Gel 32 als Füllmaterial, um das Totvolumen zwischen dem Sensor-Bauelement und dem aufgesetzten Anschlußstück möglichst gering zu halten, um Verfälschungen bzw. zeitliche Verzögerungen bei der Messung des Druckes zu vermeiden. Zur weiteren Trennung des zu messenden Mediums von dem Halbleiterchip 6 bzw. den korrosions- gefährdeten Bestandteilen des elektronischen Bauelementes ist des weiteren vorgesehen, daß die dem Chipträger 5 zugewandte Seite des Anschlußstückes mit einer elastischen Membran ver- schlössen ist. Die Membran ist in der Lage, den Druckimpuls des an den Sensor herangeführten Mediums ohne wesentliche Verfälschung bzw. zeitliche Verzögerung weiterzugeben, verhindert jedoch die Gefahr der Kontamination eines gefährdeten Bestandteiles durch Ionen oder andere schädliche Teile des Mediums .The chip carrier 5 is filled with a flowable filler 32 which completely covers the semiconductor chip 6 and which in particular represents a gel which transmits pressures to the semiconductor pressure sensor almost without delay and without errors. The gel serves on the one hand to protect the sensitive pressure sensor chip 6 and the further, in particular metallic components of the electronic component, in particular the bonding wires 21, the connecting pins 7 or the leadframe, from contact with the medium 33 to be measured, and in this way one Contamination of the component by ions or other harmful components of the medium 33, or the risk of corrosion due to the medium 33 to prevent. In addition, the gel 32 serves as a filling material in order to keep the dead volume between the sensor component and the attached connector as small as possible, in order to avoid falsifications or delays in the measurement of the pressure. To further separate the medium to be measured from the semiconductor chip 6 or the corrosion-prone components of the electronic component, it is further provided that the side of the connector facing the chip carrier 5 is closed with an elastic membrane. The membrane is able to pass on the pressure pulse of the medium supplied to the sensor without significant falsification or time delay, but prevents the risk of contamination of an endangered component by ions or other harmful parts of the medium.
Die Seitenwandungen 24, 25 des einseitig offenen Chiptragers 5 können des weiteren mit einer auf der Innenseite durchgehend angeordneten Flußstopkante 36 ausgestattet sein. In die- sem Fall ist die Innenseite des Chipträgers 5 lediglich bis zur Höhe der Flußstopkante 36 mit dem Gel 32 aufgefüllt. Diese Flußstopkante 36 ermöglicht einen definierten Stop der Kapillarkräfte des adhäsiven Gels 32 und verhindert somit aufgrund von Kapillarkräften ein unerwünschtes Hochsteigen des Gels 32 über die Gehäuseränder hinaus.The side walls 24, 25 of the chip carrier 5, which is open on one side, can furthermore be equipped with a flow stop edge 36 arranged continuously on the inside. In this case, the inside of the chip carrier 5 is only filled with the gel 32 up to the level of the flow stop edge 36. This flow stop edge 36 enables a defined stop of the capillary forces of the adhesive gel 32 and thus prevents an undesired rising of the gel 32 beyond the housing edges due to capillary forces.
In vorteilhafter Weise ermöglicht die Flußstopkante bei entsprechend gestalteter Anordnung auch, daß die wirksame Dicke des fließfähigen Füllmittels möglichst gering gehalten werden kann, um den unerwünschten Einfluß auf die Meßempfindlichkeit des Drucksensors im Hinblick auf die zu messenden Beschleunigungen bzw. Drücke nicht zu sehr zu verschlechtern, welche bekanntermaßen mit zunehmender Geldicke herabgesetzt wird. BezugszeichenlisteWith an appropriately designed arrangement, the flow stop edge advantageously also enables the effective thickness of the flowable filler to be kept as small as possible in order not to worsen the undesirable influence on the measurement sensitivity of the pressure sensor with regard to the accelerations or pressures to be measured, which is known to decrease with increasing Geldicke. Reference list

Claims

Patentansprüche claims
1 Bauelementgehause für eine Oberflachenmontage eines Halbleiter-Bauelementes auf der Bestückungsoberfläche (2) einer Leiterplatte (3) , bestehend aus einem eine Chiptragerflache (4) aufweisenden Chiptrager (5) , auf welcher Chiptragerflache1 component housing for a surface mounting of a semiconductor component on the component surface (2) of a printed circuit board (3), consisting of a chip carrier (5) having a chip carrier surface (4), on which chip carrier surface
(4) ein Halbleiterchip (6) befestigt ist, und den Chiptrager(4) a semiconductor chip (6) is attached, and the chip carrier
(5) durchsetzenden und elektrisch mit dem Halbleiterchip (6) verbundenen Elektrodenanschlussen (7) mit einer oberflachen- montierbaren Anordnung, dadurch gekennzeichnet, daß die der Bestückungsoberfläche (2) der Leiterplatte (3) zugewandten äußeren Begrenzungsflachen (12, 13) des Chiptragers (5) derart ausgebildet sind, daß sie einen vom Randbereich (14, 15) zum Mittenbereich (16) des Chiptragers (5) stetig zunehmenαen Abstand zur Bestückungsoberfläche (2) der Leiterplatte (3) aufweisen(5) penetrating and electrically connected to the semiconductor chip (6) electrode connections (7) with a surface-mountable arrangement, characterized in that the outer surface (12), 13) of the chip carrier (2) facing the circuit board (3) of the chip carrier ( 5) are designed such that they have a constantly increasing distance from the edge area (14, 15) to the center area (16) of the chip carrier (5) from the assembly surface (2) of the printed circuit board (3)
2. Bauelementgehause nach Anspruch 1, dadurch gekennzeichnet, daß die der Bestückungsoberfläche (2) der Leiterplatte (3) zugewandten äußeren Begrenzungsflachen (12, 13) des Chiptragers (5) im Querschnitt des Chiptragers (5) einen im wesentlichen umgekehrten V- formigen Verlauf besitzen2. Component housing according to claim 1, characterized in that the mounting surface (2) of the circuit board (3) facing outer boundary surfaces (12, 13) of the chip carrier (5) in cross section of the chip carrier (5) has a substantially reverse V-shaped course have
3 Bauelementgehause nach Anspruch 1 oder 2, dadurch gekennzeichnet daß der größte Abstand der der Bestückungsoberfläche (2) zugewandten äußeren Begrenzungsflachen (12, 13) des Chiptragers (5) zur Leiterplatte (3) einen Wert von etwa 0 1 bis etwa 0 5 mm besitzt.3 component housing according to claim 1 or 2, characterized in that the greatest distance of the mounting surface (2) facing outer boundary surfaces (12, 13) of the chip carrier (5) to the circuit board (3) has a value of about 0 1 to about 0 5 mm .
4. Bauelementgehause nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß die den Chiptrager (5) durchsetzenden und elektrisch mit dem Halbleiterchip (6) verbundenen Elektrodenanschlussen (7) in der Form von nach wenigstens ei- ner Seite des Chiptragers (5) herausgeführten Anschlußbeinchen ausgebildet sind, die zu kurzen schwmgenformigen Anschlußstummeln (17) gebogen und geschnitten sind. 4. Component housing according to one of claims 1 to 3, characterized in that the electrode carrier (5) penetrating the chip carrier (5) and electrically connected to the semiconductor chip (6) in the form of towards at least one side of the chip carrier (5) led out lead legs are formed, which are bent and cut into short spongy connection stubs (17).
5. Bauelementgehause nach einem der Ansprüche 1 bis 5 , dadurch gekennzeichnet, daß der aus elektrisch isolierendem Material und insbesondere einstückig hergestellte Chipträger (5) ein gegenüber der Bestückungsoberfläche (2) der Leiterplatte (3) abgehobenes Unterteil (9) und zu beiden Seiten des Unterteiles (9) angeordnete Seitenteile (10, 10a, 11, lla) aufweist .5. Component housing according to one of claims 1 to 5, characterized in that the chip carrier (5) made of electrically insulating material and in particular made in one piece with respect to the component surface (2) of the circuit board (3) lifted lower part (9) and on both sides of Has lower part (9) arranged side parts (10, 10a, 11, lla).
6. Bauelementgehause nach Anspruch 5, dadurch gekennzeichnet, daß jeweils wenigstens eine Biegung (18) der Anschlußbeinchen annähernd vollständig innerhalb der Seitenteile (10, 10a, 11, lla) des Chipträgers (5) aufgenommen ist.6. Component housing according to claim 5, characterized in that at least one bend (18) of the connecting pins is almost completely received within the side parts (10, 10a, 11, lla) of the chip carrier (5).
7. Bauelementgehause nach Anspruch 5 oder 6, dadurch gekennzeichnet, daß die aus den Seitenteilen (10, 10a, 11, lla) des Chipträgers (5) ragenden Enden (8) der Anschlußbeinchen gegenüber der Bestückungsoberfläche (2) der Leiterplatte (3) eine geringfügige Neigung besitzen, derart, daß sie vom Mit- tenbereich (16) des Chiptragers (5) gesehen nach unten in Richtung der Bestückungsoberfläche (2) der Leiterplatte (3) verlaufen .7. Component housing according to claim 5 or 6, characterized in that from the side parts (10, 10a, 11, lla) of the chip carrier (5) projecting ends (8) of the connection legs relative to the mounting surface (2) of the circuit board (3) one have a slight inclination such that they run downwards from the central region (16) of the chip carrier (5) in the direction of the component surface (2) of the printed circuit board (3).
8. Bauelementgehause nach einem der Ansprüche 1 bis 7, da- durch gekennzeichnet, daß der Chipträger (5) aus einem Thermoplastkunststoffmaterial hergestellt ist. 8. Component housing according to one of claims 1 to 7, characterized in that the chip carrier (5) is made of a thermoplastic material.
EP97931678A 1996-06-28 1997-06-27 Component housing for surface mounting a semiconductor component Withdrawn EP0907965A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE19626098 1996-06-28
DE19626082 1996-06-28
DE19626082A DE19626082C2 (en) 1996-06-28 1996-06-28 Component housing for surface mounting of a semiconductor component
DE19626098 1996-06-28
PCT/DE1997/001358 WO1998000864A1 (en) 1996-06-28 1997-06-27 Component housing for surface mounting a semiconductor component

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WO (1) WO1998000864A1 (en)

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US6058020A (en) 2000-05-02
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