EP0972282B1 - Device for controlling a matrix display cell - Google Patents
Device for controlling a matrix display cell Download PDFInfo
- Publication number
- EP0972282B1 EP0972282B1 EP98949077A EP98949077A EP0972282B1 EP 0972282 B1 EP0972282 B1 EP 0972282B1 EP 98949077 A EP98949077 A EP 98949077A EP 98949077 A EP98949077 A EP 98949077A EP 0972282 B1 EP0972282 B1 EP 0972282B1
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- European Patent Office
- Prior art keywords
- signal
- transistor
- elementary
- control circuit
- column
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2011—Display of intermediate tones by amplitude modulation
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0814—Several active elements per pixel in active matrix panels used for selection purposes, e.g. logical AND for partial update
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0243—Details of the generation of driving signals
- G09G2310/0259—Details of the generation of driving signals with use of an analog or digital ramp generator in the column driver or in the pixel circuit
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/06—Details of flat display driving waveforms
- G09G2310/066—Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
Definitions
- the present invention relates to a control device matrix, more particularly a matrix control device used in a flat screen such as a matrix type liquid crystal display active or other types of flat screen.
- a matrix control device is used, for example, to control the cells of a flat screen such than liquid crystal cells.
- a screen to liquid crystals of the active matrix type also known by the abbreviation AM-LCD.
- Such an active matrix type liquid crystal screen is shown in Figure 1.
- the screen consists of a certain number of electro-optical cells each formed by an electrode and a counter-electrode enclosing the liquid crystal. These cells are referenced XL in said figure.
- the electro-optical cells are arranged in rows and columns, and each controlled by a switching circuit forming part of a control device matrix type.
- the circuit switching is carried out by a transistor T of which one of the electrodes is connected to a column Cj and the other electrode of which is connected to the XL electro-optical cell.
- the gate of transistor T is connected to one of the lines Li of the control device.
- the XL electro-optical cell is associated with a capacity of CP storage mounted in parallel on the capacity formed by the cell electro-optics at the output of transistor T.
- the assembly formed by the transistor T and the capacity CP form an elementary control circuit referenced Pij in Figure 1.
- each of the lines of selection Li is connected to a control circuit 2 or "line driver" which successively applies a pulse of control with a voltage typically varying between - 10 and + 20 volts.
- each of the columns Cj or rows of data is connected to a column control circuit 3 or "column driver" which sends on the columns Cj an analog signal corresponding to the video signal representing more particularly a gray scale whose voltage typically varies between + and - 5 volts.
- the control of a XL electro-optical cell is carried out as follows.
- the transistor switching T becomes conducting. Therefore, the analog voltage applied to column Cj is transmitted across the electrodes of the XL electro-optical cell which displays a gray level corresponding to the data signal.
- a matrix control device of this type has switching transistors which are most often constituted by TFT thin film transistors for "Thin Film Transistor ".
- Such a device is generally made of amorphous silicon.
- the lines and columns control circuits 2,3 can be integrated on the substrate plate on which the flat screen is made or be done independently. When integrated on the plate substrate, they are also made using amorphous silicon.
- Another problem encountered with this structure when it is made with polycrystalline silicon or silicon transistors monocrystalline, relates to the leakage current of the switching transistor T in the blocked state which tends to discharge the elementary points or cells electro-optics XL.
- the object of the present invention is to remedy the drawbacks cited above by proposing a matrix control device having a new structure for the control circuit elementary of each elementary point, this structure being particularly well suited to the use of polycrystalline silicon or monocrystalline for the production of transistors or other semiconductor circuits.
- the present invention therefore relates to a device for matrix control comprising a set of control circuits arranged in rows and columns and each commanding an elementary point, the state of each elementary point being a function of first and second control signals applied to the control circuit respectively by rows and columns, characterized in that each control circuit is an electrical circuit provided with two independent inputs supplied by the first and the second signal, and with an output which generates the control signal for the elementary point (XL). impedance of this circuit between its output and that of one of its inputs which carries the first signal becomes weak following application of an adequate voltage pulse on this first signal, and this same impedance becomes very high following the application of an adequate voltage on the second signal.
- the first signal is a signal which, in a first step, activates all line control circuits corresponding by making them passers-by then applying a ramp of voltage which is transmitted from the control circuit to the point corresponding elementary.
- the first signal consists of a ramp-shaped signal preceded by a negative precharge pulse.
- the instant of triggering of the ramp-shaped signal is adjusted from line to line to compensate for propagation delays on the columns.
- the second signal is a switching signal of numerical type determining the duration during which the circuits of activated commands remain passers-by.
- the second switching signal consists of PWM type pulses for "Pulse Width Modulation" in language English.
- the moment of triggering of the pulses is adjusted from column to column to compensate for delays on the lines.
- the control circuit consists of a first transistor connecting the elementary point to the corresponding line receiving the first signal and a second transistor of which a first electrode is connected to the gate of the first transistor, the gate of which is connected to the corresponding column receiving the second signal and the second of which electrode is connected to a reference potential.
- the elementary control circuit further comprises a capacitance connected between the gate of the first transistor and the line corresponding.
- the second electrode of the second transistor is connected to the previous line.
- the circuits are made using silicon Polycrystalline.
- FIG 2 there is shown a control device matrix according to the present invention associated with a circuit control lines 20 and a column control circuit 30, said circuits which may or may not be integrated on the same substrate as the matrix control device.
- the elementary control circuit referenced P'ij has been modified to limit power consumption and thus allowing production in polycrystalline silicon.
- the elementary control circuit P'ij arranged in lines and in columns commands an elementary point made up, in the mode of realization represented, by an electro-optical cell XL, more particularly a liquid crystal cell.
- an electro-optical cell XL more particularly a liquid crystal cell.
- a CP storage capacity is mounted in parallel, said cell itself playing the role of a capacitance and its optical properties being modified according to the value of the electric field which crosses liquid crystal.
- the control circuit P'ij consists of essentially by a switching device MN2 consisting of preferably by a thin film transistor or TFT.
- An electrode of the transistor MN2 is connected to an electrode of the electro-optical cell XL while its other electrode is connected to a line L'i.
- the gate of transistor MN2 is connected to an electrode of a second transistor MN1, the other electrode of which is connected to ground in the embodiment shown and the grid of which is connected to a column C'j.
- a capacity referenced CB is connected between the gate of the switching transistor MN2 and the line L'i.
- the connection point between the capacitor CB and the gate of the transistor MN2 is referenced A while the connection point between the electrode of the transistor MN2 and the electrode of the electro-optical cell XL is referenced B.
- the lines L'i are connected to a line control circuit 20 which provides on the lines a data signal constituted by a signal which, initially, activates all the elementary circuits of command of the corresponding line by making them passers-by, then then apply a voltage ramp which is transmitted at the output of the elementary control circuit at the XL cell.
- the whole columns C'j is connected to a column control circuit 30 which provides, on each column, a second signal consisting of a signal digital type switching, more particularly pulses of PWM type determining the duration during which the P'ij command activated remain passers-by.
- the signal applied to the lines L'i, L'i + 1 is consisting of a negative pulse enabling all the elementary control circuits of a line followed by a ramp including the amplitude typically varies between - 5 volts and + 10 volts preferably.
- the duration T of the signal L'i corresponds to a line time.
- the same signal is applied but offset by a time T as shown on figure 3.
- a signal of switching constituted by PWM type pulses to modulate the pulses in width the signal having levels included typically between 0 and 2 volts, in the case of a silicon realization polycrystalline or monocrystalline silicon.
- the control circuit elementary consisting mainly of the two transistors MN1 and MN2 works as follows.
- the second electrode of transistor MN1 is at a reference potential at know either to ground in the embodiment shown or to potential of the previous line which is itself at a voltage of reference, because it is not addressed.
- the transistor MN1 becomes conducting and point A, namely the gate of transistor MN2 goes to the reference potential.
- the source gate voltage Vgs of transistor MN2 is zero and the current "off" of transistor MN2 is minimum.
- the electro-optical cell XL does not not discharge.
- the new elementary control circuit above allows therefore to display gray levels corresponding to the duration during which the ramp is applied at point A.
- the voltage of each elementary cell P'ij can therefore reach any value in the range of variation of the ramp provided by the first signal.
- the polarity of each cell can therefore be chosen independently of that of its neighbors provided that the counter electrode voltage is adjusted to a value close to the half of the maximum voltage reached by the first signal.
- the control circuit described above makes it possible to effectively reduce consumption. Indeed, the consumption is given by 1 ⁇ 2 f CV 2 , f being the line frequency, V the amplitude of the applied signal and C the capacities.
- the table below shows the difference in consumption between the control device in FIG. 1 and in FIG. 2 for a liquid crystal screen comprising 600 rows and 2400 columns on a diagonal of the order of 30 cm.
- COLUMNS APPLIED SIGNALS LINE FREQUENCY POWER prior art analog +/- 5 V 30 KHz ⁇ 1 ⁇ 2 W invention
- PWM 0 - 1 V 30 KHz 20 mW
- LINE FREQUENCY POWER prior art digital 40 V 30 KHz 1 line at a time ⁇ 10 mW invention analog data ramp: 15 V 30 KHz 1 line at a time ⁇ 2 mW
- the MN2 transistors operate with a gate-source voltage Vgs controlled, which gives a lower "off" current.
- FIG. 4 presents a variant of the invention where the outlet of the elementary control circuits P'ij identical to those represented on Figure 3 is no longer connected to a liquid crystal element, but to the gate of a transistor MN3 whose role is to deliver, to a material electroluminescent, an excitation current controlled by this voltage.
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- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Liquid Crystal Display Device Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal (AREA)
Description
La présente invention concerne un dispositif de commande matriciel, plus particulièrement un dispositif de commande matriciel utilisé dans un écran plat tel qu'un écran à cristaux liquides du type à matrice active ou d'autres types d'écran plat.The present invention relates to a control device matrix, more particularly a matrix control device used in a flat screen such as a matrix type liquid crystal display active or other types of flat screen.
Dans l'art antérieur, un dispositif de commande matriciel est
utilisé, par exemple, pour commander les cellules d'un écran plat telles
que des cellules à cristaux liquides. Dans ce cas, il s'agit d'un écran à
cristaux liquides du type à matrice active connu aussi sous l'abréviation
AM-LCD. Un tel écran à cristaux liquides du type matrice active est
représenté sur la figure 1. Dans ce cas, l'écran est constitué d'un certain
nombre de cellules électro-optiques formées chacune d'une électrode et
d'une contre-électrode enfermant le cristal liquide. Ces cellules sont
référencées XL sur ladite figure. Les cellules électro-optiques sont
arrangées en lignes et en colonnes, et commandées chacune par un
circuit de commutation faisant partie d'un dispositif de commande de
type matriciel. Comme représenté sur la figure 1, le circuit de
commutation est réalisé par un transistor T dont une des électrodes est
connectée à une colonne Cj et dont l'autre électrode est connectée à la
cellule électro-optique XL. D'autre part, la grille du transistor T est
connectée à une des lignes Li du dispositif de commande. Le plus
souvent, la cellule électro-optique XL est associée à une capacité de
stockage CP montée en parallèle sur la capacité formée par la cellule
électro-optique en sortie du transistor T. L'ensemble formé du transistor
T et de la capacité CP forme un circuit de commande élémentaire
référencé Pij dans la figure 1. D'autre part, chacune des lignes de
sélection Li est connectée à un circuit 2 de commande ou "driver ligne"
qui applique successivement sur chaque ligne une impulsion de
commande présentant une tension variant typiquement entre - 10 et +
20 volts. De même, chacune des colonnes Cj ou lignes de données est
connectée à un circuit 3 de commande de colonnes ou "driver colonnes"
qui envoie sur les colonnes Cj un signal analogique correspondant au
signal vidéo représentant plus particulièrement une échelle de gris dont la
tension varie typiquement entre + et - 5 volts. In the prior art, a matrix control device is
used, for example, to control the cells of a flat screen such
than liquid crystal cells. In this case, it is a screen to
liquid crystals of the active matrix type also known by the abbreviation
AM-LCD. Such an active matrix type liquid crystal screen is
shown in Figure 1. In this case, the screen consists of a certain
number of electro-optical cells each formed by an electrode and
a counter-electrode enclosing the liquid crystal. These cells are
referenced XL in said figure. The electro-optical cells are
arranged in rows and columns, and each controlled by a
switching circuit forming part of a control device
matrix type. As shown in Figure 1, the circuit
switching is carried out by a transistor T of which one of the electrodes is
connected to a column Cj and the other electrode of which is connected to the
XL electro-optical cell. On the other hand, the gate of transistor T is
connected to one of the lines Li of the control device. most
often the XL electro-optical cell is associated with a capacity of
CP storage mounted in parallel on the capacity formed by the cell
electro-optics at the output of transistor T. The assembly formed by the transistor
T and the capacity CP form an elementary control circuit
referenced Pij in Figure 1. On the other hand, each of the lines of
selection Li is connected to a
Avec ce dispositif de commande matriciel, la commande d'une cellule électro-optique XL s'effectue de la manière suivante. Lorsqu'une impulsion est appliquée sur une ligne de sélection Li, le transistor de commutation T devient passant. De ce fait, la tension analogique appliquée sur la colonne Cj est transmise aux bornes des électrodes de la cellule électro-optique XL qui affiche un niveau de gris correspondant au signal de données.With this matrix control device, the control of a XL electro-optical cell is carried out as follows. when pulse is applied to a selection line Li, the transistor switching T becomes conducting. Therefore, the analog voltage applied to column Cj is transmitted across the electrodes of the XL electro-optical cell which displays a gray level corresponding to the data signal.
En général, un dispositif de commande matriciel de ce type
présente des transistors de commutation qui sont le plus souvent
constitués par des transistors en couches minces TFT pour "Thin Film
Transistor". Un tel dispositif est en général réalisé en silicium amorphe.
D'autre part, les circuits 2,3 de commande lignes et colonnes peuvent
être intégrés sur la plaque substrat sur laquelle est réalisé l'écran plat ou
être réalisés indépendamment. Lorsqu'ils sont intégrés sur la plaque
substrat, ils sont fabriqués en utilisant aussi du silicium amorphe.In general, a matrix control device of this type
has switching transistors which are most often
constituted by TFT thin film transistors for "Thin Film
Transistor ". Such a device is generally made of amorphous silicon.
On the other hand, the lines and
Un des problèmes rencontrés avec ce type de dispositif de commande matriciel est un problème de consommation dû notamment à l'amplitude des signaux appliqués sur les lignes et les colonnes. Ce problème est d'autant plus important que l'on utilise pour l'adressage lignes de l'écran matriciel, la technique connue sous le terme "inversion de ligne", l'inversion de polarité ayant lieu à chaque ligne. Dans ce cas, on peut obtenir une consommation allant jusqu'à un watt pour une fréquence ligne de 30 KHz.One of the problems encountered with this type of device matrix control is a consumption problem due in particular to the amplitude of the signals applied to the rows and columns. This problem is all the more important that one uses for addressing lines of the matrix screen, the technique known as "inversion line ", the polarity reversal occurring on each line. In this case, you can get consumption of up to one watt for one line frequency of 30 KHz.
Un autre problème rencontré avec cette structure lorsqu'elle est réalisée avec des transistors en silicium polycristallin ou en silicium monocristallin, concerne le courant de fuite du transistor de commutation T à l'état bloqué qui tend à décharger les points élémentaires ou cellules électro-optiques XL.Another problem encountered with this structure when it is made with polycrystalline silicon or silicon transistors monocrystalline, relates to the leakage current of the switching transistor T in the blocked state which tends to discharge the elementary points or cells electro-optics XL.
La présente invention a pour but de remédier aux inconvénients cités ci-dessus en proposant un dispositif de commande matriciel présentant une nouvelle structure pour le circuit de commande élémentaire de chaque point élémentaire, cette structure étant particulièrement bien adaptée à l'utilisation du silicium polycristallin ou monocristallin pour la réalisation des transistors ou autres circuits semiconducteurs.The object of the present invention is to remedy the drawbacks cited above by proposing a matrix control device having a new structure for the control circuit elementary of each elementary point, this structure being particularly well suited to the use of polycrystalline silicon or monocrystalline for the production of transistors or other semiconductor circuits.
La présente invention a donc pour objet un dispositif de commande matriciel comportant un ensemble de circuits de commande disposés en lignes et en colonnes et commandant chacun un point élémentaire, l'état de chaque point élémentaire étant fonction de premier et second signaux de commande appliqués sur le circuit de commande respectivement par les lignes et les colonnes, caractérisé en ce que chaque circuit de commande est un circuit électrique pourvu de deux entrées indépendantes alimentées par le premier et le second signal, et d'une sortie qui génère le signal de commande du point élémentaire (XL). L'impédance de ce circuit entre sa sortie et celle d'une de ses entrées qui véhicule le premier signal devient faible suite à l'application d'une impulsion de tension adéquate sur ce premier signal, et cette même impédance devient très élevée suite à l'application d'une tension adéquate sur le deuxième signal.The present invention therefore relates to a device for matrix control comprising a set of control circuits arranged in rows and columns and each commanding an elementary point, the state of each elementary point being a function of first and second control signals applied to the control circuit respectively by rows and columns, characterized in that each control circuit is an electrical circuit provided with two independent inputs supplied by the first and the second signal, and with an output which generates the control signal for the elementary point (XL). impedance of this circuit between its output and that of one of its inputs which carries the first signal becomes weak following application of an adequate voltage pulse on this first signal, and this same impedance becomes very high following the application of an adequate voltage on the second signal.
Dans ce cas, le premier signal est un signal qui, dans un premier temps, permet d'activer tous les circuits de commande de la ligne correspondante en les rendant passants puis d'appliquer une rampe de tension qui est transmise en sortie du circuit de commande au point élémentaire correspondant. Selon un mode de réalisation préférentiel, le premier signal est constitué par un signal en forme de rampe précédé par une impulsion négative de précharge. Selon un perfectionnement, de préférence, l'instant de déclenchement du signal en forme de rampe est ajusté de ligne en ligne de manière à compenser les délais de propagation sur les colonnes.In this case, the first signal is a signal which, in a first step, activates all line control circuits corresponding by making them passers-by then applying a ramp of voltage which is transmitted from the control circuit to the point corresponding elementary. According to a preferred embodiment, the first signal consists of a ramp-shaped signal preceded by a negative precharge pulse. According to an improvement, preferably, the instant of triggering of the ramp-shaped signal is adjusted from line to line to compensate for propagation delays on the columns.
D'autre part, le second signal est un signal de commutation de type numérique déterminant la durée pendant laquelle les circuits de commande activés restent passants. Selon un mode de réalisation préférentiel, le second signal de commutation est constitué par des impulsions de type PWM pour "Pulse Width Modulation" en langue anglaise. De préférence, l'instant de déclenchement des impulsions est ajusté de colonne en colonne pour compenser les délais sur les lignes. On the other hand, the second signal is a switching signal of numerical type determining the duration during which the circuits of activated commands remain passers-by. According to one embodiment preferential, the second switching signal consists of PWM type pulses for "Pulse Width Modulation" in language English. Preferably, the moment of triggering of the pulses is adjusted from column to column to compensate for delays on the lines.
Selon un mode de réalisation préférentiel de la présente invention, le circuit de commande est constitué par un premier transistor connectant le point élémentaire à la ligne correspondante recevant le premier signal et un second transistor dont une première électrode est connectée à la grille du premier transistor, dont la grille est reliée à la colonne correspondante recevant le second signal et dont la deuxième électrode est connectée à un potentiel de référence.According to a preferred embodiment of the present invention, the control circuit consists of a first transistor connecting the elementary point to the corresponding line receiving the first signal and a second transistor of which a first electrode is connected to the gate of the first transistor, the gate of which is connected to the corresponding column receiving the second signal and the second of which electrode is connected to a reference potential.
Selon une caractéristique supplémentaire de la présente invention, le circuit de commande élémentaire comporte de plus une capacité connectée entre la grille du premier transistor et la ligne correspondante. De même, la deuxième électrode du second transistor est connectée à la ligne précédente. Selon une autre caractéristique de la présente invention, les circuits sont réalisés en utilisant du silicium polycristallin.According to an additional feature of this invention, the elementary control circuit further comprises a capacitance connected between the gate of the first transistor and the line corresponding. Likewise, the second electrode of the second transistor is connected to the previous line. According to another characteristic of the present invention, the circuits are made using silicon Polycrystalline.
D'autres caractéristiques et avantages de la présente invention apparaítront à la lecture de la description faite ci-après d'un mode de réalisation préférentiel, cette description étant faite avec référence aux dessins ci-annexés dans lesquels :
- la figure 1 déjà décrite est une représentation schématique d'un dispositif de commande matriciel utilisé dans le cas d'un écran à cristaux liquides à matrice active associé à des circuits de commande lignes et colonnes conformément à l'art antérieur ;
- la figure 2 est une représentation schématique d'un dispositif de commande matriciel conforme à la présente invention dans le cas où le point élémentaire est constitué par une cellule à cristaux liquides, ce dispositif étant associé à des circuits de commande lignes et colonnes,
- la figure 3 représente la forme des différents signaux appliqués respectivement sur les lignes, les colonnes, au point A, au point B et la tension grille source du transistor MN2 dans le cas du circuit de commande élémentaire de la figure 2, et,
- la figure 4 est une représentation schématique d'un dispositif de commande matriciel conforme à la présente invention dans le cas où le point élémentaire est constitué par un matériau électroluminescent, ce dispositif étant associé à des circuits de commande lignes et colonnes.
- Figure 1 already described is a schematic representation of a matrix control device used in the case of an active matrix liquid crystal screen associated with row and column control circuits according to the prior art;
- FIG. 2 is a schematic representation of a matrix control device in accordance with the present invention in the case where the elementary point is constituted by a liquid crystal cell, this device being associated with row and column control circuits,
- FIG. 3 represents the shape of the different signals applied respectively to the rows, the columns, at point A, at point B and the source gate voltage of the transistor MN2 in the case of the elementary control circuit of FIG. 2, and,
- Figure 4 is a schematic representation of a matrix control device according to the present invention in the case where the elementary point is constituted by an electroluminescent material, this device being associated with row and column control circuits.
Dans les figures, pour simplifier la description, les mêmes éléments portent les mêmes références. D'autre part, la présente invention sera décrite en se référant à un écran à cristaux liquides. Toutefois, il est évident pour l'homme de l'art que l'invention peut s'appliquer à des points élémentaires constitués par tout circuit de stockage d'un signal électrique tel qu'une cellule électro-optique ou autre.In the figures, to simplify the description, the same elements have the same references. On the other hand, this invention will be described with reference to a liquid crystal display. However, it is obvious to those skilled in the art that the invention can apply to elementary points constituted by any circuit of storage of an electrical signal such as an electro-optical cell or the like.
Sur la figure 2, on a représenté un dispositif de commande
matriciel conforme à la présente invention associé à un circuit de
commande lignes 20 et un circuit de commande colonnes 30, lesdits
circuits pouvant être intégrés ou non sur le même substrat que le
dispositif de commande matriciel. Dans le dispositif de commande
matriciel de la figure 2, le circuit de commande élémentaire référencé P'ij
a été modifié de manière à limiter la consommation électrique et
permettre ainsi une réalisation en silicium polycristallin. De manière plus
spécifique, le circuit de commande élémentaire P'ij disposé en lignes et
en colonnes commande un point élémentaire constitué, dans le mode de
réalisation représenté, par une cellule électro-optique XL, plus
particulièrement une cellule à cristal liquide. Sur cette cellule électro-optique
est montée en parallèle une capacité de stockage CP, ladite
cellule jouant elle-même le rôle d'une capacité et ses propriétés optiques
étant modifiées en fonction de la valeur du champ électrique qui traverse
le cristal liquide.In Figure 2, there is shown a control device
matrix according to the present invention associated with a
On décrira maintenant un mode de réalisation d'un circuit de
commande élémentaire P'ij dont la caractéristique principale est d'avoir
un signal de sortie suivant le signal d'entrée lorsqu'il est activé par un
premier signal, à savoir celui appliqué sur les lignes L'i, et dont
l'impédance entre l'entrée et la sortie devient très grande sous l'effet
d'un deuxième signal, à savoir le signal appliqué sur les colonnes C'j.
Dans le cas de la figure 2, le circuit de commande P'ij est constitué
essentiellement par un dispositif de commutation MN2 constitué de
préférence par un transistor en couches minces ou TFT. Une électrode du
transistor MN2 est reliée à une électrode de la cellule électro-optique XL
tandis que son autre électrode est reliée à une ligne L'i. D'autre part, la
grille du transistor MN2 est reliée à une électrode d'un second transistor
MN1 dont l'autre électrode est connectée à la masse dans le mode de
réalisation représenté et dont la grille est connectée à une colonne C'j.
Comme représenté sur la figure 2, une capacité référencée CB est
connectée entre la grille du transistor de commutation MN2 et la ligne L'i.
Le point de connexion entre la capacité CB et la grille du transistor MN2
est référencé A tandis que le point de connexion entre l'électrode du
transistor MN2 et l'électrode de la cellule électro-optique XL est référencé
B. Les lignes L'i sont connectées à un circuit de commande de lignes 20
qui fournit sur les lignes un signal de données constitué par un signal qui,
dans un premier temps, permet d'activer tous les circuits élémentaires de
commande de la ligne correspondante en les rendant passants, puis
d'appliquer ensuite une rampe de tension qui est transmise en sortie du
circuit élémentaire de commande à la cellule XL. De même, l'ensemble
des colonnes C'j est relié à un circuit de commande de colonnes 30 qui
fournit, sur chaque colonne, un second signal constitué par un signal de
commutation de type numérique, plus particulièrement des impulsions de
type PWM déterminant la durée pendant laquelle les circuits de
commande P'ij activés restent passants.We will now describe an embodiment of a circuit of
elementary command P'ij whose main characteristic is to have
an output signal following the input signal when activated by a
first signal, namely that applied to the lines L'i, and of which
the impedance between the input and the output becomes very large under the effect
of a second signal, namely the signal applied to the columns C'j.
In the case of FIG. 2, the control circuit P'ij consists of
essentially by a switching device MN2 consisting of
preferably by a thin film transistor or TFT. An electrode of the
transistor MN2 is connected to an electrode of the electro-optical cell XL
while its other electrode is connected to a line L'i. On the other hand, the
gate of transistor MN2 is connected to an electrode of a second transistor
MN1, the other electrode of which is connected to ground in the
embodiment shown and the grid of which is connected to a column C'j.
As shown in Figure 2, a capacity referenced CB is
connected between the gate of the switching transistor MN2 and the line L'i.
The connection point between the capacitor CB and the gate of the transistor MN2
is referenced A while the connection point between the electrode of the
transistor MN2 and the electrode of the electro-optical cell XL is referenced
B. The lines L'i are connected to a
On expliquera maintenant, avec référence à la figure 3, le fonctionnement du circuit de commande représenté à la figure 2. Comme représenté sur la figure 3, le signal appliqué sur les lignes L'i, L'i + 1 est constitué par une impulsion négative permettant d'activer tous les circuits de commande élémentaires d'une ligne suivie d'une rampe dont l'amplitude varie typiquement entre - 5 volts et + 10 volts de préférence. La durée T du signal L'i correspond à un temps ligne. Sur la ligne L'i + 1 , le même signal est appliqué mais décalé d'un temps T comme représenté sur la figure 3. D'autre part, sur les colonnes C'j est appliqué un signal de commutation constitué par des impulsions de type PWM pour moduler les impulsions en largeur, le signal présentant des niveaux compris typiquement entre 0 et 2 volts, dans le cas d'une réalisation en silicium polycristallin ou en silicium monocristallin.We will now explain, with reference to Figure 3, the operation of the control circuit shown in Figure 2. As represented in FIG. 3, the signal applied to the lines L'i, L'i + 1 is consisting of a negative pulse enabling all the elementary control circuits of a line followed by a ramp including the amplitude typically varies between - 5 volts and + 10 volts preferably. The duration T of the signal L'i corresponds to a line time. On the line L'i + 1, the same signal is applied but offset by a time T as shown on figure 3. On the other hand, on the columns C'j is applied a signal of switching constituted by PWM type pulses to modulate the pulses in width, the signal having levels included typically between 0 and 2 volts, in the case of a silicon realization polycrystalline or monocrystalline silicon.
Lorsque la ligne L'i n'est pas adressée, le circuit de commande élémentaire constitué principalement des deux transistors MN1 et MN2 fonctionne de la manière suivante. Comme représenté sur la figure 2, la deuxième électrode du transistor MN1 est à un potentiel de référence à savoir soit à la masse dans le mode de réalisation représenté soit au potentiel de la ligne précédente qui se trouve elle-même à une tension de référence, car elle n'est pas adressée. Lorsqu'une impulsion est appliquée sur la colonne C'j, à savoir sur la grille du transistor MN1, le transistor MN1 devient passant et le point A, à savoir la grille du transistor MN2 passe au potentiel de référence. A ce moment, la tension grille source Vgs du transistor MN2 est à zéro et le courant "off" du transistor MN2 est minimum. Il en résulte que la cellule électro-optique XL ne se décharge pas.When the line L'i is not addressed, the control circuit elementary consisting mainly of the two transistors MN1 and MN2 works as follows. As shown in Figure 2, the second electrode of transistor MN1 is at a reference potential at know either to ground in the embodiment shown or to potential of the previous line which is itself at a voltage of reference, because it is not addressed. When a pulse is applied on column C'j, namely on the gate of transistor MN1, the transistor MN1 becomes conducting and point A, namely the gate of transistor MN2 goes to the reference potential. At this point, the source gate voltage Vgs of transistor MN2 is zero and the current "off" of transistor MN2 is minimum. As a result, the electro-optical cell XL does not not discharge.
Lorsque la ligne L'i est adressée, à savoir lorsqu'elle applique un signal tel que représenté par L'i sur la figure 3, la ligne L'i subit tout d'abord une chute de tension négative - V. Le point A, du fait de la capacité CB, subit la même chute de tension instantanée. La colonne C'j recevant une impulsion positive, comme représenté sur la figure 3, le transistor MN1 est passant et, de ce fait, le potentiel du point A est ramené au niveau du potentiel de référence, à savoir à la masse ou zéro, dans le cas du mode de réalisation représenté. La tension grille source Vgs du transistor MN2 devient positive et passe à une valeur correspondant à la chute de tension sur la ligne L'i ce qui rend le transistor MN2 passant. Immédiatement après, la tension appliquée sur la colonne C'j chute à zéro, entraínant le passage à l'état "off" ou haute impédance du transistor MN1. La tension grille source Vgs du transistor MN2 reste constante du fait de la capacité CB. Lorsque la rampe de tension est appliquée sur la ligne L'i, le transistor MN2 étant passant, la tension au point B recopie la tension de la rampe jusqu'à ce qu'une nouvelle impulsion positive sur la colonne rende le transistor MN1 passant, ce qui a pour effet de ramener la tension au point A au potentiel de référence. A ce moment, le transistor MN2 devient non passant et la tension au point B reste constante comme représenté sur la figure 3.When the line L'i is addressed, i.e. when it applies a signal as represented by L'i in FIG. 3, the line L'i undergoes all first a negative voltage drop - V. Point A, due to the CB capacity, undergoes the same instantaneous voltage drop. Column C'j receiving a positive pulse, as shown in Figure 3, the transistor MN1 is conducting and, therefore, the potential of point A is reduced to the level of the reference potential, namely to ground or zero, in the case of the embodiment shown. Source grid voltage Vgs of transistor MN2 becomes positive and goes to a value corresponding to the voltage drop on the line L'i which makes the MN2 transistor on. Immediately afterwards, the voltage applied to the column C'j drops to zero, causing the transition to the "off" or high state impedance of transistor MN1. The source gate voltage Vgs of the transistor MN2 remains constant due to the capacity CB. When the ramp of voltage is applied to the line L'i, the transistor MN2 being on, the voltage at point B copies the voltage of the ramp until a new positive pulse on the column returns the transistor MN1 passing, which has the effect of reducing the voltage at point A to the potential reference. At this moment, the transistor MN2 becomes non-conducting and the voltage at point B remains constant as shown in Figure 3.
Le nouveau circuit de commande élémentaire ci-dessus permet donc d'afficher des niveaux de gris correspondant à la durée pendant laquelle la rampe est appliquée au point A. Pour une utilisation dans un écran plat à cristaux liquides, la tension de chaque cellule élémentaire P'ij peut donc atteindre une valeur quelconque dans la gamme de variation de la rampe fournie par le premier signal. La polarité de chaque cellule peut donc être choisie indépendamment de celle de ses voisines pour peu que la tension de la contre électrode soit ajustée à une valeur voisine de la moitié de la tension maximale atteinte par le premier signal.The new elementary control circuit above allows therefore to display gray levels corresponding to the duration during which the ramp is applied at point A. For use in a flat liquid crystal display, the voltage of each elementary cell P'ij can therefore reach any value in the range of variation of the ramp provided by the first signal. The polarity of each cell can therefore be chosen independently of that of its neighbors provided that the counter electrode voltage is adjusted to a value close to the half of the maximum voltage reached by the first signal.
Le circuit de commande décrit ci-dessus permet de diminuer efficacement la consommation. En effet, la consommation est donnée par ½ f CV2, f étant la fréquence ligne, V l'amplitude du signal appliqué et C les capacités.The control circuit described above makes it possible to effectively reduce consumption. Indeed, the consumption is given by ½ f CV 2 , f being the line frequency, V the amplitude of the applied signal and C the capacities.
Le tableau ci-après montre la différence de consommation entre
le dispositif de commande de la figure 1 et de la figure 2 pour un écran à
cristaux liquides comprenant 600 lignes et 2400 colonnes sur une
diagonale de l'ordre de 30 cm.
1 ligne à la fois
1 ligne à la fois
1 line at a time
1 line at a time
D'autre part, lorsque l'on utilise du silicium polycristallin réalisé sur verre ou du silicium monocristallin pour réaliser le dispositif de commande, les transistors MN2 fonctionnent avec une tension grille-source Vgs contrôlée, ce qui donne un courant "off" plus faible.On the other hand, when using polycrystalline silicon produced on glass or monocrystalline silicon to make the device control, the MN2 transistors operate with a gate-source voltage Vgs controlled, which gives a lower "off" current.
Un autre avantage de cette invention est que les « drivers colonne » 30 ont une fonction uniquement numérique, et fonctionnent à basse tension, ce qui facilite leur conception et diminue leur coût.Another advantage of this invention is that the "drivers column »30 have a numerical function only, and operate at low voltage, which facilitates their design and reduces their cost.
La figure 4 présente une variante de l'invention où la sortie des circuits de commande élémentaires P'ij identiques à ceux représentés sur la figure 3 est non plus connectée à un élément à cristal liquide, mais à la grille d'un transistor MN3 dont le rôle est de délivrer, à un matériau électroluminescent, un courant d'excitation contrôlé par cette tension.FIG. 4 presents a variant of the invention where the outlet of the elementary control circuits P'ij identical to those represented on Figure 3 is no longer connected to a liquid crystal element, but to the gate of a transistor MN3 whose role is to deliver, to a material electroluminescent, an excitation current controlled by this voltage.
Claims (13)
- Matrix drive device including a set of control circuits (P'ij) arranged in rows and columns and each controlling an elementary point (XL), the state of each elementary point being a function of first and second control signals (L'i, C'j) applied to the control circuit (P'ij) respectively via the rows (L'i) and columns (C'j), characterized in that each control circuit (P'ij) is an electrical circuit provided with two independent inputs, supplied by the first signal and the second signal, and with one output which generates the signal for controlling the elementary point (XL), the impedance of this electrical circuit between the output and that one of its inputs which is carrying the first signal becoming low following the application of an adequate voltage pulse on this first signal (L'i), and in that this same impedance becomes very high following the application of an adequate voltage on the second signal.
- Device according to Claim 1, characterized in that the first signal (L'i) is a signal which, in a first stage, makes it possible to activate all the control circuits (P'ij) of the corresponding row (L'i) by turning them on, then to apply a voltage ramp which is sent as the output of the control circuit (P'ij) to the corresponding elementary point.
- Device according to Claim 2, characterized in that the first signal (L'i) consists of a ramp-shaped signal preceded by a negative precharge pulse.
- Device according to either of Claims 2 and 3, characterized in that the triggering of the ramp-shaped signal is adjusted from row to row so as to compensate for the propagation delays on the columns (C'j).
- Device according to Claim 1, characterized in that the second signal (C'j) is a switching signal of digital type determining the duration for which the activated control circuits (P'ij) remain on.
- Device according to Claim 5, characterized in that the second switching signal (C'j) consists of pulses of PWM (Pulse Width Modulation) type.
- Device according to either of Claims 5 and 6, characterized in that the triggering of the pulses is adjusted from column to column in order to compensate for the delays on the rows (L'i).
- Device according to any one of Claims 1 to 7, characterized in that the control circuit (P'ij) consists of a first transistor (MN2) connecting the elementary point (XL) to the corresponding row (L'i) receiving the first signal, and a second transistor (MN1) a first electrode of which is connected to the gate of the first transistor, the gate of which is linked to the corresponding column (C'j) receiving the second signal and the second electrode of which is connected to a reference potential.
- Device according to Claim 8, characterized in that it further includes a capacitor (CB) connected between the gate of the first transistor (MN2) and the corresponding row (L'i).
- Device according to Claim 8, characterized in that the second electrode of the second transistor (MN1) is connected to the preceding row (L'i-1).
- Device according to any one of the preceding claims, characterized in that the circuits are produced using polycrystalline silicon, amorphous silicon or single-crystal silicon.
- Device according to any one of the preceding claims, characterized in that the elementary points are electro optic cells.
- Device according to any one of the preceding claims, characterized in that the output of the elementary points (P'ij) serves to modulate the excitation current of an electroluminescent material.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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FR9715863A FR2772501B1 (en) | 1997-12-15 | 1997-12-15 | MATRIX CONTROL DEVICE |
FR9715863 | 1997-12-15 | ||
PCT/FR1998/002236 WO1999031650A1 (en) | 1997-12-15 | 1998-10-19 | Device for controlling a matrix display cell |
Publications (2)
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EP0972282A1 EP0972282A1 (en) | 2000-01-19 |
EP0972282B1 true EP0972282B1 (en) | 2004-12-15 |
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Application Number | Title | Priority Date | Filing Date |
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EP98949077A Expired - Lifetime EP0972282B1 (en) | 1997-12-15 | 1998-10-19 | Device for controlling a matrix display cell |
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US (1) | US6844874B2 (en) |
EP (1) | EP0972282B1 (en) |
JP (1) | JP2001512588A (en) |
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DE (1) | DE69828158T2 (en) |
FR (1) | FR2772501B1 (en) |
WO (1) | WO1999031650A1 (en) |
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FR2743662B1 (en) * | 1996-01-11 | 1998-02-13 | Thomson Lcd | IMPROVEMENT IN SHIFT REGISTERS USING TRANSISTORS OF THE SAME POLARITY |
US5949398A (en) * | 1996-04-12 | 1999-09-07 | Thomson Multimedia S.A. | Select line driver for a display matrix with toggling backplane |
JP3530341B2 (en) * | 1997-05-16 | 2004-05-24 | Tdk株式会社 | Image display device |
US6175345B1 (en) * | 1997-06-02 | 2001-01-16 | Canon Kabushiki Kaisha | Electroluminescence device, electroluminescence apparatus, and production methods thereof |
JP4092827B2 (en) * | 1999-01-29 | 2008-05-28 | セイコーエプソン株式会社 | Display device |
-
1997
- 1997-12-15 FR FR9715863A patent/FR2772501B1/en not_active Expired - Fee Related
-
1998
- 1998-10-19 JP JP53209599A patent/JP2001512588A/en active Pending
- 1998-10-19 US US09/367,146 patent/US6844874B2/en not_active Expired - Lifetime
- 1998-10-19 WO PCT/FR1998/002236 patent/WO1999031650A1/en active IP Right Grant
- 1998-10-19 DE DE69828158T patent/DE69828158T2/en not_active Expired - Fee Related
- 1998-10-19 EP EP98949077A patent/EP0972282B1/en not_active Expired - Lifetime
- 1998-10-19 KR KR1019997007208A patent/KR20000070943A/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
EP0972282A1 (en) | 2000-01-19 |
DE69828158T2 (en) | 2005-12-22 |
FR2772501B1 (en) | 2000-01-21 |
KR20000070943A (en) | 2000-11-25 |
WO1999031650A1 (en) | 1999-06-24 |
JP2001512588A (en) | 2001-08-21 |
US20020130827A1 (en) | 2002-09-19 |
DE69828158D1 (en) | 2005-01-20 |
FR2772501A1 (en) | 1999-06-18 |
US6844874B2 (en) | 2005-01-18 |
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