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EP0419125A3 - Pipeline architecture for generating video signal - Google Patents

Pipeline architecture for generating video signal Download PDF

Info

Publication number
EP0419125A3
EP0419125A3 EP19900310010 EP90310010A EP0419125A3 EP 0419125 A3 EP0419125 A3 EP 0419125A3 EP 19900310010 EP19900310010 EP 19900310010 EP 90310010 A EP90310010 A EP 90310010A EP 0419125 A3 EP0419125 A3 EP 0419125A3
Authority
EP
European Patent Office
Prior art keywords
video signal
generating video
pipeline architecture
architecture
pipeline
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19900310010
Other versions
EP0419125A2 (en
Inventor
James A. Wobermin
H.K. Wong
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ampex Systems Corp
Original Assignee
Ampex Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ampex Corp filed Critical Ampex Corp
Publication of EP0419125A2 publication Critical patent/EP0419125A2/en
Publication of EP0419125A3 publication Critical patent/EP0419125A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/42—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of patterns using a display memory without fixed position correspondence between the display memory contents and the display position on the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/22—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory
    • G09G5/24—Generation of individual character patterns

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Generation (AREA)
  • Studio Circuits (AREA)
EP19900310010 1989-09-22 1990-09-13 Pipeline architecture for generating video signal Withdrawn EP0419125A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US41107689A 1989-09-22 1989-09-22
US411076 1989-09-22

Publications (2)

Publication Number Publication Date
EP0419125A2 EP0419125A2 (en) 1991-03-27
EP0419125A3 true EP0419125A3 (en) 1992-08-12

Family

ID=23627456

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19900310010 Withdrawn EP0419125A3 (en) 1989-09-22 1990-09-13 Pipeline architecture for generating video signal

Country Status (2)

Country Link
EP (1) EP0419125A3 (en)
JP (1) JPH03220879A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107729354B (en) * 2017-08-30 2021-08-10 晶晨半导体(上海)股份有限公司 Picture ordering method and system

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2408262A1 (en) * 1977-11-03 1979-06-01 Gec Computers Ltd FRAME SCAN DISPLAY DEVICE
US4364037A (en) * 1981-06-15 1982-12-14 Cromemco Inc. Transition data image processor
DE3243574A1 (en) * 1982-11-25 1984-05-30 Dr.-Ing. Reiner Foerst GmbH, 5277 Marienheide Videographic generator
GB2191666A (en) * 1986-06-04 1987-12-16 Apple Computer Video display apparatus
US4831557A (en) * 1986-03-31 1989-05-16 Namco Ltd. Image composing apparatus

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2408262A1 (en) * 1977-11-03 1979-06-01 Gec Computers Ltd FRAME SCAN DISPLAY DEVICE
US4364037A (en) * 1981-06-15 1982-12-14 Cromemco Inc. Transition data image processor
DE3243574A1 (en) * 1982-11-25 1984-05-30 Dr.-Ing. Reiner Foerst GmbH, 5277 Marienheide Videographic generator
US4831557A (en) * 1986-03-31 1989-05-16 Namco Ltd. Image composing apparatus
GB2191666A (en) * 1986-06-04 1987-12-16 Apple Computer Video display apparatus

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
IEEE TRANSACTIONS ON COMPUTERS, vol. C-30, no. 1, January 1981, pages 41-48, New York, US; B.D. ACKLAND et al.: "The edge flag algorithm - a fill method for raster scan displays", abstract. *

Also Published As

Publication number Publication date
JPH03220879A (en) 1991-09-30
EP0419125A2 (en) 1991-03-27

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