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DE69025500D1 - Verfahren zur Herstellung eines kupferkaschierten Laminats - Google Patents

Verfahren zur Herstellung eines kupferkaschierten Laminats

Info

Publication number
DE69025500D1
DE69025500D1 DE69025500T DE69025500T DE69025500D1 DE 69025500 D1 DE69025500 D1 DE 69025500D1 DE 69025500 T DE69025500 T DE 69025500T DE 69025500 T DE69025500 T DE 69025500T DE 69025500 D1 DE69025500 D1 DE 69025500D1
Authority
DE
Germany
Prior art keywords
copper
producing
clad laminate
clad
laminate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69025500T
Other languages
English (en)
Other versions
DE69025500T2 (de
Inventor
Norio Kawachi
Katsurou Aoshima
Tatsuo Wada
Toshirou Miki
Takeharu Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meiko Electronics Co Ltd
Toagosei Co Ltd
Original Assignee
Meiko Electronics Co Ltd
Toagosei Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP15976289A external-priority patent/JPH0324946A/ja
Priority claimed from JP15976189A external-priority patent/JPH0328389A/ja
Application filed by Meiko Electronics Co Ltd, Toagosei Co Ltd filed Critical Meiko Electronics Co Ltd
Publication of DE69025500D1 publication Critical patent/DE69025500D1/de
Application granted granted Critical
Publication of DE69025500T2 publication Critical patent/DE69025500T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
    • H05K3/025—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates by transfer of thin metal foil formed on a temporary carrier, e.g. peel-apart copper
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0147—Carriers and holders
    • H05K2203/0152—Temporary metallic carrier, e.g. for transferring material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0307—Providing micro- or nanometer scale roughness on a metal surface, e.g. by plating of nodules or dendrites
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0716—Metallic plating catalysts, e.g. for direct electroplating of through holes; Sensitising or activating metallic plating catalysts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0723—Electroplating, e.g. finish plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0726—Electroforming, i.e. electroplating on a metallic carrier thereby forming a self-supporting structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Laminated Bodies (AREA)
DE69025500T 1989-06-23 1990-06-22 Verfahren zur Herstellung eines kupferkaschierten Laminats Expired - Fee Related DE69025500T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP15976289A JPH0324946A (ja) 1989-06-23 1989-06-23 銅張積層板の製造方法
JP15976189A JPH0328389A (ja) 1989-06-23 1989-06-23 銅張積層板用銅箔層、その製造方法およびそれに用いるめっき浴

Publications (2)

Publication Number Publication Date
DE69025500D1 true DE69025500D1 (de) 1996-04-04
DE69025500T2 DE69025500T2 (de) 1996-10-31

Family

ID=26486469

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69025500T Expired - Fee Related DE69025500T2 (de) 1989-06-23 1990-06-22 Verfahren zur Herstellung eines kupferkaschierten Laminats

Country Status (3)

Country Link
US (1) US5096522A (de)
EP (1) EP0405369B1 (de)
DE (1) DE69025500T2 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5512381A (en) * 1993-09-24 1996-04-30 Alliedsignal Inc. Copper foil laminate for protecting multilayer articles
US6141870A (en) 1997-08-04 2000-11-07 Peter K. Trzyna Method for making electrical device
US6129998A (en) * 1998-04-10 2000-10-10 R.E. Service Company, Inc. Copper/steel laminated sheet for use in manufacturing printed circuit boards
US6129990A (en) * 1998-04-10 2000-10-10 R. E. Service Company, Inc. Copper/steel laminated sheet for use in manufacturing printed circuit boards
US6355360B1 (en) 1998-04-10 2002-03-12 R.E. Service Company, Inc. Separator sheet laminate for use in the manufacture of printed circuit boards
US6127051A (en) * 1998-04-10 2000-10-03 R. E. Service Company, Inc. Copper/steel laminated sheet for use in manufacturing printed circuit boards
JP3370624B2 (ja) * 1999-08-24 2003-01-27 三井金属鉱業株式会社 キャリア箔付電解銅箔及びその電解銅箔を使用した銅張積層板
JP3291482B2 (ja) * 1999-08-31 2002-06-10 三井金属鉱業株式会社 整面電解銅箔、その製造方法および用途
JP3291486B2 (ja) * 1999-09-06 2002-06-10 三井金属鉱業株式会社 整面電解銅箔、その製造方法およびその用途
LU90532B1 (en) * 2000-02-24 2001-08-27 Circuit Foil Luxembourg Trading Sarl Comosite copper foil and manufacturing method thereof
US6569543B2 (en) * 2001-02-15 2003-05-27 Olin Corporation Copper foil with low profile bond enahncement
US6346335B1 (en) * 2000-03-10 2002-02-12 Olin Corporation Copper foil composite including a release layer
JP2001332130A (ja) * 2000-05-19 2001-11-30 Tdk Corp 機能性膜
US6893742B2 (en) * 2001-02-15 2005-05-17 Olin Corporation Copper foil with low profile bond enhancement
JP2002252445A (ja) * 2001-02-26 2002-09-06 Nec Toyama Ltd 印刷配線板の製造方法
US6783860B1 (en) 2001-05-11 2004-08-31 R. E. Service Company, Inc. Laminated entry and exit material for drilling printed circuit boards
LU90804B1 (fr) * 2001-07-18 2003-01-20 Circuit Foil Luxembourg Trading Sarl Process for manufacturing a composite foil suitable for manufacturing multi-layer printed circuit boards
US6652697B2 (en) * 2001-12-03 2003-11-25 Pioneer Technology Engineering Co., Ltd. Method for manufacturing a copper-clad laminate
US20040200061A1 (en) * 2003-04-11 2004-10-14 Coleman James P. Conductive pattern and method of making
US7930815B2 (en) * 2003-04-11 2011-04-26 Avery Dennison Corporation Conductive pattern and method of making
US7132158B2 (en) * 2003-10-22 2006-11-07 Olin Corporation Support layer for thin copper foil
EP1775579A4 (de) * 2004-08-02 2009-07-15 Daikin Ind Ltd Sauerstoffelektrode
US7383629B2 (en) * 2004-11-19 2008-06-10 Endicott Interconnect Technologies, Inc. Method of making circuitized substrates utilizing smooth-sided conductive layers as part thereof
US6964884B1 (en) * 2004-11-19 2005-11-15 Endicott Interconnect Technologies, Inc. Circuitized substrates utilizing three smooth-sided conductive layers as part thereof, method of making same, and electrical assemblies and information handling systems utilizing same
US7307022B2 (en) * 2004-11-19 2007-12-11 Endicott Interconnect Technologies, Inc. Method of treating conductive layer for use in a circuitized substrate and method of making said substrate having said conductive layer as part thereof
US20070122569A1 (en) * 2005-11-30 2007-05-31 Hirschmann Car Communication Gmbh Integration of conductive structures for plastic parts produced by a hot-press method (SMC/BMC)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2984595A (en) * 1956-06-21 1961-05-16 Sel Rex Precious Metals Inc Printed circuit manufacture
BE568197A (de) * 1957-06-12
US3099608A (en) * 1959-12-30 1963-07-30 Ibm Method of electroplating on a dielectric base
FR1410529A (fr) * 1963-09-17 1965-09-10 Rothschild Nominees Ltd Procédé pour traiter une surface de cuivre
US3998601A (en) * 1973-12-03 1976-12-21 Yates Industries, Inc. Thin foil
GB8333753D0 (en) * 1983-12-19 1984-01-25 Thorpe J E Dielectric boards
JPH06101616B2 (ja) * 1986-02-21 1994-12-12 名幸電子工業株式会社 導体回路板の製造方法
JPH0639155B2 (ja) * 1986-02-21 1994-05-25 名幸電子工業株式会社 銅張積層板の製造方法
US4749449A (en) * 1987-06-05 1988-06-07 E. I. Du Pont De Nemours And Company Metallization utilizing a catalyst which is removed or deactivated from undesired surface areas

Also Published As

Publication number Publication date
EP0405369A3 (en) 1992-06-17
EP0405369A2 (de) 1991-01-02
EP0405369B1 (de) 1996-02-28
DE69025500T2 (de) 1996-10-31
US5096522A (en) 1992-03-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee