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DE69909375D1 - Integrierte Schaltungsanordnung - Google Patents

Integrierte Schaltungsanordnung

Info

Publication number
DE69909375D1
DE69909375D1 DE69909375T DE69909375T DE69909375D1 DE 69909375 D1 DE69909375 D1 DE 69909375D1 DE 69909375 T DE69909375 T DE 69909375T DE 69909375 T DE69909375 T DE 69909375T DE 69909375 D1 DE69909375 D1 DE 69909375D1
Authority
DE
Germany
Prior art keywords
integrated circuit
circuit arrangement
arrangement
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69909375T
Other languages
English (en)
Other versions
DE69909375T2 (de
Inventor
Kim Chang-Hyun
Song Ki-Whan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of DE69909375D1 publication Critical patent/DE69909375D1/de
Publication of DE69909375T2 publication Critical patent/DE69909375T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Logic Circuits (AREA)
  • Analogue/Digital Conversion (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Manipulation Of Pulses (AREA)
DE69909375T 1998-05-29 1999-05-24 Integrierte Schaltungsanordnung Expired - Fee Related DE69909375T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019980019805A KR100304691B1 (ko) 1998-05-29 1998-05-29 트라이스테이트 보상회로를구비하는 출력신호 발생회로
KR1980598 1998-05-29

Publications (2)

Publication Number Publication Date
DE69909375D1 true DE69909375D1 (de) 2003-08-14
DE69909375T2 DE69909375T2 (de) 2004-05-27

Family

ID=19537907

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69909375T Expired - Fee Related DE69909375T2 (de) 1998-05-29 1999-05-24 Integrierte Schaltungsanordnung

Country Status (6)

Country Link
US (2) US6184701B1 (de)
EP (1) EP0961410B1 (de)
JP (1) JP3795685B2 (de)
KR (1) KR100304691B1 (de)
DE (1) DE69909375T2 (de)
TW (1) TW461184B (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100304691B1 (ko) 1998-05-29 2001-09-29 윤종용 트라이스테이트 보상회로를구비하는 출력신호 발생회로
US6674306B1 (en) 2001-06-07 2004-01-06 Cypress Semiconductor Corp. Multiport arbitration using phased locking arbiters
US6515517B1 (en) * 2001-06-07 2003-02-04 Cypress Semiconductor Corp. Discriminator circuit
US6826642B1 (en) 2001-06-07 2004-11-30 Cypress Semiconductor Corp. Method and apparatus for the use of discriminators for priority arbitration
US6498513B1 (en) 2001-06-07 2002-12-24 Cypress Semiconductor Corp. Metastability recovery circuit
US6611154B2 (en) * 2001-07-02 2003-08-26 International Rectifier Corporation Circuit for improving noise immunity by DV/DT boosting
US6798185B2 (en) * 2002-06-28 2004-09-28 International Business Machines Corporation Method and apparatus for testing analog to digital converters
US6927604B2 (en) * 2003-08-21 2005-08-09 International Business Machines Corporation Clock signal selector circuit with reduced probability of erroneous output due to metastability
FR2863420B1 (fr) * 2003-12-05 2006-04-07 St Microelectronics Sa Dispositif de neutralisation a la mise sous tension
US6998896B1 (en) 2004-04-21 2006-02-14 Lattice Semiconductor Corporation Dynamic gain adjustment systems and methods for metastability resistance
US7403052B1 (en) * 2006-10-02 2008-07-22 National Semiconductor Corporation Power-on detect by measuring thermal voltage
US9128632B2 (en) 2009-07-16 2015-09-08 Netlist, Inc. Memory module with distributed data buffers and method of operation
US7928768B1 (en) * 2009-09-28 2011-04-19 Altera Corporation Apparatus for metastability-hardened storage circuits and associated methods
US8289050B2 (en) * 2010-09-21 2012-10-16 Micron Technology, Inc. Switching circuits, latches and methods
US8482449B1 (en) 2012-07-30 2013-07-09 Lsi Corporation Analog-to-digital converter with metastability detector
EP3028153B1 (de) 2013-07-27 2019-03-06 Netlist, Inc. Speichermodul mit lokaler synchronisation
US9252751B2 (en) 2014-05-04 2016-02-02 Freescale Semiconductor, Inc. Apparatus and method for preventing multiple resets
US9329210B1 (en) 2014-11-29 2016-05-03 Freescale Semiocnductor, Inc. Voltage monitoring circuit
TWI554042B (zh) 2014-12-08 2016-10-11 財團法人工業技術研究院 訊號比較裝置及其控制方法
KR20220169811A (ko) 2021-06-21 2022-12-28 삼성전자주식회사 아날로그 디지털 변환 장치 및 이의 동작 방법

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4282489A (en) * 1979-05-14 1981-08-04 Harris Data Communications Inc. Metastable detector
US5187385A (en) * 1986-08-29 1993-02-16 Kabushiki Kaisha Toshiba Latch circuit including filter for metastable prevention
JPH02100414A (ja) * 1988-10-06 1990-04-12 Nec Corp 中間レベル検出回路
US5036221A (en) * 1989-03-31 1991-07-30 Texas Instruments Incorporated Circuit for eliminating metastable events associated with a data signal asynchronous to a clock signal
US4982118A (en) * 1989-12-13 1991-01-01 Tektronix, Inc. Data acquisition system having a metastable sense feature
US5017814A (en) * 1989-12-13 1991-05-21 Tektronix, Inc. Metastable sense circuit
US5081377A (en) * 1990-09-21 1992-01-14 At&T Bell Laboratories Latch circuit with reduced metastability
US5122694A (en) * 1990-12-26 1992-06-16 Tektronix, Inc. Method and electrical circuit for eliminating time jitter caused by metastable conditions in asynchronous logic circuits
US5166561A (en) * 1991-07-25 1992-11-24 Northern Telecom Limited Active intelligent termination
US5256914A (en) * 1991-10-03 1993-10-26 National Semiconductor Corporation Short circuit protection circuit and method for output buffers
US5489865A (en) * 1992-02-28 1996-02-06 Media Vision, Inc. Circuit for filtering asynchronous metastability of cross-coupled logic gates
US5510732A (en) * 1994-08-03 1996-04-23 Sun Microsystems, Inc. Synchronizer circuit and method for reducing the occurrence of metastability conditions in digital systems
US5598113A (en) * 1995-01-19 1997-01-28 Intel Corporation Fully asynchronous interface with programmable metastability settling time synchronizer
US5789945A (en) * 1996-02-27 1998-08-04 Philips Electronics North America Corporation Method and circuit for improving metastable resolving time in low-power multi-state devices
US5754070A (en) * 1996-11-19 1998-05-19 Vlsi Technology, Inc. Metastableproof flip-flop
KR100304691B1 (ko) 1998-05-29 2001-09-29 윤종용 트라이스테이트 보상회로를구비하는 출력신호 발생회로

Also Published As

Publication number Publication date
KR100304691B1 (ko) 2001-09-29
EP0961410A2 (de) 1999-12-01
DE69909375T2 (de) 2004-05-27
JP2000013202A (ja) 2000-01-14
EP0961410B1 (de) 2003-07-09
EP0961410A3 (de) 2001-02-07
JP3795685B2 (ja) 2006-07-12
KR19990086693A (ko) 1999-12-15
US6384619B1 (en) 2002-05-07
TW461184B (en) 2001-10-21
US6184701B1 (en) 2001-02-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee