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DE69836969D1 - Vermittlungsanordnung - Google Patents

Vermittlungsanordnung

Info

Publication number
DE69836969D1
DE69836969D1 DE69836969T DE69836969T DE69836969D1 DE 69836969 D1 DE69836969 D1 DE 69836969D1 DE 69836969 T DE69836969 T DE 69836969T DE 69836969 T DE69836969 T DE 69836969T DE 69836969 D1 DE69836969 D1 DE 69836969D1
Authority
DE
Germany
Prior art keywords
switching arrangement
switching
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69836969T
Other languages
English (en)
Inventor
Petri Heiman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Oyj
Original Assignee
Nokia Oyj
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Oyj filed Critical Nokia Oyj
Application granted granted Critical
Publication of DE69836969D1 publication Critical patent/DE69836969D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
    • H04L49/309—Header conversion, routing tables or routing tags
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/256—Routing or path finding in ATM switching fabrics
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478—Provisions for broadband connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/565—Sequence integrity

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
DE69836969T 1997-07-14 1998-07-14 Vermittlungsanordnung Expired - Lifetime DE69836969D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI972979A FI104672B (fi) 1997-07-14 1997-07-14 Kytkinjärjestely
PCT/FI1998/000588 WO1999007180A2 (en) 1997-07-14 1998-07-14 Switching fabric arrangement with re-sequencing memory

Publications (1)

Publication Number Publication Date
DE69836969D1 true DE69836969D1 (de) 2007-03-15

Family

ID=8549249

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69836969T Expired - Lifetime DE69836969D1 (de) 1997-07-14 1998-07-14 Vermittlungsanordnung

Country Status (8)

Country Link
US (1) US6735203B1 (de)
EP (1) EP1013132B1 (de)
CN (1) CN1267441A (de)
AU (1) AU8443198A (de)
BR (1) BR9810719A (de)
DE (1) DE69836969D1 (de)
FI (1) FI104672B (de)
WO (1) WO1999007180A2 (de)

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JP2000295279A (ja) 1999-04-02 2000-10-20 Nec Corp パケットスイッチ
KR20000074195A (ko) * 1999-05-19 2000-12-15 강병호 다중 경로 비동기 전송 모드 스위치를 위한 고속 셀 순서 처리장치 및 방법
US7106728B1 (en) 2000-05-01 2006-09-12 Industrial Technology Research Institute Switching by multistage interconnection of concentrators
US7186464B2 (en) 2000-05-19 2007-03-06 Chevron Phillips Chemical Co. Lp Compatible blend systems of oxygen barrier polymers and oxygen scavenging polymers
US6591285B1 (en) * 2000-06-16 2003-07-08 Shuo-Yen Robert Li Running-sum adder networks determined by recursive construction of multi-stage networks
US7058070B2 (en) * 2001-05-01 2006-06-06 Integrated Device Technology, Inc. Back pressure control system for network switch port
US7609695B2 (en) * 2001-06-15 2009-10-27 Industrial Technology Research Institute Optimizing switching element for minimal latency
US7103059B2 (en) * 2001-06-15 2006-09-05 Industrial Technology Research Institute Scalable 2-stage interconnections
US7027443B2 (en) * 2001-08-23 2006-04-11 Pmc-Sierra Ltd. Reassembly engines for multilink applications
US7293100B2 (en) * 2001-08-31 2007-11-06 Adaptec, Inc. Methods and apparatus for partially reordering data packets
US8189591B2 (en) 2001-10-30 2012-05-29 Exar Corporation Methods, systems and computer program products for packet ordering for parallel packet transform processing
US7088719B2 (en) 2001-12-21 2006-08-08 Agere Systems Inc. Processor with packet processing order maintenance based on packet flow identifiers
US7613200B1 (en) * 2002-01-15 2009-11-03 Cisco Technology, Inc. Method and apparatus using a random indication to map items to paths and to recirculate or delay the sending of a particular item when a destination over its mapped path is unreachable
AU2003221530A1 (en) * 2002-03-05 2003-09-16 International Business Machines Corporation Method and system for ordered dynamic distribution of packet flows over network processors
US20030196081A1 (en) * 2002-04-11 2003-10-16 Raymond Savarda Methods, systems, and computer program products for processing a packet-object using multiple pipelined processing modules
US7224691B1 (en) * 2002-09-12 2007-05-29 Juniper Networks, Inc. Flow control systems and methods for multi-level buffering schemes
CN100420236C (zh) * 2005-04-29 2008-09-17 华为技术有限公司 用于WiMAX流交换的交换系统
US20070076761A1 (en) * 2005-09-15 2007-04-05 Coke Reed Apparatus for interconnecting multiple devices to a synchronous device
CN1859263B (zh) * 2005-11-16 2010-10-06 华为技术有限公司 信元重排序方法、使用该方法的信元处理方法及装置
US8179887B1 (en) * 2008-02-01 2012-05-15 Tellabs Operations, Inc. Method and apparatus for improving performance of TDM sequencing for packet processing engines using a delay line
US8547971B1 (en) 2009-01-07 2013-10-01 Marvell Israel (M.I.S.L) Ltd. Multi-stage switching system
US8358651B1 (en) 2009-09-21 2013-01-22 Marvell International Ltd. Switch device having a plurality of processing cores
US8984206B2 (en) 2012-10-31 2015-03-17 International Business Machines Corporation Weightage-based scheduling for hierarchical switching fabrics
US9455907B1 (en) 2012-11-29 2016-09-27 Marvell Israel (M.I.S.L) Ltd. Multithreaded parallel packet processing in network devices
US9553820B2 (en) 2012-12-17 2017-01-24 Marvell Israel (M.L.S.L) Ltd. Maintaining packet order in a parallel processing network device
WO2014096964A1 (en) * 2012-12-17 2014-06-26 Marvell Israel (M.I.S.L. ) Ltd. Maintaining packet order in a parallel processing network device
US8902899B2 (en) * 2013-02-08 2014-12-02 International Business Machines Corporation Input buffered switching device including bypass logic
WO2014140822A1 (en) * 2013-03-13 2014-09-18 Marvell Israel (M.I.S.L.) Ltd. Maintaining packet order in a parallel processing network device
CN105765928B (zh) 2013-09-10 2019-02-15 马维尔国际贸易有限公司 用于处理网络分组的方法和网络设备
US9571541B1 (en) 2013-10-03 2017-02-14 Marvell Israel (M.I.S.L.) Ltd. Network device architecture using cache for multicast packets
US9374303B1 (en) 2013-10-15 2016-06-21 Marvell Israel (M.I.S.L) Ltd. Method and apparatus for processing multicast packets
CN105794172B (zh) 2013-10-17 2019-02-15 马维尔国际贸易有限公司 网络设备和用于在网络设备中处理报文的方法
US9467399B2 (en) 2013-10-17 2016-10-11 Marvell World Trade Ltd. Processing concurrency in a network device
US9923813B2 (en) 2013-12-18 2018-03-20 Marvell World Trade Ltd. Increasing packet processing rate in a network device
US9467396B2 (en) 2014-04-11 2016-10-11 International Business Machines Corporation Simultaneous transfers from a single input link to multiple output links with a timesliced crossbar
US9886273B1 (en) 2014-08-28 2018-02-06 Marvell Israel (M.I.S.L.) Ltd. Maintaining packet order in a parallel processing network device
US9954771B1 (en) 2015-01-30 2018-04-24 Marvell Israel (M.I.S.L) Ltd. Packet distribution with prefetch in a parallel processing network device
US10904150B1 (en) 2016-02-02 2021-01-26 Marvell Israel (M.I.S.L) Ltd. Distributed dynamic load balancing in network systems
CN109845199B (zh) 2016-09-12 2022-03-04 马维尔亚洲私人有限公司 合并网络设备架构中的读取请求
US10701002B1 (en) 2016-12-07 2020-06-30 Marvell International Ltd. System and method for memory deallocation
WO2018122619A2 (en) 2016-12-07 2018-07-05 Marvell World Trade Ltd. System and method for memory access token reassignment
US10735221B2 (en) 2017-03-28 2020-08-04 Marvell International Ltd. Flexible processor of a port extender device
US11036403B2 (en) 2018-07-30 2021-06-15 Marvell Asia Pte, Ltd. Shared memory block configuration
US11343358B2 (en) 2019-01-29 2022-05-24 Marvell Israel (M.I.S.L) Ltd. Flexible header alteration in network devices
CN115088239A (zh) 2019-12-13 2022-09-20 马维尔以色列(M.I.S.L.)有限公司 用于网络设备的混合固定/可编程报头解析器

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3942977A1 (de) * 1989-12-23 1991-06-27 Standard Elektrik Lorenz Ag Verfahren zum wiederherstellen der richtigen zellfolge, insbesondere in einer atm-vermittlungsstelle, sowie ausgangseinheit hierfuer
DE4008080A1 (de) * 1990-03-14 1991-09-19 Standard Elektrik Lorenz Ag Atm-vermittlungsstelle
EP0587944B1 (de) * 1992-09-18 1998-05-20 Alcatel System zur Wiederherstellung der Zellenreihenfolge für ein Telekommunikationsnetzwerk
JP2629568B2 (ja) 1993-07-30 1997-07-09 日本電気株式会社 Ａｔｍセル交換方式
US5481536A (en) * 1993-10-29 1996-01-02 Siemens Aktiengesellschaft Method for restoring a prescribed sequence for unordered cell streams in ATM switching technology
US5859835A (en) * 1996-04-15 1999-01-12 The Regents Of The University Of California Traffic scheduling system and method for packet-switched networks
US5987028A (en) * 1997-05-12 1999-11-16 Industrial Technology Research Insitute Multiple channel ATM switch

Also Published As

Publication number Publication date
WO1999007180A3 (en) 1999-04-29
US6735203B1 (en) 2004-05-11
WO1999007180A2 (en) 1999-02-11
FI972979A0 (fi) 1997-07-14
EP1013132A2 (de) 2000-06-28
FI972979A (fi) 1999-01-15
EP1013132B1 (de) 2007-01-24
AU8443198A (en) 1999-02-22
CN1267441A (zh) 2000-09-20
FI104672B (fi) 2000-04-14
BR9810719A (pt) 2000-08-08

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Legal Events

Date Code Title Description
8332 No legal effect for de