DE69736872D1 - Datenverarbeitungssystem - Google Patents
DatenverarbeitungssystemInfo
- Publication number
- DE69736872D1 DE69736872D1 DE69736872T DE69736872T DE69736872D1 DE 69736872 D1 DE69736872 D1 DE 69736872D1 DE 69736872 T DE69736872 T DE 69736872T DE 69736872 T DE69736872 T DE 69736872T DE 69736872 D1 DE69736872 D1 DE 69736872D1
- Authority
- DE
- Germany
- Prior art keywords
- data processing
- processing system
- data
- processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bus Control (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US627810 | 1996-04-10 | ||
US08/627,810 US6175888B1 (en) | 1996-04-10 | 1996-04-10 | Dual host bridge with peer to peer support |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69736872D1 true DE69736872D1 (de) | 2006-12-14 |
DE69736872T2 DE69736872T2 (de) | 2007-04-26 |
Family
ID=24516227
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69736872T Expired - Lifetime DE69736872T2 (de) | 1996-04-10 | 1997-03-20 | Datenverarbeitungssystem |
Country Status (6)
Country | Link |
---|---|
US (1) | US6175888B1 (de) |
EP (1) | EP0801352B1 (de) |
JP (1) | JP3476174B2 (de) |
KR (1) | KR100271203B1 (de) |
DE (1) | DE69736872T2 (de) |
TW (1) | TW311191B (de) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6338107B1 (en) * | 1998-12-16 | 2002-01-08 | International Business Machines Corporation | Method and system for providing hot plug of adapter cards in an expanded slot environment |
US6301627B1 (en) * | 1998-12-18 | 2001-10-09 | International Business Machines Corporation | Method/system for identifying delayed predetermined information transfer request as bypassable by subsequently-generated information transfer request using bypass enable bit in bridge translation control entry |
US6529991B1 (en) * | 1999-05-12 | 2003-03-04 | International Business Machines Corporation | Ordering mechanism, ordering method and computer program product for implementing PCI peer to functions |
US6581141B1 (en) * | 1999-05-18 | 2003-06-17 | International Business Machines Corporation | Toggle for split transaction mode of PCI-X bridge buffer |
US6469703B1 (en) | 1999-07-02 | 2002-10-22 | Ati International Srl | System of accessing data in a graphics system and method thereof |
US6480917B1 (en) * | 1999-08-19 | 2002-11-12 | International Business Machines Corporation | Device arbitration including peer-to-peer access arbitration |
US7002537B1 (en) | 1999-09-27 | 2006-02-21 | Seiko Epson Corporation | Method of driving electrooptic device, driving circuit, electrooptic device, and electronic apparatus |
JP3391315B2 (ja) * | 1999-10-20 | 2003-03-31 | 日本電気株式会社 | バス制御装置 |
JP2001256176A (ja) * | 2000-03-13 | 2001-09-21 | Mitsubishi Electric Corp | ブリッジ装置 |
US6678775B1 (en) * | 2000-12-29 | 2004-01-13 | Hewlett-Packard Development Company, L.P. | System enabling automatic error detection in response to removal of bus adapter |
JP2002207688A (ja) * | 2001-01-05 | 2002-07-26 | Mitsubishi Electric Corp | コンフィギュレーションアクセスを複数個のセカンダリポートに経路制御するための方法および装置 |
US6813667B2 (en) * | 2001-09-05 | 2004-11-02 | Hewlett-Packard Development Company, L.P. | Bus extender and formatter apparatus and methods |
US6836813B1 (en) | 2001-11-30 | 2004-12-28 | Advanced Micro Devices, Inc. | Switching I/O node for connection in a multiprocessor computer system |
US6754737B2 (en) * | 2001-12-24 | 2004-06-22 | Hewlett-Packard Development Company, L.P. | Method and apparatus to allow dynamic variation of ordering enforcement between transactions in a strongly ordered computer interconnect |
US6883057B2 (en) * | 2002-02-15 | 2005-04-19 | International Business Machines Corporation | Method and apparatus embedding PCI-to-PCI bridge functions in PCI devices using PCI configuration header type 0 |
US6976115B2 (en) * | 2002-03-28 | 2005-12-13 | Intel Corporation | Peer-to-peer bus segment bridging |
JP2004334410A (ja) * | 2003-05-06 | 2004-11-25 | Hitachi Ltd | 情報処理装置及びプロセッサ |
US20040243757A1 (en) * | 2003-05-29 | 2004-12-02 | Oliver Brett Douglas | Connecting PCI buses |
US7284082B2 (en) * | 2004-08-19 | 2007-10-16 | Lsi Corporation | Controller apparatus and method for improved data transfer |
US20070005865A1 (en) * | 2005-06-29 | 2007-01-04 | Spry Bryan L | Enforcing global ordering using an inter-queue ordering mechanism |
JP4785637B2 (ja) * | 2006-06-16 | 2011-10-05 | キヤノン株式会社 | データ転送装置及びその制御方法 |
JP4501916B2 (ja) | 2006-09-20 | 2010-07-14 | 日本電気株式会社 | I/o機器の共有システムと情報処理装置共有システム及びそれらに用いる方法 |
US7711888B2 (en) * | 2006-12-31 | 2010-05-04 | Texas Instruments Incorporated | Systems and methods for improving data transfer between devices |
KR100873010B1 (ko) | 2007-05-17 | 2008-12-09 | 한국과학기술원 | 논블록킹 마스터, 버스 중재장치, 버스 시스템, 및 버스중재 방법 |
US8244951B2 (en) * | 2008-09-25 | 2012-08-14 | Intel Corporation | Method and apparatus to facilitate system to system protocol exchange in back to back non-transparent bridges |
US9424219B2 (en) | 2013-03-12 | 2016-08-23 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Direct routing between address spaces through a nontransparent peripheral component interconnect express bridge |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5574869A (en) * | 1992-03-30 | 1996-11-12 | Intel Corporation | Bus bridge circuit having configuration space enable register for controlling transition between various modes by writing the bridge identifier into CSE register |
CA2092631C (en) | 1992-06-19 | 1997-04-08 | Don Steven Keener | Physical partitioning of logically continuous bus |
US5566345A (en) * | 1994-08-31 | 1996-10-15 | Ostrowski; Carl L. | SCSI bus capacity expansion controller using gating circuits to arbitrate DMA requests from a plurality of disk drives |
US5621902A (en) * | 1994-11-30 | 1997-04-15 | International Business Machines Corporation | Computer system having a bridge between two buses with a direct memory access controller and an alternative memory access controller |
US5594873A (en) * | 1994-12-08 | 1997-01-14 | Dell Usa, L.P. | System and method for identifying expansion devices in a computer system |
US5734850A (en) | 1995-07-05 | 1998-03-31 | National Semiconductor Corporation | Transparent bridge between of a computer system and a method of interfacing the buses to operate as a single logical bus |
US5859988A (en) * | 1995-09-29 | 1999-01-12 | Intel Corporation | Triple-port bus bridge |
US5632021A (en) * | 1995-10-25 | 1997-05-20 | Cisco Systems Inc. | Computer system with cascaded peripheral component interconnect (PCI) buses |
-
1996
- 1996-04-10 US US08/627,810 patent/US6175888B1/en not_active Expired - Lifetime
- 1996-06-22 TW TW085107512A patent/TW311191B/zh active
-
1997
- 1997-02-28 KR KR1019970006790A patent/KR100271203B1/ko not_active IP Right Cessation
- 1997-03-20 EP EP97301904A patent/EP0801352B1/de not_active Expired - Lifetime
- 1997-03-20 DE DE69736872T patent/DE69736872T2/de not_active Expired - Lifetime
- 1997-04-02 JP JP08420597A patent/JP3476174B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JP3476174B2 (ja) | 2003-12-10 |
EP0801352A3 (de) | 1998-10-14 |
KR100271203B1 (ko) | 2000-11-01 |
EP0801352A2 (de) | 1997-10-15 |
EP0801352B1 (de) | 2006-11-02 |
US6175888B1 (en) | 2001-01-16 |
JPH1049482A (ja) | 1998-02-20 |
TW311191B (en) | 1997-07-21 |
KR970071311A (ko) | 1997-11-07 |
DE69736872T2 (de) | 2007-04-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) |