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DE69620499D1 - Matrizen Tranzposition - Google Patents

Matrizen Tranzposition

Info

Publication number
DE69620499D1
DE69620499D1 DE69620499T DE69620499T DE69620499D1 DE 69620499 D1 DE69620499 D1 DE 69620499D1 DE 69620499 T DE69620499 T DE 69620499T DE 69620499 T DE69620499 T DE 69620499T DE 69620499 D1 DE69620499 D1 DE 69620499D1
Authority
DE
Germany
Prior art keywords
transposition
matrices
matrices transposition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69620499T
Other languages
English (en)
Other versions
DE69620499T2 (de
Inventor
Nathan Mackenzie Sidwell
Catherine Louise Barnaby
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Ltd Great Britain
Original Assignee
STMicroelectronics Ltd Great Britain
SGS Thomson Microelectronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Ltd Great Britain, SGS Thomson Microelectronics Ltd filed Critical STMicroelectronics Ltd Great Britain
Application granted granted Critical
Publication of DE69620499D1 publication Critical patent/DE69620499D1/de
Publication of DE69620499T2 publication Critical patent/DE69620499T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30025—Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Computing Systems (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Executing Machine-Instructions (AREA)
  • Complex Calculations (AREA)
  • Memory System (AREA)
DE69620499T 1995-05-17 1996-05-15 Matrizen Tranzposition Expired - Fee Related DE69620499T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB9509988.3A GB9509988D0 (en) 1995-05-17 1995-05-17 Matrix transposition

Publications (2)

Publication Number Publication Date
DE69620499D1 true DE69620499D1 (de) 2002-05-16
DE69620499T2 DE69620499T2 (de) 2002-11-14

Family

ID=10774616

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69620499T Expired - Fee Related DE69620499T2 (de) 1995-05-17 1996-05-15 Matrizen Tranzposition

Country Status (5)

Country Link
US (1) US5875355A (de)
EP (1) EP0743594B1 (de)
JP (1) JP3138209B2 (de)
DE (1) DE69620499T2 (de)
GB (1) GB9509988D0 (de)

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US7392275B2 (en) * 1998-03-31 2008-06-24 Intel Corporation Method and apparatus for performing efficient transformations with horizontal addition and subtraction
US6418529B1 (en) * 1998-03-31 2002-07-09 Intel Corporation Apparatus and method for performing intra-add operation
US7395302B2 (en) 1998-03-31 2008-07-01 Intel Corporation Method and apparatus for performing horizontal addition and subtraction
US6212618B1 (en) * 1998-03-31 2001-04-03 Intel Corporation Apparatus and method for performing multi-dimensional computations based on intra-add operation
US6115812A (en) * 1998-04-01 2000-09-05 Intel Corporation Method and apparatus for efficient vertical SIMD computations
US6625721B1 (en) 1999-07-26 2003-09-23 Intel Corporation Registers for 2-D matrix processing
US7546444B1 (en) 1999-09-01 2009-06-09 Intel Corporation Register set used in multithreaded parallel processor architecture
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US6629207B1 (en) 1999-10-01 2003-09-30 Hitachi, Ltd. Method for loading instructions or data into a locked way of a cache memory
US6772325B1 (en) * 1999-10-01 2004-08-03 Hitachi, Ltd. Processor architecture and operation for exploiting improved branch control instruction
US6553460B1 (en) 1999-10-01 2003-04-22 Hitachi, Ltd. Microprocessor having improved memory management unit and cache memory
US20050188182A1 (en) * 1999-12-30 2005-08-25 Texas Instruments Incorporated Microprocessor having a set of byte intermingling instructions
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US7249242B2 (en) * 2002-10-28 2007-07-24 Nvidia Corporation Input pipeline registers for a node in an adaptive computing engine
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US7054897B2 (en) * 2001-10-03 2006-05-30 Dsp Group, Ltd. Transposable register file
US7853778B2 (en) 2001-12-20 2010-12-14 Intel Corporation Load/move and duplicate instructions for a processor
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US7467287B1 (en) 2001-12-31 2008-12-16 Apple Inc. Method and apparatus for vector table look-up
US7015921B1 (en) 2001-12-31 2006-03-21 Apple Computer, Inc. Method and apparatus for memory access
US7114058B1 (en) 2001-12-31 2006-09-26 Apple Computer, Inc. Method and apparatus for forming and dispatching instruction groups based on priority comparisons
US7305540B1 (en) 2001-12-31 2007-12-04 Apple Inc. Method and apparatus for data processing
US7055018B1 (en) 2001-12-31 2006-05-30 Apple Computer, Inc. Apparatus for parallel vector table look-up
US7034849B1 (en) 2001-12-31 2006-04-25 Apple Computer, Inc. Method and apparatus for image blending
US6877020B1 (en) 2001-12-31 2005-04-05 Apple Computer, Inc. Method and apparatus for matrix transposition
US7681013B1 (en) 2001-12-31 2010-03-16 Apple Inc. Method for variable length decoding using multiple configurable look-up tables
US6931511B1 (en) 2001-12-31 2005-08-16 Apple Computer, Inc. Parallel vector table look-up with replicated index element vector
US6697076B1 (en) 2001-12-31 2004-02-24 Apple Computer, Inc. Method and apparatus for address re-mapping
US7558947B1 (en) 2001-12-31 2009-07-07 Apple Inc. Method and apparatus for computing vector absolute differences
US6693643B1 (en) 2001-12-31 2004-02-17 Apple Computer, Inc. Method and apparatus for color space conversion
US6573846B1 (en) 2001-12-31 2003-06-03 Apple Computer, Inc. Method and apparatus for variable length decoding and encoding of video streams
US7437724B2 (en) * 2002-04-03 2008-10-14 Intel Corporation Registers for data transfers
US7039795B2 (en) * 2002-06-14 2006-05-02 Texas Instruments Incorporated System and method for using a two-stage multiplexing architecture for performing combinations of passing, rearranging, and duplicating operations on data
US20030231660A1 (en) * 2002-06-14 2003-12-18 Bapiraju Vinnakota Bit-manipulation instructions for packet processing
US6707398B1 (en) 2002-10-24 2004-03-16 Apple Computer, Inc. Methods and apparatuses for packing bitstreams
US6781528B1 (en) 2002-10-24 2004-08-24 Apple Computer, Inc. Vector handling capable processor and run length encoding
US6707397B1 (en) 2002-10-24 2004-03-16 Apple Computer, Inc. Methods and apparatus for variable length codeword concatenation
US6781529B1 (en) * 2002-10-24 2004-08-24 Apple Computer, Inc. Methods and apparatuses for variable length encoding
US7353371B2 (en) * 2002-12-05 2008-04-01 Intel Corporation Circuit to extract nonadjacent bits from data packets
GB2409062C (en) * 2003-12-09 2007-12-11 Advanced Risc Mach Ltd Aliasing data processing registers
GB2409063B (en) * 2003-12-09 2006-07-12 Advanced Risc Mach Ltd Vector by scalar operations
GB2411976B (en) * 2003-12-09 2006-07-19 Advanced Risc Mach Ltd A data processing apparatus and method for moving data between registers and memory
GB2409066B (en) * 2003-12-09 2006-09-27 Advanced Risc Mach Ltd A data processing apparatus and method for moving data between registers and memory
GB2411973B (en) * 2003-12-09 2006-09-27 Advanced Risc Mach Ltd Constant generation in SMD processing
GB2409068A (en) * 2003-12-09 2005-06-15 Advanced Risc Mach Ltd Data element size control within parallel lanes of processing
GB2409065B (en) * 2003-12-09 2006-10-25 Advanced Risc Mach Ltd Multiplexing operations in SIMD processing
GB2409061B (en) * 2003-12-09 2006-09-13 Advanced Risc Mach Ltd Table lookup operation within a data processing system
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GB2409064B (en) * 2003-12-09 2006-09-13 Advanced Risc Mach Ltd A data processing apparatus and method for performing in parallel a data processing operation on data elements
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US9557994B2 (en) * 2004-07-13 2017-01-31 Arm Limited Data processing apparatus and method for performing N-way interleaving and de-interleaving operations where N is an odd plural number
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US8095745B1 (en) * 2006-08-07 2012-01-10 Marvell International Ltd. Non-sequential transfer of data from a memory
JP5532132B2 (ja) * 2009-11-26 2014-06-25 日本電気株式会社 Ｓｉｍｄモードで動作するプロセッシング・エレメントの内部メモリに分散記憶された正方マトリックス及びその転置マトリックスに、時間と面積の効率良いアクセスを可能とする装置及び方法
JP5760532B2 (ja) * 2011-03-14 2015-08-12 株式会社リコー プロセッサ装置及びその演算方法
KR101977823B1 (ko) * 2012-04-02 2019-05-13 삼성전자주식회사 랜덤 순열 생성 방법, 랜덤 순열 생성 장치 및 이를 구비하는 암복호화 장치
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Also Published As

Publication number Publication date
JPH08314898A (ja) 1996-11-29
GB9509988D0 (en) 1995-07-12
DE69620499T2 (de) 2002-11-14
JP3138209B2 (ja) 2001-02-26
EP0743594B1 (de) 2002-04-10
US5875355A (en) 1999-02-23
EP0743594A1 (de) 1996-11-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee