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DE68918149D1 - Vorrichtung und Verfahren zum Herstellen einer Vorrichtung. - Google Patents

Vorrichtung und Verfahren zum Herstellen einer Vorrichtung.

Info

Publication number
DE68918149D1
DE68918149D1 DE68918149T DE68918149T DE68918149D1 DE 68918149 D1 DE68918149 D1 DE 68918149D1 DE 68918149 T DE68918149 T DE 68918149T DE 68918149 T DE68918149 T DE 68918149T DE 68918149 D1 DE68918149 D1 DE 68918149D1
Authority
DE
Germany
Prior art keywords
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68918149T
Other languages
English (en)
Other versions
DE68918149T2 (de
Inventor
Andries Rinse Miedema
Der Kolk Gerrit Jan Van
Johan Philippe Willi Duchateau
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE68918149D1 publication Critical patent/DE68918149D1/de
Publication of DE68918149T2 publication Critical patent/DE68918149T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • H10N60/0268Manufacture or treatment of devices comprising copper oxide
    • H10N60/0744Manufacture or deposition of electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76891Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by using superconducting materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53285Conductive materials containing superconducting materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/437Superconductor materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/452Ohmic electrodes on AIII-BV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00Superconductor technology: apparatus, material, process
    • Y10S505/70High TC, above 30 k, superconducting device, article, or structured stock
    • Y10S505/701Coated or thin film device, i.e. active or passive
    • Y10S505/702Josephson junction present

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Electrodes Of Semiconductors (AREA)
DE68918149T 1988-04-21 1989-04-17 Vorrichtung und Verfahren zum Herstellen einer Vorrichtung. Expired - Fee Related DE68918149T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL8801032A NL8801032A (nl) 1988-04-21 1988-04-21 Inrichting en werkwijze voor het vervaardigen van een inrichting.

Publications (2)

Publication Number Publication Date
DE68918149D1 true DE68918149D1 (de) 1994-10-20
DE68918149T2 DE68918149T2 (de) 1995-04-06

Family

ID=19852173

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68918149T Expired - Fee Related DE68918149T2 (de) 1988-04-21 1989-04-17 Vorrichtung und Verfahren zum Herstellen einer Vorrichtung.

Country Status (6)

Country Link
US (1) US5104848A (de)
EP (1) EP0338631B1 (de)
JP (1) JPH0215682A (de)
KR (1) KR900017142A (de)
DE (1) DE68918149T2 (de)
NL (1) NL8801032A (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5084437A (en) * 1990-02-28 1992-01-28 Westinghouse Electric Corp. Method for making high-current, ohmic contacts between semiconductors and oxide superconductors
JPH0697522A (ja) * 1990-11-30 1994-04-08 Internatl Business Mach Corp <Ibm> 超伝導材料の薄膜の製造方法
JPH06508481A (ja) * 1991-06-24 1994-09-22 フォルシュングスツェントルム・ユーリッヒ・ゲゼルシャフト・ミト・ベシュレンクテル・ハフツング 配列化されたパターン導線とこの導線を製造する方法
US5356833A (en) * 1993-04-05 1994-10-18 Motorola, Inc. Process for forming an intermetallic member on a semiconductor substrate
DE19614458C2 (de) * 1996-04-12 1998-10-29 Grundfos As Druck- oder Differenzdrucksensor und Verfahren zu seiner Herstellung
KR100243286B1 (ko) * 1997-03-05 2000-03-02 윤종용 반도체 장치의 제조방법
JP3097646B2 (ja) * 1998-01-28 2000-10-10 日本電気株式会社 合金とその製造方法及びx線マスクとその製造方法及び半導体デバイスの製造方法
US6642567B1 (en) * 2000-08-31 2003-11-04 Micron Technology, Inc. Devices containing zirconium-platinum-containing materials and methods for preparing such materials and devices
US6794338B2 (en) 2001-11-16 2004-09-21 3M Innovative Properties Company Article with thermochemically stable, amorphous layer comprising tantalum or tantalum-containing material
US6826207B2 (en) * 2001-12-17 2004-11-30 Peleton Photonic Systems Inc. Multi-wavelength laser source based on two optical laser beat signal and method
JP2004319411A (ja) * 2003-04-21 2004-11-11 Mitsubishi Materials Corp マイクロマシンスイッチの接触電極用薄膜およびこの接触電極用薄膜を形成するためのスパッタリングターゲット
US8161811B2 (en) * 2009-12-18 2012-04-24 Honeywell International Inc. Flow sensors having nanoscale coating for corrosion resistance
WO2013095523A1 (en) * 2011-12-22 2013-06-27 Intel Corporation Cmos-compatible gold-free contacts
US9741918B2 (en) 2013-10-07 2017-08-22 Hypres, Inc. Method for increasing the integration level of superconducting electronics circuits, and a resulting circuit
CN113122784A (zh) * 2021-04-19 2021-07-16 西南大学 一种钼基块体非晶合金及其制备方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2086887A5 (de) * 1970-04-13 1971-12-31 Air Liquide
US4316200A (en) * 1980-03-07 1982-02-16 International Business Machines Corporation Contact technique for electrical circuitry
JPS5916430B2 (ja) * 1980-10-31 1984-04-16 理化学研究所 ジヨセフソン接合素子とその製造方法
JPS586188A (ja) * 1981-07-02 1983-01-13 Nec Corp ジヨセフソン接合素子
US4454522A (en) * 1981-11-05 1984-06-12 The Board Of Trustees Of The Leland Stanford Junior University Microbridge superconducting device having support with stepped parallel surfaces
US4470190A (en) * 1982-11-29 1984-09-11 At&T Bell Laboratories Josephson device fabrication method
JPS60147179A (ja) * 1984-01-11 1985-08-03 Hitachi Ltd 超電導多端子素子
JPS60169175A (ja) * 1984-02-13 1985-09-02 Rikagaku Kenkyusho 弱結合ジョセフソン接合素子
JPS61102788A (ja) * 1984-10-26 1986-05-21 Agency Of Ind Science & Technol サンドイツチ型ジヨセフソン接合装置
JPS62248272A (ja) * 1986-04-21 1987-10-29 Nippon Telegr & Teleph Corp <Ntt> 超伝導マイクロブリツジ
DE3810494C2 (de) * 1987-03-27 1998-08-20 Hitachi Ltd Integrierte Halbleiterschaltungseinrichtung mit supraleitender Schicht
US4837609A (en) * 1987-09-09 1989-06-06 American Telephone And Telegraph Company, At&T Bell Laboratories Semiconductor devices having superconducting interconnects
SG28390G (en) * 1987-12-25 1995-09-01 Sumitomo Electric Industries A semiconductor substrate having a superconducting thin film

Also Published As

Publication number Publication date
NL8801032A (nl) 1989-11-16
US5104848A (en) 1992-04-14
KR900017142A (ko) 1990-11-15
EP0338631A1 (de) 1989-10-25
DE68918149T2 (de) 1995-04-06
EP0338631B1 (de) 1994-09-14
JPH0215682A (ja) 1990-01-19

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee