DE68913807D1 - Taktgeber. - Google Patents
Taktgeber.Info
- Publication number
- DE68913807D1 DE68913807D1 DE89109091T DE68913807T DE68913807D1 DE 68913807 D1 DE68913807 D1 DE 68913807D1 DE 89109091 T DE89109091 T DE 89109091T DE 68913807 T DE68913807 T DE 68913807T DE 68913807 D1 DE68913807 D1 DE 68913807D1
- Authority
- DE
- Germany
- Prior art keywords
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
- G01R31/31937—Timing aspects, e.g. measuring propagation delay
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31922—Timing generation or clock distribution
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/78—Generating a single train of pulses having a predetermined pattern, e.g. a predetermined number
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/131—Digitally controlled
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/0015—Layout of the delay element
- H03K2005/00234—Layout of the delay element using circuits having two logic levels
- H03K2005/00247—Layout of the delay element using circuits having two logic levels using counters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/0015—Layout of the delay element
- H03K2005/00234—Layout of the delay element using circuits having two logic levels
- H03K2005/0026—Layout of the delay element using circuits having two logic levels using memories or FIFO's
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Tests Of Electronic Circuits (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63126597A JP2719684B2 (ja) | 1988-05-23 | 1988-05-23 | 遅延発生装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68913807D1 true DE68913807D1 (de) | 1994-04-21 |
DE68913807T2 DE68913807T2 (de) | 1994-08-04 |
Family
ID=14939127
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68913807T Expired - Fee Related DE68913807T2 (de) | 1988-05-23 | 1989-05-19 | Taktgeber. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4998025A (de) |
EP (1) | EP0343537B1 (de) |
JP (1) | JP2719684B2 (de) |
DE (1) | DE68913807T2 (de) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5321702A (en) * | 1989-10-11 | 1994-06-14 | Teradyne, Inc. | High speed timing generator |
JP2915945B2 (ja) * | 1990-01-12 | 1999-07-05 | 株式会社アドバンテスト | メモリ試験装置 |
JPH0816857B2 (ja) * | 1990-07-20 | 1996-02-21 | 富士通株式会社 | クロック制御装置 |
US5212443A (en) * | 1990-09-05 | 1993-05-18 | Schlumberger Technologies, Inc. | Event sequencer for automatic test equipment |
US5225772A (en) * | 1990-09-05 | 1993-07-06 | Schlumberger Technologies, Inc. | Automatic test equipment system using pin slice architecture |
US5293080A (en) * | 1990-10-09 | 1994-03-08 | Hewlett-Packard Company | Method and apparatus for generating test waveforms to be applied to a device under test |
FR2684208B1 (fr) * | 1990-10-30 | 1995-01-27 | Teradyne Inc | Circuit destine a fournir une information de periode. |
EP0491998B1 (de) * | 1990-12-28 | 1996-07-24 | International Business Machines Corporation | Programmgesteuertes Verfahren und Anordnung zur Erzeugung von Impulsen in aufeinanderfolgenden Impulsintervallen |
FR2671261B1 (fr) * | 1991-01-04 | 1993-04-02 | Tecnoma | Appareillage de traitement du sol ou de la vegetation, comprenant une rampe pouvant pivoter par rapport a des axes longitudinal et transversal. |
US5272390A (en) * | 1991-09-23 | 1993-12-21 | Digital Equipment Corporation | Method and apparatus for clock skew reduction through absolute delay regulation |
US5321315A (en) * | 1992-03-09 | 1994-06-14 | Eastman Kodak Company | Tracking control pulse generation for variable frame rate CCD sensors for electronic imaging applications |
CA2127192C (en) * | 1993-07-01 | 1999-09-07 | Alan Brent Hussey | Shaping ate bursts, particularly in gallium arsenide |
EP0686917A1 (de) * | 1994-06-07 | 1995-12-13 | International Business Machines Corporation | Vorrichtung zur Bearbeitung einer Serie von Taktsignalen |
US5867050A (en) * | 1995-12-28 | 1999-02-02 | Ando Electric Co., Ltd. | Timing generator circuit |
GB9910943D0 (en) * | 1999-05-11 | 1999-07-14 | Sgs Thomson Microelectronics | Response time measurement |
WO2004055532A1 (ja) * | 2002-12-13 | 2004-07-01 | Advantest Corporation | タイミング発生回路とこのタイミング発生回路を備えた半導体試験装置 |
KR100590204B1 (ko) * | 2003-11-04 | 2006-06-15 | 삼성전자주식회사 | 온-칩 셋업/홀드 측정 회로를 포함한 집적 회로 장치 |
GB0413146D0 (en) * | 2004-06-12 | 2004-07-14 | Texas Instruments Ltd | Comparator for circuit testing |
JP4463173B2 (ja) * | 2005-09-14 | 2010-05-12 | 株式会社アドバンテスト | 試験装置、試験方法、プログラム、及び記録媒体 |
US8295182B2 (en) | 2007-07-03 | 2012-10-23 | Credence Systems Corporation | Routed event test system and method |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58215123A (ja) * | 1982-06-07 | 1983-12-14 | Advantest Corp | 多相タイミング発生装置 |
JPS5997065A (ja) * | 1982-11-25 | 1984-06-04 | Advantest Corp | 論理回路試験装置の試験パタ−ン発生装置 |
AU2592384A (en) * | 1983-03-26 | 1984-09-27 | Itt Industries, Inc. | Digital horizontal synchronization |
US4789835A (en) * | 1983-08-01 | 1988-12-06 | Fairchild Camera & Instrument Corporation | Control of signal timing apparatus in automatic test systems using minimal memory |
JPS6089774A (ja) * | 1983-08-01 | 1985-05-20 | フエアチアイルド カメラ アンド インストルメント コ−ポレ−シヨン | 最小メモリを使用した自動テスト方式における信号タイミング装置の制御 |
US4849702A (en) * | 1983-08-01 | 1989-07-18 | Schlumberger Techologies, Inc. | Test period generator for automatic test equipment |
US4855681A (en) * | 1987-06-08 | 1989-08-08 | International Business Machines Corporation | Timing generator for generating a multiplicty of timing signals having selectable pulse positions |
US4837521A (en) * | 1987-07-02 | 1989-06-06 | Schlumberger Systems & Services, Inc. | Delay line control system for automatic test equipment |
US4864160A (en) * | 1987-09-04 | 1989-09-05 | Schlumberger Systems And Services, Inc. | Timing signal generator |
-
1988
- 1988-05-23 JP JP63126597A patent/JP2719684B2/ja not_active Expired - Lifetime
-
1989
- 1989-05-19 DE DE68913807T patent/DE68913807T2/de not_active Expired - Fee Related
- 1989-05-19 EP EP89109091A patent/EP0343537B1/de not_active Expired - Lifetime
- 1989-05-22 US US07/354,775 patent/US4998025A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0343537A2 (de) | 1989-11-29 |
US4998025A (en) | 1991-03-05 |
DE68913807T2 (de) | 1994-08-04 |
EP0343537B1 (de) | 1994-03-16 |
EP0343537A3 (en) | 1990-05-23 |
JPH01295184A (ja) | 1989-11-28 |
JP2719684B2 (ja) | 1998-02-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Free format text: HOFFMANN, E., DIPL.-ING., PAT.-ANW., 82166 GRAEFELFING |
|
8339 | Ceased/non-payment of the annual fee |