DE68910413D1 - Ausgangsschaltung. - Google Patents

Ausgangsschaltung.

Info

Publication number: DE68910413D1
Authority: DE; Germany
Prior art keywords: output circuit; circuit; output
Prior art date: 1988-07-22
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

DE89113450T

Other languages

English (en)

Other versions

DE68910413T2 (de

Inventor

Masaji C O Intellectual P Ueno

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Toshiba Corp

Original Assignee

Toshiba Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1988-07-22

Filing date

1989-07-21

Publication date

1993-12-09

1989-07-21 Application filed by Toshiba Corp filed Critical Toshiba Corp

1993-12-09 Publication of DE68910413D1 publication Critical patent/DE68910413D1/de

1994-04-21 Application granted granted Critical

1994-04-21 Publication of DE68910413T2 publication Critical patent/DE68910413T2/de

2009-07-22 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Classifications

- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
- H03K19/09448—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET in combination with bipolar transistors [BIMOS]
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
- H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits

Landscapes

Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
Computer Hardware Design (AREA)
Computing Systems (AREA)
General Engineering & Computer Science (AREA)
Mathematical Physics (AREA)
Power Engineering (AREA)
Logic Circuits (AREA)
Electronic Switches (AREA)
Manipulation Of Pulses (AREA)

DE89113450T 1988-07-22 1989-07-21 Ausgangsschaltung. Expired - Fee Related DE68910413T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP63182943A JPH0626309B2 (ja)	1988-07-22	1988-07-22	出力回路

Publications (2)

Publication Number	Publication Date
DE68910413D1 true DE68910413D1 (de)	1993-12-09
DE68910413T2 DE68910413T2 (de)	1994-04-21

Family

ID=16127080

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE89113450T Expired - Fee Related DE68910413T2 (de)	1988-07-22	1989-07-21	Ausgangsschaltung.

Country Status (5)

Country	Link
US (1)	US5113087A (de)
EP (1)	EP0351874B1 (de)
JP (1)	JPH0626309B2 (de)
KR (1)	KR920005356B1 (de)
DE (1)	DE68910413T2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPH0383053A (ja) *	1989-08-28	1991-04-09	Fuji Photo Film Co Ltd	露光機能付き感光材料包装ユニット
US5239324A (en) *	1991-02-04	1993-08-24	Fuji Photo Film Co., Ltd.	Underwater housing and an underwater taking camera
JPH04355439A (ja) *	1991-05-31	1992-12-09	Fuji Photo Film Co Ltd	防水型レンズ付きフイルムユニット
JP2805408B2 (ja) *	1991-06-17	1998-09-30	富士写真フイルム株式会社	フィルム包装方法及び撮影機構付フィルム包装ユニット
JPH0489950U (de) *	1991-10-31	1992-08-05
JP2856371B2 (ja) *	1992-01-09	1999-02-10	富士写真フイルム株式会社	レンズ付きフイルムユニット
JP2592220Y2 (ja) *	1992-04-01	1999-03-17	コニカ株式会社	レンズ付フィルムユニット
JPH05333474A (ja) *	1992-05-27	1993-12-17	Fuji Photo Film Co Ltd	レンズ付きフイルムユニット及びその製造方法
US5399920A (en) *	1993-11-09	1995-03-21	Texas Instruments Incorporated	CMOS driver which uses a higher voltage to compensate for threshold loss of the pull-up NFET
JP3386943B2 (ja) *	1995-10-30	2003-03-17	三菱電機株式会社	半導体装置
US5886563A (en) *	1996-03-25	1999-03-23	Nasila; Mikko J.	Interlocked half-bridge circuit
FR2762727B1 (fr) *	1997-04-24	1999-07-16	Sgs Thomson Microelectronics	Circuit integre avec etage de sortie haute tension
JP3629939B2 (ja)	1998-03-18	2005-03-16	セイコーエプソン株式会社	トランジスタ回路、表示パネル及び電子機器
US6054888A (en) *	1998-10-02	2000-04-25	Advanced Micro Devices, Inc.	Level shifter with protective limit of voltage across terminals of devices within the level shifter
US6081152A (en) *	1998-10-02	2000-06-27	Advanced Micro Devices, Inc.	Output buffer with protective limit of voltage across terminals of devices within the output buffer
US6674305B1 (en) *	2002-07-08	2004-01-06	Semiconductor Components Industries Llc	Method of forming a semiconductor device and structure therefor
CN1965464A (zh) *	2004-06-09	2007-05-16	罗姆股份有限公司	电平移动电路及相关开关稳定器
JP2008258939A (ja) *	2007-04-05	2008-10-23	Matsushita Electric Ind Co Ltd	多チャンネル半導体集積回路

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5690626A (en) *	1979-12-24	1981-07-22	Mitsubishi Electric Corp	Driving circuit with latch function
US4477735A (en) *	1980-12-20	1984-10-16	Itt Industries, Inc.	Fast MOS driver stage for digital signals
JPS583183A (ja) *	1981-06-30	1983-01-08	Fujitsu Ltd	半導体装置の出力回路
EP0075915B1 (de) *	1981-09-30	1987-08-12	Kabushiki Kaisha Toshiba	Logische Schaltung gespeist durch nur eine Spannung
US4634893A (en) *	1983-01-10	1987-01-06	Ncr Corporation	FET driver circuit with mask programmable transition rates
US4504779A (en) *	1983-03-11	1985-03-12	Hewlett-Packard Company	Electrical load drive and control system
FR2552575B1 (fr) *	1983-09-27	1985-11-08	Thomson Csf	Circuit de commande d'un panneau a plasma de type alternatif
JPS6184112A (ja) *	1984-10-02	1986-04-28	Fujitsu Ltd	論理ゲ−ト回路
FR2575013B1 (fr) *	1984-12-14	1987-01-16	Thomson Csf	Porte logique a coincidence, et circuits logiques sequentiels mettant en oeuvre cette porte a coincidence
US4812683A (en) *	1987-05-19	1989-03-14	Gazelle Microcircuits, Inc.	Logic circuit connecting input and output signal leads
US4855624A (en) *	1988-02-02	1989-08-08	National Semiconductor Corporation	Low-power bipolar-CMOS interface circuit

1988
- 1988-07-22 JP JP63182943A patent/JPH0626309B2/ja not_active Expired - Fee Related
1989
- 1989-07-21 EP EP89113450A patent/EP0351874B1/de not_active Expired - Lifetime
- 1989-07-21 DE DE89113450T patent/DE68910413T2/de not_active Expired - Fee Related
- 1989-07-22 KR KR1019890010405A patent/KR920005356B1/ko not_active IP Right Cessation
1991
- 1991-06-26 US US07/723,662 patent/US5113087A/en not_active Expired - Lifetime

Also Published As

Publication number	Publication date
EP0351874A3 (en)	1990-05-30
KR900002558A (ko)	1990-02-28
KR920005356B1 (ko)	1992-07-02
DE68910413T2 (de)	1994-04-21
JPH0232615A (ja)	1990-02-02
JPH0626309B2 (ja)	1994-04-06
EP0351874A2 (de)	1990-01-24
US5113087A (en)	1992-05-12
EP0351874B1 (de)	1993-11-03

Publication	Publication Date	Title
DE68912277D1 (de)	1994-02-24	Ausgangspufferschaltung.
FI890607A (fi)	1989-08-10	Kopplingsanordning.
DE68913405D1 (de)	1994-04-07	Stromquellenschaltung.
DE58906492D1 (de)	1994-02-03	Halbleiterschaltung.
DE3888220D1 (de)	1994-04-14	Datenausgabeschaltung.
DE3783640D1 (de)	1993-03-04	Ausgangstreiberschaltung.
DE69117553D1 (de)	1996-04-11	Ausgangsschaltung
DE68919383D1 (de)	1994-12-22	Verstärkerschaltung.
DE68910413D1 (de)	1993-12-09	Ausgangsschaltung.
DE68921854D1 (de)	1995-04-27	Integrator-Schaltung.
NO901886L (no)	1990-11-05	Vekselretter-utgangskrets.
DE68915351D1 (de)	1994-06-23	Ausgangschaltung.
DE68901985D1 (de)	1992-08-13	Verzoegerungsschaltung.
ATE106630T1 (de)	1994-06-15	Speiseschaltung.
DE58902219D1 (de)	1992-10-15	Mechanisches bauelement.
DE68916093D1 (de)	1994-07-21	Integrierte Schaltung.
DE68911716D1 (de)	1994-02-10	Stromquellenschaltung.
DE68909626D1 (de)	1993-11-11	Dekodierschaltung.
DE68923668D1 (de)	1995-09-07	Ausgabegerät.
FI893541A0 (fi)	1989-07-24	Nytt uttryckningssystem.
DE68919873D1 (de)	1995-01-26	Ausgabeanordnung.
DE68921502D1 (de)	1995-04-13	Verstärkerschaltung.
DE3751591D1 (de)	1995-12-14	Ausgangspufferschaltung.
DE68914583D1 (de)	1994-05-19	Integrierte Schaltung mit Ausgangsschaltung.
DE68924688D1 (de)	1995-12-07	Ausgangsvorrichtung.

Legal Events

Date	Code	Title	Description
1994-12-01	8364	No opposition during term of opposition
1999-09-09	8339	Ceased/non-payment of the annual fee