DE60221319D1 - Verfahren und Apparat für Speicheranordnungen - Google Patents

Verfahren und Apparat für Speicheranordnungen

Info

Publication number: DE60221319D1
Authority: DE; Germany
Prior art keywords: memory arrangements; arrangements; memory
Prior art date: 2001-05-11
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE60221319T

Other languages

English (en)

Other versions

DE60221319T2 (de

Inventor

Robert Rogenmoser

Steve T Nishimoto

Daniel W Dobberpuhl

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Broadcom Corp

Original Assignee

Broadcom Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2001-05-11

Filing date

2002-05-09

Publication date

2007-09-06

2002-05-09 Application filed by Broadcom Corp filed Critical Broadcom Corp

2007-09-06 Publication of DE60221319D1 publication Critical patent/DE60221319D1/de

2008-04-17 Application granted granted Critical

2008-04-17 Publication of DE60221319T2 publication Critical patent/DE60221319T2/de

2022-05-10 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/18—Auxiliary circuits, e.g. for writing into memory
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
- G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
- G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

DE60221319T 2001-05-11 2002-05-09 Verfahren und Apparat für Speicheranordnungen Expired - Lifetime DE60221319T2 (de)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
US854365		2001-05-11
US09/854,365 US6430099B1 (en)	2001-05-11	2001-05-11	Method and apparatus to conditionally precharge a partitioned read-only memory with shared wordlines for low power operation

Publications (2)

Publication Number	Publication Date
DE60221319D1 true DE60221319D1 (de)	2007-09-06
DE60221319T2 DE60221319T2 (de)	2008-04-17

Family

ID=25318495

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE60221319T Expired - Lifetime DE60221319T2 (de)	2001-05-11	2002-05-09	Verfahren und Apparat für Speicheranordnungen

Country Status (3)

Country	Link
US (3)	US6430099B1 (de)
EP (1)	EP1256956B1 (de)
DE (1)	DE60221319T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US6430099B1 (en)	2001-05-11	2002-08-06	Broadcom Corporation	Method and apparatus to conditionally precharge a partitioned read-only memory with shared wordlines for low power operation
US6542423B1 (en) *	2001-09-18	2003-04-01	Fujitsu Limited	Read port design and method for register array
KR100744873B1 (ko) *	2002-08-20	2007-08-01	엘지전자 주식회사	컴퓨터 시스템에서의 펌웨어 기록방법
US6859392B2 (en) *	2002-08-26	2005-02-22	Micron Technology, Inc.	Preconditioning global bitlines
US7050354B2 (en) *	2003-12-16	2006-05-23	Freescale Semiconductor, Inc.	Low-power compiler-programmable memory with fast access timing
US7042779B2 (en) *	2004-01-23	2006-05-09	Agere Systems Inc.	Method and apparatus for reducing leakage current in a read only memory device using pre-charged sub-arrays
US7177212B2 (en) *	2004-01-23	2007-02-13	Agere Systems Inc.	Method and apparatus for reducing leakage current in a read only memory device using shortened precharge phase
TWI295805B (en) *	2005-04-26	2008-04-11	Via Tech Inc	Memory circuit and related method for integrating pre-decode and selective pre-charge
US8917165B2 (en) *	2007-03-08	2014-12-23	The Mitre Corporation	RFID tag detection and re-personalization

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4602354A (en) *	1983-01-10	1986-07-22	Ncr Corporation	X-and-OR memory array
JPH0640439B2 (ja) *	1986-02-17	1994-05-25	日本電気株式会社	半導体記憶装置
GB8906354D0 (en) *	1989-03-20	1989-05-04	Inmos Ltd	Memory accessing
US4969125A (en) *	1989-06-23	1990-11-06	International Business Machines Corporation	Asynchronous segmented precharge architecture
JP2825291B2 (ja) *	1989-11-13	1998-11-18	株式会社東芝	半導体記憶装置
KR100275182B1 (ko) *	1990-12-17	2000-12-15	윌리엄 비. 켐플러	순차 메모리
JP3481263B2 (ja) *	1992-02-19	2003-12-22	株式会社リコー	シリアル記憶装置
US5787489A (en) *	1995-02-21	1998-07-28	Micron Technology, Inc.	Synchronous SRAM having pipelined enable
JP3607407B2 (ja) *	1995-04-26	2005-01-05	株式会社日立製作所	半導体記憶装置
JP3219236B2 (ja) *	1996-02-22	2001-10-15	シャープ株式会社	半導体記憶装置
US5923574A (en)	1996-09-18	1999-07-13	International Business Machines Corporation	Optimized, combined leading zeros counter and shifter
JP3241280B2 (ja) *	1996-11-19	2001-12-25	株式会社東芝	ダイナミック型半導体記憶装置
JP3862333B2 (ja) *	1996-12-10	2006-12-27	株式会社ルネサステクノロジ	半導体記憶装置
JPH10269800A (ja) *	1997-03-27	1998-10-09	Mitsubishi Electric Corp	半導体記憶装置
US5959916A (en)	1998-02-06	1999-09-28	International Business Machines Corporation	Write driver and bit line precharge apparatus and method
US5923594A (en) *	1998-02-17	1999-07-13	Micron Technology, Inc.	Method and apparatus for coupling data from a memory device using a single ended read data path
JPH11260056A (ja) *	1998-03-12	1999-09-24	Matsushita Electric Ind Co Ltd	半導体記憶装置
EP0974976B1 (de)	1998-07-20	2003-12-03	STMicroelectronics S.r.l.	Schaltung und Verfahren zum Lesen eines nichtflüchtigen Speichers
JP3863313B2 (ja)	1999-03-19	2006-12-27	富士通株式会社	半導体記憶装置
US6181641B1 (en)	1999-05-26	2001-01-30	Lockheed Martin Corporation	Memory device having reduced power requirements and associated methods
US6430099B1 (en)	2001-05-11	2002-08-06	Broadcom Corporation	Method and apparatus to conditionally precharge a partitioned read-only memory with shared wordlines for low power operation

2001
- 2001-05-11 US US09/854,365 patent/US6430099B1/en not_active Expired - Lifetime
2002
- 2002-05-09 EP EP02253258A patent/EP1256956B1/de not_active Expired - Lifetime
- 2002-05-09 DE DE60221319T patent/DE60221319T2/de not_active Expired - Lifetime
- 2002-06-17 US US10/173,087 patent/US6538943B2/en not_active Expired - Lifetime
2003
- 2003-01-22 US US10/349,121 patent/US6671216B2/en not_active Expired - Lifetime

Also Published As

Publication number	Publication date
EP1256956A2 (de)	2002-11-13
US6671216B2 (en)	2003-12-30
US6430099B1 (en)	2002-08-06
US6538943B2 (en)	2003-03-25
EP1256956A3 (de)	2004-07-07
EP1256956B1 (de)	2007-07-25
US20020167854A1 (en)	2002-11-14
US20030107933A1 (en)	2003-06-12
DE60221319T2 (de)	2008-04-17

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Legal Events

Date	Code	Title	Description
2008-08-14	8364	No opposition during term of opposition
2010-01-14	8328	Change in the person/name/address of the agent	Representative=s name: BOSCH JEHLE PATENTANWALTSGESELLSCHAFT MBH, 80639 M