[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

DE602005006248D1 - Datenkommunikationsmodul zur bereitstellung von fehlertoleranz und vergrösserter stabilität - Google Patents

Datenkommunikationsmodul zur bereitstellung von fehlertoleranz und vergrösserter stabilität

Info

Publication number
DE602005006248D1
DE602005006248D1 DE602005006248T DE602005006248T DE602005006248D1 DE 602005006248 D1 DE602005006248 D1 DE 602005006248D1 DE 602005006248 T DE602005006248 T DE 602005006248T DE 602005006248 T DE602005006248 T DE 602005006248T DE 602005006248 D1 DE602005006248 D1 DE 602005006248D1
Authority
DE
Germany
Prior art keywords
data bits
module
communication module
data communication
fault tolerance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005006248T
Other languages
English (en)
Other versions
DE602005006248T2 (de
Inventor
Andre K Nieuwland
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE602005006248D1 publication Critical patent/DE602005006248D1/de
Application granted granted Critical
Publication of DE602005006248T2 publication Critical patent/DE602005006248T2/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Detection And Correction Of Errors (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Bus Control (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
  • Communication Control (AREA)
DE602005006248T 2004-03-03 2005-02-23 Datenkommunikationsmodul zur bereitstellung von fehlertoleranz und vergrösserter stabilität Active DE602005006248T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP04100853 2004-03-03
EP04100853 2004-03-03
PCT/IB2005/050657 WO2005088467A1 (en) 2004-03-03 2005-02-23 Data communication module providing fault tolerance and increased stability

Publications (2)

Publication Number Publication Date
DE602005006248D1 true DE602005006248D1 (de) 2008-06-05
DE602005006248T2 DE602005006248T2 (de) 2009-06-25

Family

ID=34928886

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005006248T Active DE602005006248T2 (de) 2004-03-03 2005-02-23 Datenkommunikationsmodul zur bereitstellung von fehlertoleranz und vergrösserter stabilität

Country Status (9)

Country Link
US (1) US7849390B2 (de)
EP (1) EP1725941B1 (de)
JP (1) JP4649472B2 (de)
KR (1) KR20070006764A (de)
CN (1) CN100485646C (de)
AT (1) ATE393431T1 (de)
DE (1) DE602005006248T2 (de)
TW (1) TW200604816A (de)
WO (1) WO2005088467A1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006115819A1 (en) * 2005-04-21 2006-11-02 Iota Technology, Inc. Electronic differential buses utilizing the null state for data transfer
KR100845141B1 (ko) * 2007-01-17 2008-07-10 삼성전자주식회사 싱글 레이트 인터페이스 장치, 듀얼 레이트 인터페이스장치 및 듀얼 레이트 인터페이싱 방법
US7522073B1 (en) * 2007-11-30 2009-04-21 Qimonda North America Corp. Self-adapted bus inversion
WO2009108562A2 (en) 2008-02-25 2009-09-03 Rambus Inc. Code-assisted error-detection technique
TW201015874A (en) * 2008-10-14 2010-04-16 Univ Nat Changhua Education Encoding/decoding method of Berger invert codes, and its encoder and inspector circuit
US9087025B2 (en) 2009-02-05 2015-07-21 Micron Technology, Inc. Data encoding using spare channels in a memory system
JP2011159119A (ja) 2010-02-01 2011-08-18 Fujitsu Ltd 情報処理装置、情報送信方法および情報受信方法
CN101834704B (zh) * 2010-03-09 2013-01-23 西安电子科技大学 高性能抗串扰时空总线编解码方法及其编解码装置
CN101788967B (zh) * 2010-03-09 2012-02-08 西安电子科技大学 抗串扰片上总线编解码方法及其编解码装置
CN101848059B (zh) * 2010-04-09 2013-08-14 西安电子科技大学 抑制总线串扰的自适应时间编解码装置及其编解码方法
DE102010031030B3 (de) 2010-07-07 2011-11-17 Robert Bosch Gmbh Datenschnittstelle mit eigensicherer, integrierter Fehlererkennung
US8405529B2 (en) * 2011-03-11 2013-03-26 Taiwan Semiconductor Manufacturing Company, Ltd. Using bus inversion to reduce simultaneous signal switching
JP5974700B2 (ja) * 2012-07-19 2016-08-23 富士通株式会社 伝送装置及びデータ転送方法
CN103731130B (zh) * 2013-12-27 2017-01-04 华为技术有限公司 通用的容错纠错电路及其应用的译码器和三模冗余电路
KR102357899B1 (ko) * 2014-01-29 2022-02-03 마벨 아시아 피티이 엘티디. 유효 인코딩을 위한 방법 및 장치
US9979416B2 (en) 2014-12-10 2018-05-22 Rambus Inc. Memory controller and method of data bus inversion using an error detection correction code
CN111198838B (zh) * 2019-12-30 2020-10-20 中国人民解放军军事科学院国防科技创新研究院 一种双轨信号异步传输链路系统

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3889072A (en) * 1973-10-19 1975-06-10 Itt Bi-directional amplification apparatus
US4667337A (en) 1985-08-28 1987-05-19 Westinghouse Electric Corp. Integrated circuit having outputs configured for reduced state changes
JPS62140155A (ja) * 1985-12-16 1987-06-23 Nec Corp 装置のデ−タバス自動切替回路
JPH05334206A (ja) * 1992-05-29 1993-12-17 Toshiba Corp インターフェース制御装置
US5287527A (en) * 1992-12-28 1994-02-15 International Business Machines Corporation Logical signal output drivers for integrated circuit interconnection
US5748902A (en) 1996-07-19 1998-05-05 Compaq Computer Corporation Polarity switched data bus for reduced electromagnetic interference
US6046943A (en) * 1998-03-10 2000-04-04 Texas Instuments Incorporated Synchronous semiconductor device output circuit with reduced data switching
US6647245B1 (en) * 1999-05-28 2003-11-11 Glen V Rosenbaum Subsidiary communication authorization (SCA) radio turner
US6671212B2 (en) * 2002-02-08 2003-12-30 Ati Technologies Inc. Method and apparatus for data inversion in memory device

Also Published As

Publication number Publication date
CN100485646C (zh) 2009-05-06
TW200604816A (en) 2006-02-01
JP2007526574A (ja) 2007-09-13
DE602005006248T2 (de) 2009-06-25
EP1725941B1 (de) 2008-04-23
US7849390B2 (en) 2010-12-07
ATE393431T1 (de) 2008-05-15
KR20070006764A (ko) 2007-01-11
US20080288844A1 (en) 2008-11-20
JP4649472B2 (ja) 2011-03-09
CN1926528A (zh) 2007-03-07
EP1725941A1 (de) 2006-11-29
WO2005088467A1 (en) 2005-09-22

Similar Documents

Publication Publication Date Title
DE602005006248D1 (de) Datenkommunikationsmodul zur bereitstellung von fehlertoleranz und vergrösserter stabilität
TW200737793A (en) Hierarchical coding for multicast messages
BRPI0621815B8 (pt) método para reportar informação de escalonamento processada em um equipamento de usuário de um sistema de comunicação sem fio, e,equipamento de usuário em um sistema de comunicação sem fio
WO2004075442A3 (en) Methods and apparatus of enhanced coding in multi-user communications systems
UA100409C2 (en) Encoding and decoding of control information for wireless communication
MY148152A (en) Method and apparatus for enhanced paging
MX2009003190A (es) Aparato, sistema y metodo para compartir contactos de salida a traves de reles multiples.
TW200515277A (en) Advanced processor
NO20073891L (no) Kanalstruktur for radiosambandssystemer
FI2827520T4 (fi) Mukautuvan kuljetusmuodon nousevan siirtotien signalointi data-yhteenkuulumattomia palauteohjaussignaaleja varten
WO2011028517A3 (en) Distributing group size indications to mobile stations
WO2007147136A3 (en) Transmission using partitioned blocks of multicarrier symbols
BR0313783A (pt) Método e equipamento para transmissão de dados segura em um sistema de comunicação móvel
CY1107647T1 (el) Συστημα επικοινωνιας
ATE521489T1 (de) Sicheres aktives aufhängungssystem
TW200642404A (en) Process and system for reception of a multimedia signal, cryptographic entity for this reception process and system, process and black box for the production of the cryptographic entity
GB0623571D0 (en) System for authentication of network usage
DE60319537D1 (de) Verfahren und elektronischer modul für sicheren datenübetragung
MX2009005899A (es) Servidor ptt, sistema de comunicacion ptt, metodo de comunicacion ptt, y programa.
UA85181C2 (ru) Метод и устройство для усовершенствованного кодирования в многопользовательских системах связи (варианты)
CN104467865B (zh) 串行通信协议控制器、字节拆分电路及8b10b编码器
WO2011071649A3 (en) Data line storage and transmission utilizing both error correcting code and synchronization information
SE0403114L (sv) Auktorisering i cellulära kommunikationssystem
WO2008109858A3 (en) Data encoding in a clocked data interface
TWI268424B (en) Signal transmission method between computer system and peripherals adopting PCI express bus characterizing in saving power of transmitting signals

Legal Events

Date Code Title Description
8364 No opposition during term of opposition