DE4230703A1 - Analogue=to=digital converter for converting slowly varying resistance - has microprocessor which evaluates interval between start of charging of capacitor and instant of attainment of preset reference voltage - Google Patents

Abstract

A capacitor (2) is charged via the varying resistance (3) between a starting time set by a processor (1) and a finishing time. The time of attainment of a predetermined amt. of charge is measured, and the difference between this and the starting time is taken as a measure of the resistance (3). The processor (1) receives the leading edge of a signal from a comparator (9) of the voltage at a point on the charging curve and an adjustable reference voltage (10). USE/ADVANTAGE - E.g. for temperature measurement in heating control system. Any desired processor may be used in simple circuit featuring minimal control logic.

Description

The invention relates to an analog-to-digital converter for converting a slowly changing resistance value into digital values with a capacitor which is charged via the variable resistance between a start time t ₁ and a time t '' _E predetermined by a processor, at the time t _mess a predetermined charge is reached and the time difference t _mess - t _{1 forms} a measure of the resistance value R _mess .

Typically, an analog-to-digital converter is considered completely egg decent, self-contained assembly with time and value continuous input variable and digital output value sets. This input variable is usually a voltage, which means then a sufficiently precise voltage standard is also required becomes. For certain applications, however, is the input variable only one resistance value is available that goes beyond that changed its value very slowly. This is particularly true for temperature measurements, for example for further processing as Control variable in heating systems, too. This resistance value must then first be converted into a voltage in order to be Digital converters can be processed. A disadvantage of her  conventional analog-digital converters is also that internal Processes run, such as selecting signal paths, Increment counters, some of them mostly by one anyway switched processor - at least in the event of implementation sufficiently slow input variables - can be adopted.

DE-OS 39 00 782 describes a device for entering data known in a microprocessor. This will be a Resistor value connected in series with a capacitor, where the data size entered into the microprocessor is the length of time which is needed to charge this capacitor until reaches a predetermined value of its charge across the resistor is, the microprocessor this period of time into a digital realizes value. The problem here is the determination of the corresponding time depending on the charge of the condenser tors. Another disadvantage is that the microprocessor for processing processing continuous input variables must be suitable and that the measurement threshold at the input of the microprocessor does not change is cash. As a result, the resistance measuring range is up and down limited.

The invention has for its object an analog-digital order setters to implement a slowly changing within wide limits stating the resistance value in digital values, which is characterized by simple structure and a minimum of control logic, any processor can be used.

According to the invention, the object is achieved in that the processor receives a signal edge at time t _mess via a comparator to which the voltage signals of the charging curve U _mess and a fixedly adjustable reference voltage U _{ref are} fed. In this way, an analog-to-digital converter with a simple circuit design is created, in which the digitization is largely carried out by an existing processor. For this purpose, the processor determines the time difference t _mess -t ₁ and assigns it a digital value.

In order to become independent both of the supply voltage and of the specimen scatter of the capacitor and of temperature influences, it is provided according to an advantageous further development of the invention that the capacitor has a known resistance R _norm between a predetermined start time point t ₀ and one Time t ′ _{E is} charged, the charging curve U _norm cutting the reference voltage U _ref at time t _norm and for the resistance value R _mess :

The value pairs t ₁ , t _meas and t ₀ , t _norm can be determined alternately with the same comparator module. However, it is also possible to repeat only the determination of the pair of values t ₁ , t _mess in constant time intervals adapted to the expected rate of change of the resistance R _mess and to presuppose the pair of values t ₀ , t _norm over a certain period of time as constant.

When using a processor and already determined first values pair t ₁ , t _{mess, the} resistance value, which is free from disturbing parameters, is determined by the processor specifying the starting time point t ₀ at the time t _norm via the comparator, to which the voltage signals of the charging curve U _norm and the reference voltage U _{ref are} supplied, receives a signal edge, forms the resistance value R _mess according to the above formula (1) and assigns it a digital value.

To determine the time differences t _mess -t ₁ and t _norm -t ₀ , a counter is preferably provided which is activated at the start time t ₁ or t ₀ and is reset at the time t _mess or t _norm , the count at t _mess or respectively t _{standard is used} to determine the digital value. The count stands for the time difference, i.e. for the corresponding pair of values.

The slowly changing resistance, the resistance curve of which is to be digitized, can be, for example, a temperature-dependent sensor resistance of the controller of a heating system. Since the control processes of a modern heating system are extremely complex, the controller can hardly do without a microprocessor. The microprocessor provided per se for signal processing can also easily take over the digitization function described above, so that external logic is not required. Since there is only a significant energy requirement, if the implementation actually takes place, the analog-to-digital converter described above can be used without any problems for low supply voltages, for example battery supply. However, since implementation is only possible at discrete times - appropriate for the temperature change rate - a correspondingly low power consumption results. Another advantage is that when using a known resistor R _norm - quasi for calibration - no long-term stable voltage reference is required. As a result, standard components can be used depending on the resolution required.

Advantageous further developments result from the subclaims or are below together with preferred Aus management forms of the invention with reference to the drawing Darge poses.

Show it:

Fig. 1 a first embodiment of an analog-to-digital converter according to the invention,

Fig. 2 waveforms and

Fig. 3 shows a second embodiment of an analog to digital converter according to the invention.

The converter of FIG. 1 essentially consists of hardware and software components of a processor 1, a condenser 2, a resistor R _mess 3 whose value is to be digitized, and to which a known resistance R _norm 4 parallel lies and as the resistance R _norm 4 is connected to the collector side of a transistor 5 and 6 , respectively, the two transistors 5 and 6 being controllable in each case via signal paths 7 and 8 starting from the processor 1 . The capacitor 2 is connected to a comparator 9 on the charging side. The other input of the comparator 9 is a voltage divider 10 for generating reference voltage. An OR gate 11 lies between the signal paths 7 and 8 and the base of a further transistor 12 . In terms of current flow, this transistor 12 connects an operating voltage source 13 to the comparator 9 as well as the voltage divider 10 and the base of a transistor 14 , which in turn is connected on the collector side to the base of a transistor 15 . The current flow of this transistor 15 is the known resistor R _norm 4 with its switching transistor 6 pre-switches. For the return connection to the processor 1 , a signal path 16 starting from the signal output of the comparator 9 is provided.

The function of the circuit according to FIG. 1 is explained in more detail below with the aid of the diagrams in FIG. 2.

The analog-digital conversion process can be divided into four sections:
1. Comparison or calibration measurement (t _norm )
2. Discharge capacitor
_{3.Resistance measurement} (t _mess → R _mess )
4. Discharge capacitor

The comparison or calibration measurement mentioned under 1. is started at time t ₀ / FIG. 2. For this purpose, processor 1 sets excitation signal 17 / FIG. 2 to "low". Via the signal path 8 , the transistor 6 is turned on and charges via the comparator for this Ver reasonably well known or matched opposing R _norm 4, the capacitor 2nd At the same time, the transistor 12 is turned on via a path of the OR gate 11 and supplies the comparator 9 and the reference voltage generator 10 with the operating voltage 13 . The collector signal of this transistor 12 is inverted by means of the transistor 14 and applied to the transistor 15 , so that the latter blocks the comparison or calibration measurement for the entire duration t ₂ -t ₀ / FIG. 2. During this phase, capacitor 2 charges via resistor R _norm 4. The charging curve 18 / FIG. 2 with the voltage profile U _norm is obtained at the capacitor 2 . The comparator 9 compares this voltage curve with the reference voltage U _ref at the voltage divider 10 . At the time t _norm / Fig. 2, at which both voltages match men, the comparator 9 generates a signal edge 20 , which is given to the processor 1 via the signal path 16 . Processor 1 starts a counter at time t ₀ , which is stopped with signal edge 20 / FIG. 2 at time t _norm . The counter reading N ^norm : t _norm -t ₀ will later be used to calculate the resistance value R _mess .

In the second phase, in which the capacitor 2 is discharged, the processor 1 first switches the excitation signal 17 / FIG. 2 to "high" at the time t ' _E. As a result, the transistor 12 blocks and consequently can no longer drive the downstream transistor 14 , so that the transistor 15 connected downstream of this transistor 14 is now switched on. Via this transistor 15 , the capacitor 2 is discharged again with a steeply falling voltage curve 21 . This discharge is necessary in order to have the same initial conditions in the third phase as in the first phase.

The third and fourth phases proceed analogously to the first and second, with the difference that the capacitor 2 is now charged via the signal path 7 , the transistor 5 and the resistance R _mess 3 to be measured. The slope of the resulting charging curve 22 / Fig. 2 - and thus the time t _mess -t ₁ - are proportional to the resistance value R _mess . A counter is also incremented during the third phase. Its content at the end of the third phase is N ^mess : t _mess -t ₁ .

After completion of the fourth phase, processor 1 calculates the value of the resistance to be measured using the following formula:

The processor 1 can easily assign a digital value to this measured value R _mess .

In the second exemplary embodiment of a device according to the invention for analog-digital conversion of slowly changing resistance values shown in FIG. 3, a circuit is shown in which the processor is further utilized, so that still further hardware components of the processor-external components of the A / D Converter can be omitted. This relates to the OR gate, which can be omitted in that the processor 1 already be the right control signals for the transistor 12 , which connects the comparator 9 and the voltage divider 10 for the reference voltage U _{ref in} phases with the operating voltage source 13 , it produces . These control signals are sent from the processor 1 to the base of the transistor 12 via a further signal path 24 . The transistor 14 of FIG. 1 for signal inversion and actuation of the discharge transistor 15 can also be omitted if the transistor 15 is driven in a conductive manner directly by the processor 1 via a signal path 23 in phases 2 and 4, that is to say for capacitor discharge.

The invention is not limited to the above Embodiments. Rather, a number of variants are possible bar, which is different from the Make use of invention. In particular, the Erfin is limited not on the implementation with discrete logical assembly pen, but can also be advantageous with integrated scarf implement components.

Claims (6)

1. Analog-digital converter for converting a slowly variable resistance value into digital values, with a capacitor that is charged via the variable resistance between a start time t ₁ specified by a processor and a time t '' _E , whereby Time t _mess a predetermined charge is reached and the time difference t _mess -t _{1 forms} a measure of the resistance value R _mess , characterized in that the processor ( 1 ) at time t _mess via a comparator ( 9 ) to which the voltage signals a charging edge receives the charging curve U _mess (22) and a fixedly adjustable reference voltage U _ref (19). 2. Analog-digital converter according to claim 1, characterized in that the processor ( 1 ) determines the time difference t _mess -t ₁ and assigns it a digital value. 3. Analog-digital converter according to claim 1, characterized in that the capacitor ( 2 ) is charged via a known resistor R _norm (4) between egg nem predetermined start time t ₀ and a time t ' _E , the charging curve U _norm (18) intersects the reference voltage U _ref (19) at time t _{norm and} the resistance value R _mess applies to: 4. Analog-digital converter according to claims 1 and 3, characterized in that the processor ( 1 ) specifies the starting time t ₀ , at the time t _norm via the comparator ( 9 ), which the voltage signals of the charging curve U _norm (18th ) and the reference voltage U _ref (4) are supplied, receives a signal edge ( 20 ), forms the resistance value R _mess according to (1) and assigns it a digital value. 5. analog-to-digital converter according to one of vorange Henden claims, characterized in that a counter is provided that t the time of starting ₁ and t ₀ is activated and the time _measurement t, or t is reset _norm, where at the count at t _measured or t _{norm is used} to determine the digital value. 6. Analog-digital converter according to one of the preceding claims, characterized in that the slowly changing resistor ( 3 ) is a temperature-dependent sensor resistance of a controller egg ner heating system.