DE3902958A1 - Process for the interleaved recording of data for a plurality of data channels - Google Patents

Abstract

In a process for the interleaved recording of data for a plurality of data channels on a magnetic tape, the alternating azimuth tracks are subdivided in each case into a front + azimuth half-track, a front - azimuth half-track, a rear - azimuth half-track and a rear + azimuth half-track. Half tracks - in neighbouring azimuth tracks - which differ both in the "front/rear" attribute and in the "+/-" attribute are referred to as maximum-spaced half-tracks. The recording of the data values takes place in such a sequence that in each case two successive data values from the same input channel occur in furthest-apart half-tracks. This process allows full data interleaving to be accomplished simply for any number of channels.

Description

The invention relates to a method for nested Record data from multiple data channels on one Magnetic tape. It also becomes a device for executing of such a method.

Since the data is recorded for the purpose, this To be able to play back later are recording devices able not just a recording process but also exercise a reproduction process that is different from that of the recording process caused nesting and coding undo. Because of this imperative connection in the following not of recording and / or playback, but only of records related to procedures and Devices spoken.

The recording of data, in particular PCM-encoded data, magnetic carriers are well known in the art. Associated procedures can be found e.g. B. in digital audio tape devices and similar widespread use. A PCM audio recorder generally records PCM data on screwed tracks a volume. If the tape is slightly damaged or there is a small dust particle on the belt, there is a signal failure or a burst error. The The spatial extent of the source of the error is usually narrow limited.

To mitigate the effects of the aforementioned errors, a method is known (JP 61-2 36 074 A1) in which data nested in a left channel (L channel) and a right one Channel (R channel) can be recorded. Odd numbers Data strings and even-numbered data strings from each associated  L and R channels are alternately in different Azimuth traces recorded.

For the playback of audio data is the recording of Sufficient data for two channels. Magnetic tape recorders are also used to record data for one Computer used, especially for backup copies. It should then data is recorded for more than two channels. The same applies to various measuring and analysis systems. For all of these applications, it is particularly important that data be maintained even if there is little damage or there is dust on a belt.

For the aforementioned purposes of PCM recording for several Channels are different, technically sophisticated PCM recorders known, however, very expensive so they are not for are suitable for general use.

The invention has for its object a method for Record data for multiple data channels to indicate that allows you to nest data with little effort, that despite tape damage or dust on a tape can be reliably recorded and retrieved.

The invention is given by the features of the claim. It is characterized in that the usual, at Oblique recording of alternating two azimuth tracks, hereinafter referred to as + azimuth trail and -azimuth trail are initially recorded in four half tracks be, namely a front + azimuth half track, a front -Azimuth half-track, a rear -Azimuth half-track and a rear + Azimuth half track. Those are the most distant Half tracks, which are both in the property "front / behind "as well as in the property" +/- "  Input data values are stored temporarily and in such Ordered that two consecutive Data values from the same input channel in the most distant Half tracks are lying. Repeat for three or four channels accordingly the channel-related recording pattern every two tracks, while it is for five or six channels every three Tracks repeated, etc. Consecutive data from one certain channels are always consecutive in the most distant half-tracks.

This method can be done with a memory, a few Switching means, an address counter and an address encoder To run.

The invention is illustrated below by means of figures Embodiments explained in more detail. It demonstrate

Figure 1 is a block diagram of a multi-channel PCM recorder.

Fig. 2 is a diagram for explaining the arrangement of azimuth tracks on a magnetic tape using helical scanning;

Fig. 3 is a block diagram of a circuit for Vorverschachtelung and Nachentschachtelung;

FIGS. 4A-4E are diagrams for explaining time-correlated signals in the circuit of FIG. 3; and

Fig. 5-10 diagrams for explaining data formats as they are used for different numbers of channels, namely for three, four, five, six, seven and eight channels.

Fig. 1 shows the preferred embodiment of a multi-channel PCM recorder, as it is applicable to a method that will be explained in more detail below. The recorder is used to record and play back data. Analog input signals are received which are converted into digital signals which are stored. Accordingly, the stored digital signals are converted back into analog output signals during playback. The recorder has several input connections 4 a , 4 b , 4 c , 4 d . . . to which analog signal sources are connected. The analog signal sources connected to the connections mentioned in the order mentioned are referred to below as A , B , C and D channels. The input connections are connected to an A / D converter 6 via a multiplexer 5 which passes the signals from the channels individually. The digital signal output by the A / D converter 6 is sent to a pre-interleaving circuit 15 , which is part of an additional interleaving circuit 17 . A preferred example of an embodiment of the additional interleaving circuit 17 is explained below with reference to FIG. 3. The output of the Vorverschachtelungsschaltung 15 is passed through a two-channel interleaving circuit 7 to the recording head 7 a, such as it is present at a head assembly. 8 The PCM data obtained from the analog input data is recorded on a magnetic tape 9 by this head.

The data recorded on the tape 9 are read by a playback head 10 a within the magnetic head arrangement 8 and passed via a two-channel deinterleaving circuit 10 to a post-deinterleaving circuit 16 , which is part of the additional interleaving circuit 17 . The output signal from the post-deinterleaving circuit is via a D / A converter and a multiplexer 13 to output connections 14 a , 14 b , 14 c , 14 d . . . given.

As shown in Fig. 2, data on the tape 9 is stored in successive oblique azimuth tracks 2 and 3 . The azimuth gap patterns for the two tracks are different. For further description, the azimuth traces 2 are referred to as + azimuth traces and the azimuth traces 3 as -azimuth traces. + Azimuth tracks and -Azimuth tracks follow each other alternately.

Depending on the position of various switches in it, the additional interleaving circuit 17 shown as a block diagram in FIG. 3 has either the function of a pre-interleaving circuit 15 or the function of a post-interleaving circuit 16 . The A / D converter 6 obtains 16-bit digital signals which are obtained from the analog input signal. The multichannel intermediate interleaving circuit 17 has a multiplexer 20 with two input connections 20 a and 20 b , of which the connection 20 a is connected to the A / D converter 6 . The other input is connected to the deinterleaving circuit 10 . The output terminal of the multiplexer 20 is connected to a delay circuit 22 and a RAM 21 , in which data is buffered. A further multiplexer 24 is connected to the delay circuit 22 with its input terminal 24 a . The further multiplexer 24 has two output connections 24 b and 24 c , of which the first is connected to the interleaving circuit 17 and the second to the D / A converter 12 .

The multi-channel Zusatzverschachtelungsschaltung 17 also receives at a clock signal terminal 25 b a clock signal from a clock signal generator (not shown). In the exemplary embodiment, a clock frequency of 96 kHz is used. The sampling clock signal b is given directly to an address switch 29 and to a 1/2 frequency divider 25 . The frequency-divided scanning signal reaches a hexadecimal counter 26 , which acts as an address counter. Its output signal reaches the address switch 29 and an address encoder 27 , the output of which is also connected to the address switch 29 . The address encoder 29 receives via a terminal 27 b a channel switching signal a from a (not shown) channel switch driver circuit.

The RAM 21 serves to ensure that a sampling clock is written into it from the input data of the front half of the period and it outputs this data in the rear half of the said period to the delay circuit 22nd The write address A for the RAM 21 is output from the address counter 26 depending on the channel switching signal a , as shown in Fig. 4A. The read address E for the RAM 21 is generated by the address encoder 27 . The two mentioned addresses A and E are alternately given to the RAM 21 via the address switch 29 . The address switch 29 is controlled directly by the scanning pulse b . The address switch 29 switches to the write address A during the front half of the sampling clock b and to the coded read address E in the rear half. As shown in FIG. 4B, the sampling clock b has a low level (0) in the front half period T 1 and a high level (1) in the rear half period T 2. The address switch 29, accordingly, connects the input terminal 29 a c to the output terminal 29, while the sampling clock b has low level, while b to the input terminal 29 to the output port 29 c in the high-level half-period connects so as to pass the encoded read signal e.

The address counter 26 is a hexadecimal counter when the recorder is used to process data for three or four channels. On the other hand, it is a 32 counter if it works in a recorder for up to eight channels of PCM data.

As can be seen from FIG. 3, the multi-channel additional interleaving circuit 17 operates either as a pre-interleaving circuit 15 or as a post-interleaving circuit 16, depending on the position of the multiplexer 20 and the further multiplexer 24 . In Fig. 3, the position for the function as a pre-interleaving circuit 15 is shown, namely with a connection between the connections 20 a and 20 c and between the connections 24 a and 24 b . If the two multiplexers mentioned are switched relative to the position shown in FIG. 3, the circuit operates as a post-deinterleaving circuit 16 .

Data formats as recorded on the magnetic tape for three, four, five, six, seven and eight data channels will now be explained with reference to FIGS. 5-10.

Fig. 5 applies to the recording of PCM data for three channels. The L channel records for a single channel and the R channel for two channels. The channel recorded in the L channel is called the A channel below, and the other two channels are called the B and C channels. Data strings in the A channel are designated Ax (A 0, A 1, A 2, A 3 ... ), While data strings in the other channels are designated as Bx (B 0, B 1, B 2, B 3 ... ) or Cx (C 0, C 1, C 2, C 3 ... ). In order to assign the data to the L or R channel in time, the data of the A channel receive A 0, A 1, A 2, A 3 in FIG. 5. . . the marking L (1, 0), L (1, 1), L (1, 2), L (1, 3). . ., while the data in the B channel B 0, B 1, B 2, B 3. . . the identification R (1, 0), R (1, 1), R (1, 2), R (1, 3). . . and finally the data in the C channel (C 0, C 1, C 2, C 3... the identification R (2, 0), R (2, 1), R (2, 2), R (2 , 3) ... wear.

The recording format for data is nested. In the playback format 23 , data strings for L-channel data and for R-channel data are therefore displayed alternately. Each data string consists of a data word. Two data words are recorded on each azimuth block via a reversal mark Q. In the data format shown, all + azimuth tracks 2 are divided into a front half track 2 a and a rear half track 2 b . Accordingly, all -Azimuthspuren 3 are divided into a front half-track 3 a and a rear half-track 3 b . In the embodiment of FIG. 5 eight data words constitute a data unit. In each data unit there are four consecutive data words from the A channel (e.g. A 0, A 1, A 2 and A 3), two data words from the B channel (e.g. B 0 and B 1) and two Contain data words from the C channel (C 0 and C 1). When the data is recorded and reproduced, the data words in a format have the following sequence:

A 0, B 0, A 1, C 0, A 2, B 1, A 3, C 1.

If the structure is nested, this data is stored in the following order in the azimuth tracks: front + azimuth partial track 2 a , front -azimuth partial track 3 a , rear -azimuth partial track 3 b and rear + azimuth partial track 2 b . Although the L and R channels are interleaved in this structure, there is no interleaving for the data from the B and C channels. With this arrangement of data words and arrangement in partial tracks, the data words from the B channel are concentrated in the front azimuth half tracks 3 a and the data words from the C channel in the rear + azimuth half tracks 2 b .

A nested storage of the data from the B and C channels is achieved if the data words B 1 and C 1 are interchanged in the exemplary embodiment according to FIG. 5. The sequence shown in FIG. 5 is then obtained:

A 0, B 0, A 1 C 0, A 2, C 1, A 3, B 1.

Now the data words for the B channel are alternately in a front azimuth half track and a rear azimuth half track, while the same applies in reverse order to the data from the C channel.

How this sequence can be achieved in practice will now be explained with reference to FIGS. 3 and 4. To record PCM data, the multi-channel intermediate interleaving circuit 17 is switched so that it acts as a pre-interleaving circuit 15 . As shown in FIGS. 4A and 4B seen, the channel switching signal a is provided with a frequency is available, the corresponding b the frequency of the sampling clock.

In the front half period T 1 (b = 0) of the sampling clock b , the input data from the A / D converter 6 are written into the RAM 21 at addresses as determined by the write address A. In the rear half period T 2 (b = 1), on the other hand, the RAM address is determined by the coded read address E in order to supply data from the RAM 21 to the delay circuit 22 . In order to communicate with the RAM 21 , the A / D converter 26 has a buffer which ensures a high output resistance when the sampling clock b assumes a high level.

The read addresses E generated by the address encoder are those listed in Table I below.

Table I also lists the write address A , which corresponds to the current counter value from the address counter 26 . As long as the write address A in its front area A 1 is between 0 and 7, the write address E is in the front area. If, on the other hand, the write address A 2 is in the rear area 8-15, the read address E is in the front area. This allows complete nesting not only of the L and R channels as such, but also of the B and C channels, as shown in FIG. 5.

Table I

Because of the nested arrangement, data is also then not completely destroyed if a tape is damaged or Dust sits on the tape. Data will go accordingly not lost if the read or write head from the L or R channel is damaged. Part of the data can always be obtained and with this data the entire Data to be restored.

The exchange of data from the B and C channels can not only take place, as explained above and shown in FIG. 5B with a solid double arrow, but it can also take place, as shown in FIG. 5B with a dashed double arrow.

Fig. 6 illustrates an embodiment for recording PCM data for four channels. The L and R channels are each divided into two channels, namely an A and a B channel or a C and a D channel. Eight data words are combined again in one data unit. In the example shown, the data sequence in the first unit is the following: A 0, A 1, B 0, B 1, C 0, C 1, D 0 and D 1. The data words are placed in the RAM in the order given above among those Addresses written, which are determined by the write address signal A. The data are read out in the changed order as shown in FIG. 6. The sequence is changed using the coded read address E.

When controlling the address sequence for the RAM according to the address table, data words A 0 and C 1 in the front + azimuth half-track 2 a , data words B 0 and D 1 in the front -azimuth track 3 a , data words D 0 and D 1 in the rear + azimuth half-track 2 b and data words C 0 and A 1 recorded in the rear azimuth half-track 3 b . This in turn results in a complete interleaving of the data from all channels.

Even if data from even more channels are processed, complete interleaving can take place in that two successive data values, data words in the exemplary embodiment, are stored in the most distant half-tracks from the same input channel. Examples of processing data for five, six, seven and eight channels are shown in Figs. 7, 8, 9 and 10, respectively. In these examples, each data unit is made up of 16 data words. As with the previous examples, rear RAM addresses (here 16-31) are accessed for reading when writing to front RAM addresses (here 0-15), while front addresses are accessed for reading when reading rear addresses is written.

The arrangement of data words when recording and playing back for five, six and eight channels is shown in Table II.

Table II

As shown in Fig. 9, for PCM recording for seven channels, the L channel is divided into 4 channels (A, C, E and G) and the R channel is divided into three channels (B, D, F) . In this case, a data unit consists of 48 data words.

Claims (1)

Method for interleaved recording of data for several data channels on a magnetic tape which records data in alternating + azimuth and azimuth tracks, characterized in that

• - The recording takes place in divided azimuth tracks, namely a front + azimuth half-track, a front -azimuth half-track, a rear -azimuth half-track and a rear + azimuth half-track, with those half-tracks in neighboring azimuth tracks, which are both in the property "front / rear" as well distinguish in the property "+/-", which are the largest spaced half-tracks, and
• - The data values are buffered and output in such an order that two successive data values from the same channel are recorded in the most distant half-tracks.