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DE3851507D1 - Flusssteuerungssystem für Bus. - Google Patents

Flusssteuerungssystem für Bus.

Info

Publication number
DE3851507D1
DE3851507D1 DE3851507T DE3851507T DE3851507D1 DE 3851507 D1 DE3851507 D1 DE 3851507D1 DE 3851507 T DE3851507 T DE 3851507T DE 3851507 T DE3851507 T DE 3851507T DE 3851507 D1 DE3851507 D1 DE 3851507D1
Authority
DE
Germany
Prior art keywords
bus
control system
flow control
flow
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3851507T
Other languages
English (en)
Other versions
DE3851507T2 (de
Inventor
William Elder Hammer
Walter Henry Schwane
Frederick Joseph Ziecina
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3851507D1 publication Critical patent/DE3851507D1/de
Publication of DE3851507T2 publication Critical patent/DE3851507T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)
  • Small-Scale Networks (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
DE3851507T 1987-11-18 1988-09-27 Flusssteuerungssystem für Bus. Expired - Fee Related DE3851507T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12229287A 1987-11-18 1987-11-18

Publications (2)

Publication Number Publication Date
DE3851507D1 true DE3851507D1 (de) 1994-10-20
DE3851507T2 DE3851507T2 (de) 1995-03-30

Family

ID=22401836

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3851507T Expired - Fee Related DE3851507T2 (de) 1987-11-18 1988-09-27 Flusssteuerungssystem für Bus.

Country Status (9)

Country Link
EP (1) EP0317468B1 (de)
JP (1) JPH0786867B2 (de)
KR (1) KR920004771B1 (de)
CN (1) CN1014189B (de)
DE (1) DE3851507T2 (de)
ES (1) ES2059555T3 (de)
GB (1) GB8814633D0 (de)
HK (1) HK15195A (de)
SG (1) SG9495G (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2272312A (en) * 1992-11-10 1994-05-11 Ibm Collaborative working in a network.
US6182176B1 (en) * 1994-02-24 2001-01-30 Hewlett-Packard Company Queue-based predictive flow control mechanism
US5594651A (en) 1995-02-14 1997-01-14 St. Ville; James A. Method and apparatus for manufacturing objects having optimized response characteristics
US7111125B2 (en) * 2002-04-02 2006-09-19 Ip-First, Llc Apparatus and method for renaming a data block within a cache
US7690003B2 (en) * 2003-08-29 2010-03-30 Fuller Jeffrey C System and method for increasing data throughput using thread scheduling
US8156472B2 (en) * 2004-02-12 2012-04-10 Microsoft Corporation Process language for microprocessors with finite resources
WO2005088463A1 (en) * 2004-03-18 2005-09-22 Intel Corporation Method and apparatus to support booting despite deficient resources
US8868891B2 (en) 2004-03-18 2014-10-21 Intel Corporation Method and apparatus to support booting despite deficient resources
DE102012219180A1 (de) * 2012-10-22 2014-05-08 Robert Bosch Gmbh Recheneinheit für ein Steuergerät und Betriebsverfahren hierfür
KR102118916B1 (ko) * 2012-12-14 2020-06-05 한국전자통신연구원 클러스터 기반의 적응적인 결합 전송 방법
US9323543B2 (en) * 2013-01-04 2016-04-26 Microsoft Technology Licensing, Llc Capability based device driver framework
CN111275952B (zh) * 2019-02-01 2021-05-18 奥克斯空调股份有限公司 一种无线通信系统及使用该系统的空调直流电机供电系统

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4601586A (en) * 1984-02-10 1986-07-22 Prime Computer, Inc. Solicited message packet transfer system
US4649473A (en) * 1985-06-17 1987-03-10 International Business Machines Corporation Flexible data transmission for message based protocols

Also Published As

Publication number Publication date
EP0317468B1 (de) 1994-09-14
CN1014189B (zh) 1991-10-02
CN1035373A (zh) 1989-09-06
KR890008703A (ko) 1989-07-12
KR920004771B1 (ko) 1992-06-15
GB8814633D0 (en) 1988-07-27
EP0317468A3 (de) 1991-01-30
SG9495G (en) 1995-06-16
HK15195A (en) 1995-02-10
DE3851507T2 (de) 1995-03-30
JPH0786867B2 (ja) 1995-09-20
EP0317468A2 (de) 1989-05-24
JPH01137356A (ja) 1989-05-30
ES2059555T3 (es) 1994-11-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee