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DE3752277D1 - Verfahren zur Herstellung einer schmelzfesten Metallschicht - Google Patents

Verfahren zur Herstellung einer schmelzfesten Metallschicht

Info

Publication number
DE3752277D1
DE3752277D1 DE3752277T DE3752277T DE3752277D1 DE 3752277 D1 DE3752277 D1 DE 3752277D1 DE 3752277 T DE3752277 T DE 3752277T DE 3752277 T DE3752277 T DE 3752277T DE 3752277 D1 DE3752277 D1 DE 3752277D1
Authority
DE
Germany
Prior art keywords
melt
producing
metal layer
resistant metal
resistant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3752277T
Other languages
English (en)
Other versions
DE3752277T2 (de
Inventor
Hitoshi Itoh
Takahiko Moriya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3752277D1 publication Critical patent/DE3752277D1/de
Publication of DE3752277T2 publication Critical patent/DE3752277T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H01L21/28562Selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)
DE3752277T 1987-07-10 1987-12-03 Verfahren zur Herstellung einer schmelzfesten Metallschicht Expired - Lifetime DE3752277T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62171218A JP2592844B2 (ja) 1987-07-10 1987-07-10 高融点金属膜の形成方法

Publications (2)

Publication Number Publication Date
DE3752277D1 true DE3752277D1 (de) 1999-07-08
DE3752277T2 DE3752277T2 (de) 1999-11-04

Family

ID=15919230

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3752277T Expired - Lifetime DE3752277T2 (de) 1987-07-10 1987-12-03 Verfahren zur Herstellung einer schmelzfesten Metallschicht

Country Status (4)

Country Link
EP (1) EP0298155B1 (de)
JP (1) JP2592844B2 (de)
KR (1) KR910006971B1 (de)
DE (1) DE3752277T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0656841B2 (ja) * 1987-10-15 1994-07-27 日電アネルバ株式会社 タングステンの選択成長方法
JPH0623435B2 (ja) * 1987-12-01 1994-03-30 日電アネルバ株式会社 タングステン膜の減圧気相成長方法
ES2015776A6 (es) * 1988-10-07 1990-09-01 American Telephone & Telegraph Metodo de fabricacion de dispositivos semiconductores.
US5084417A (en) * 1989-01-06 1992-01-28 International Business Machines Corporation Method for selective deposition of refractory metals on silicon substrates and device formed thereby
JP2803676B2 (ja) * 1989-07-04 1998-09-24 富士通株式会社 半導体装置の製造方法
DE69033760T2 (de) * 1990-01-08 2001-10-25 Lsi Logic Corp Struktur zum Filtern von Prozessgasen zum Einsatz in einer Kammer für chemische Dampfabscheidung
DE4034868C2 (de) * 1990-11-02 1995-02-16 Itt Ind Gmbh Deutsche Verfahren zur selektiven Metallabscheidung bei der Herstellung von Halbleiterbauelementen
JP4877687B2 (ja) * 2000-07-28 2012-02-15 東京エレクトロン株式会社 成膜方法
JP3696587B2 (ja) 2002-10-11 2005-09-21 沖電気工業株式会社 半導体素子の製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5776833A (en) * 1980-09-04 1982-05-14 Applied Materials Inc Heat resistant metal depositing method and product thereof
JPS5851510A (ja) * 1981-09-22 1983-03-26 Fujitsu Ltd 高融点金属の珪化物よりなる層の形成方法
DE3211752C2 (de) * 1982-03-30 1985-09-26 Siemens AG, 1000 Berlin und 8000 München Verfahren zum selektiven Abscheiden von aus Siliziden hochschmelzender Metalle bestehenden Schichtstrukturen auf im wesentlichen aus Silizium bestehenden Substraten und deren Verwendung
DE3331759A1 (de) * 1983-09-02 1985-03-21 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung mit einer aus aluminium oder aus einer aluminium-legierung bestehenden mehrlagenverdrahtung und verfahren zu ihrer herstellung.
JPS60115245A (ja) * 1983-11-28 1985-06-21 Toshiba Corp 半導体装置の製造方法
JPS60145376A (ja) * 1983-12-30 1985-07-31 Fujitsu Ltd タングステンシリサイド膜の成長方法
DE3413064A1 (de) * 1984-04-06 1985-10-31 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von metallsilizidschichten durch abscheidung aus der gasphase bei vermindertem druck und deren verwendung
JPS61250172A (ja) * 1985-04-25 1986-11-07 Fujitsu Ltd タングステンシリサイド膜の成長方法

Also Published As

Publication number Publication date
KR890003014A (ko) 1989-04-12
EP0298155A3 (de) 1990-08-01
EP0298155A2 (de) 1989-01-11
KR910006971B1 (ko) 1991-09-14
EP0298155B1 (de) 1999-06-02
DE3752277T2 (de) 1999-11-04
JPS6417866A (en) 1989-01-20
JP2592844B2 (ja) 1997-03-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition