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DE3584585D1 - Mehrfunktionsschaltung in verschwommene logik. - Google Patents

Mehrfunktionsschaltung in verschwommene logik.

Info

Publication number
DE3584585D1
DE3584585D1 DE8585108375T DE3584585T DE3584585D1 DE 3584585 D1 DE3584585 D1 DE 3584585D1 DE 8585108375 T DE8585108375 T DE 8585108375T DE 3584585 T DE3584585 T DE 3584585T DE 3584585 D1 DE3584585 D1 DE 3584585D1
Authority
DE
Germany
Prior art keywords
fuzzy logic
input
blurled
logic
function switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585108375T
Other languages
English (en)
Inventor
Takeshi Omron Tateisi Yamakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Application granted granted Critical
Publication of DE3584585D1 publication Critical patent/DE3584585D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09441—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N7/00—Computing arrangements based on specific mathematical models
    • G06N7/02—Computing arrangements based on specific mathematical models using fuzzy logic
    • G06N7/04—Physical realisation
    • G06N7/043—Analogue or partially analogue implementation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/211—Design considerations for internal polarisation
    • H10D89/213—Design considerations for internal polarisation in field-effect devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Health & Medical Sciences (AREA)
  • Data Mining & Analysis (AREA)
  • Fuzzy Systems (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Automation & Control Theory (AREA)
  • Algebra (AREA)
  • Artificial Intelligence (AREA)
  • Computational Mathematics (AREA)
  • Biomedical Technology (AREA)
  • Evolutionary Computation (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Details Of Television Scanning (AREA)
  • Circuit For Audible Band Transducer (AREA)
  • Noise Elimination (AREA)
DE8585108375T 1984-07-06 1985-07-05 Mehrfunktionsschaltung in verschwommene logik. Expired - Fee Related DE3584585D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59141250A JPS6120428A (ja) 1984-07-06 1984-07-06 多機能フアジイ論理回路

Publications (1)

Publication Number Publication Date
DE3584585D1 true DE3584585D1 (de) 1991-12-12

Family

ID=15287565

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585108375T Expired - Fee Related DE3584585D1 (de) 1984-07-06 1985-07-05 Mehrfunktionsschaltung in verschwommene logik.

Country Status (4)

Country Link
EP (1) EP0168004B1 (de)
JP (1) JPS6120428A (de)
AT (1) ATE69337T1 (de)
DE (1) DE3584585D1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0786893B2 (ja) * 1986-11-13 1995-09-20 オムロン株式会社 ファジィ情報処理装置
US5343553A (en) * 1988-11-04 1994-08-30 Olympus Optical Co., Ltd. Digital fuzzy inference system using logic circuits
DE69025092T2 (de) * 1989-05-17 1996-09-19 Pioneer Electronic Corp Vorrichtung zum Steuern der akustischen Übertragungsdaten

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60199230A (ja) * 1984-03-23 1985-10-08 Omron Tateisi Electronics Co フアジイ論理集積回路

Also Published As

Publication number Publication date
EP0168004A3 (en) 1988-11-30
JPS6120428A (ja) 1986-01-29
EP0168004B1 (de) 1991-11-06
EP0168004A2 (de) 1986-01-15
ATE69337T1 (de) 1991-11-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee