DE2637019C3 - On switching device - Google Patents

Description

The invention relates to a connection device for establishing a connection between a transmission and / or receiving unit and a line for transmitting data, with signal generating devices, on the line an electrical signal with a dependent on the usage state of the line Generate parameters.

There are numerous data processing systems in which several terminals or sub-connections are used a common central unit for data storage and processing are connected. In such Systems, it is desirable that the individual sub-connections and the central unit as economical as possible Way can be connected to each other. The worst possible solution to this problem is arguably therein, between each individual sub-connection and the central unit, a special cable or data line to be provided. Namely, if the sub-connections are at a considerable distance from the central unit are arranged, then the costs for separate data lines alone can be a decisive factor Represent factor. In addition, the cost and labor for installation are also more numerous Data lines quite considerably, especially if the sub-connections and / or the central unit are retrofitted be installed in an existing building or the like. With systems, with where the central unit only ever has to be in connection with one sub-connection, it is extreme advantageous if each of the sub-connections are connected to a single common data line can. Such a system has been proposed before.

However, if several sub-connectors need to be connected to the same line, then it is required to ensure that only one sub-connection is on the line at any one time is switched on and is in connection with the central unit is only switched to the line if it receives a specific from the central unit Receives dial signal, this requirement is relatively easy to meet. For systems without dialing devices, at which any subscriber can attempt at any time to access the To connect the line, however, the situation becomes much more difficult. In this case you have to Schalteinrichtur.gen be provided, which ensure that when a sub-connection on the line is activated, no further sub-connection can intrude on the line. In addition, switching devices must be provided, which ensure that when two or more sub-connections in the essentially try to connect to the line at the same time, only one of them actually to the Line is switched on.

Problems of the type set out above have already been addressed in the field of telex typing deals. If a number of teleprinters are connected in parallel to one another on a single data line, it is of course desirable that only one teleprinter can operate at a time. At one far The most common system is therefore a holding relay at each connection between the wires of the data line switched, which must be closed so that the teleprinter can work, with a potential source in series with a push button and the relay winding. Lies between the wires of the data line also a power source. The circuit arrangement is designed so that if no teleprinter with the line is connected and the switch on a teleprinter is closed, the relay this Pen is closed and kept in the closed state in order to connect with the Establish line. The closed state of the relay of a teleprinter now has the consequence that the potential on the data line drops below the value for the hold circuit of the relays of the other Teleprinters would be required if their switches were closed. So if a teleprinter is switched to the data line, it is prevented that any other remote writing device on the data line can be switched on. If a subscriber tries to access the teletype device To activate the line and this is already busy, then he must press the button or the switch on his Operate the teletypewriter again and again until the line is interrupted perhaps once free is.

In other previously known systems, only the data on the data line is monitored. That The presence of invalid data is interpreted as an indication that more than one sub-connection is on the Line is connected, whereupon all sub-connections are disconnected from the line. the Both attempts to solve the problem described above have disadvantages, which without further can be seen. The disadvantage of the system considered in the first place is that the A sub-unit is not automatically connected when the line becomes free. In addition, there is in the known system, the risk that it is not fully used, especially when the to messages to be transmitted are relatively short. The ultimate disadvantage of the second consideration ten system consists in the fact that initially several sub-connections can intrude on the line and that then the connection to all Unteranschlüssin is interrupted, which leads to the interruption of a existing connection leads.

ίο Based on the status described above The invention is based on the problem of technology, a connection device for a system with several To propose sub-units or connections in which the fact that a sub-unit is connected to the Line is connected, prevents a further sub-unit can be connected to the line and which also automatically switches on when an existing connection is terminated a previously prepared subunit takes place on the line. In addition, according to the invention can be achieved that when two subunits try essentially simultaneously to access the To connect the line, an interruption of both connection processes is automatically brought about.

This object is achieved by a switching device of the type described at the outset, which according to FIG of the invention is characterized in that connecting devices for connecting the switching device are provided with the line that first on

M the parameter responsive detector devices are provided, which at an output a first generate electrical signal if the value of the parameter differs from that given for the free line The nominal value of the parameter differs by a first predetermined amount that the second on the parameter responsive detector devices are provided which are connected to the comparison devices and generate a second electrical signal at an output when the value of the parameter reaches the Connection devices from the nominal value of the parameter specified for the free line by one second predetermined amount differs, which is greater than the first predetermined amount that first Schaltmittei are provided to repeatedly generate a third electrical signal at an output, the second Switching means are provided to generate a fourth electrical signal at an output when a Connection to the line is desirable that third switching means are provided to the connection devices effective impedance, in particular the impedance of the connection devices as a function of to change from a fifth electrical signal at an input that fourth switching means is provided are connected to the output of the first detector device, to the output of the first switching means, with the output of the second switching means and to the input of the third switching means are connected to the fifth electrical signal when the first, third and fourth electrical signals occur simultaneously

bo to apply the input of the third switching means, if the second electrical signal is not present at the same time.

It is an advantage of the connection device according to the invention that the connection of a prepared

ni subunit on the line autoina i <-ch takes place as soon as the line becomes free. It is a further advantage of the switching device according to the invention that the Connection of all other sub-units to the

Line is automatically prevented if a sub-unit is connected to the line.

It is also an advantage of the intrusion device according to the invention that interruption devices can be provided which, when attempting several subunits at the same time, relate to the Connect the line, interrupt the connection process and postpone the connection attempts ensure that one of the waiting sub-units is automatically connected to the line will. This also has the advantage that for all waiting sub-units essentially the there is an equal chance of being connected to the line first.

A. Another decisive advantage that the invention Switching device brings with it, is that it is possible with their help, a existing system without changes to the sub-units or the central unit with additional connections to expand. In all of this, the switching device according to the invention is simple and economical constructed and very easy to use.

In a preferred embodiment of the invention there is one between the wires of the line Current source, and there is also a resistance between when connecting a subunit to the line the wires of the same laid, whereby the voltage on the line below a first voltage level is lowered. On the other subunits, this reduced tension is now determined, and this are thus prevented from being intruded on the line. Each sub-unit also contains one Oscillator and can only intrude on the line when an output pulse from the Oscillator is present. If now two subunits try to get on the line essentially at the same time switch on, then the voltage across the line is reduced to a second and lower voltage level lowered, whereby both sub-connections are separated from the line again. After that then tried each sub-connection repeats to lock onto the line, with each output pulse of its oscillator, except for one of the Sub-connections are switched on the line so much earlier than the next that the next sub-connection already determines the conditions for a busy line and thus not on this Line can be switched on.

The invention is explained in more detail below with reference to drawings in connection with a monitoring system which has a central unit and comprises several monitored connections or monitoring connections, each one according to the invention Have intrusion device, which is below with a view to the fact that they have intrusion attempts several sub-connections automatically for a balance of interests in terms of optimal use which ensures the capacitance of the system is referred to as a compensation circuit It shows w

F i g. 1 is a schematic block diagram of a monitoring connection a monitoring system according to the invention,

F i g. 2 a schematic block diagram of the central unit of the monitoring system with monitoring <·· connections according to F i g. 1,

F i g. 3 shows an identification element for use in connection with a monitoring connection according to FIG. 1,

F i g. 4 shows a table to explain the function of the monitoring connections and the central unit according to FIG F1 g. 1 and 2,

5 shows a schematic block diagram of a compensation circuit for a monitoring connection according to FIG. 1 and

6 shows a series of pulse diagrams for Explanation of the operation of the compensation circuit according to FIG. 5.

In the individual figures of the drawing, a monitoring system is shown which is particularly is suitable for use in conjunction with multiple photocopiers. The monitoring system for Control of the use of the individual copiers consists of monitoring connections 10, as shown in FIG. 1 shows and a central unit 12, as shown in FIG Each copier to be monitored is assigned a monitoring connection. At a Monitoring system according to the invention, it is also advantageous to have a plurality of monitoring connections assign a common central unit, so that with the help of the central unit a corresponding number of Copy machines can be monitored.

First, the operation of the invention Monitoring system are explained from the perspective of a user. Every authorized user receives an identification element 14 or an identification card, as shown in FIG. 3 is shown. The identification element has several Perforations that can be arranged in a matrix with ten columns and ten rows, the columns and rows of the matrix, such as FIG. 3 shows, marked by rectangles on the identification element. Each in a column punched hole corresponds to a decimal number. The coded numbers on the identification element each individual users contain the information to identify this user and provide security against the production of counterfeit identification elements. In the monitoring system under consideration, there are two Columns of the identification element are provided for the department number of the user, three columns are for the Individual identification of each user in the department is provided, a column is for that Identification of the rank of the user is provided and the remaining four columns are for safety information intended. The security information can, for example, be an identification number of the monitor system for which the Kennelemem may be used. The remaining security numbers can then be calculated check digits. The security numbers can also be a Be a combination of an identification number and check digit. The rank number opens up the possibility of there; To design the monitoring system so that certain copiers connected to the system only exist can be used by certain people.

Each monitoring connection 10 contains a Lesege advises 16 for reading the identification cards or identification elements When a user wants to make copies, his identification element 14 is inserted into the reading device 16 a yellow lamp 18 lights up, which is provided on the control panel of the monitoring connection 10 and thus informs the user that the monitoring port 10 is in operation and that he must wait, bi: a green lamp 20 lights up before attempting to make copies. After that, a Connection line between the monitoring connection 10 and the central unit 12 made and dii Information of the identification element is read out and closed

Central unit. At the same time, a port number is transmitted that corresponds to the relevant Monitoring connection IO is assigned. The central unit 12 records the connection number, the department numbers. the user number, the date and the time :; aut on a punched tape. The Central unit 12 the validity of the information on the identification element and the authorization of the user to use the copier in question. If verification of the information reveals that the Authorized user is connected to the monitoring port transmitted a signal by which the associated copier is released so that the User can now make his copies. This is indicated by the green lamp ^ O lighting up. The η The connection between the monitoring connection 10 and the central unit 12 is now interrupted. If the information on an identification element which is entered into a reader is invalid or if the user does not have the correct rank for using the copier in question, A red lamp 22 lights up on the control panel of the monitoring connection and indicates that the Copier is not released. When the user makes his copies, the monitoring connection made two counts. First, the total number made by the user Copies are detected and a special multiple copy count is also performed like this will be explained below. When the user finishes copying, he closes a momentary one Switch 24 on the control panel, whereupon its identification is ejected from the reader. Of the The user can then pick up their ID and leave. The green lamp 20 goes out, and that The copier is locked. A connection between the monitoring connection 10 is now established again and the central processing unit 12, and the monitoring connection transmits its connection number, the Counting result for the total number of copies and the counting result for multiple copies to the central unit, where these numbers are recorded on the punched tape. After that the connection interrupted again between the central unit 12 and the monitoring connection 10.

The basic mode of operation of the monitoring system is explained in more detail below in connection with the table according to FIG. 4. In the first column of this table the request numbers are given which are transmitted from the central unit to the monitoring connection. In the second column the answer numbers are given which are transmitted from the monitoring connection to the central unit when an identification element is in the reader . The third column shows the response numbers that are transmitted after the identification element has been removed from the reader. If there is an identification element in the reader, the monitoring connection replies with a number 1. If there is no identification element in the reader, it replies with the answer number 2. The central unit then transmits the inquiry numbers 1 to 15 in succession 2, whether or not there is an identifier in the reader, are two numbers that identify the monitoring connection that is in operation. If there is an identification element in the reader, then the answers to the query numbers 3 to 12 are the ten digits on the identification element. Item numbers 13 to 15 do not elicit an answer. Rather, the request number 14 is a signal to the monitoring connection that its associated copier should be released, while the request number! 5 is a signal to the monitoring connection that the connection between the central unit and the monitoring connection is terminated. If the identification element has been removed from the reader, then the answers to query numbers 4 to b correspond to the total number of copies and the answers to query numbers 8 to 10 correspond to the result of counting the multiple copies. Inquiry numbers 3, 7 and 11 to 15 do not elicit a response. Instead, the request number 15 is again a signal to the monitoring connection that the connection between the central unit and the monitoring connection is terminated.

The structure of the monitoring connection 10 will now be explained in more detail below with reference to FIG. 1. It is a two-wire cable 23 is provided, to .η ύ \ monitor terminal 10 to the central unit 12 to connect. The data on line 23 are two-phase four-bit serial signals. The data are fed from line 23 via a compensation circuit 25 to a two-phase coder-decoder 26. The compensation circuit 25 is used to connect the line 23 to the encoder-decoder 26 at suitable times in a manner to be explained in more detail below. It should first be assumed that the line 23 is connected directly to the coder-decoder 26. The coder-decoder 26 is used to convert the two-phase four-bit series data on the line 23 into four-bit parallel data at its output and to convert four-bit parallel data at its input into two - to convert phase four-bit serial data which are put on line 23. The serial transmission of two-phase data is also known as the so-called Manchester coding. This type of coding is described in the publication "Reference Data for Radio Engineers", 5th edition, pages 32 ff, published by International Telephone and Telegraph, New York, USA. An example of a circuit which can be used as a coder-decoder 26 is described in the journal "EDN Magazine" from September 15, 1972. Page 43 in the article "Exclusive OR-Gates simplified modem designs" by AI fke.

The encoder-decoder 26 have four output lines which are connected to the inputs of a converter 28 which converts the signals on its four input lines into signals on sixteen output lines. A 0 output of the converter 28 is at a control input of a memory circuit 30. The outputs of the memory circuit 30 are connected to a four-wire bus 32, which in turn is connected to the input of the encoder-decoder 26 «Is set at its control input, if there is an identification element in the reader 16, it delivers a binary-coded 1 to the bus 3Z Reader 16 has a switch 34, one terminal of which is connected to a positive voltage (+) via a resistor 36 and the other terminal of which is connected to the Q output of a flip-flop 35, which is

Jumps is triggered. The switch 34 is closed when an identifier is entered into the reader 16 and opened when the identifier is removed therefrom. The connection point of the switch 34 to the resistor 36 is denoted by the reference symbol A , while the (T output of the flip-flop 35 is denoted by the reference symbol B. The connection point A is connected to an input of the memory circuit 30 and controls in a suitable manner the output of the corresponding binary-coded number by the memory circuit 30 to the bus 32. The outputs 1 and 2 of the converter 28 are connected to the control inputs of a second and third memory circuit 38 and 40. The outputs of the memory circuits 38 and 40 are connected to connected to the bus 32 and supply it with four-digit binary numbers that correspond to the first and second digits of the connection number if a logical "1" is present at their control inputs.

The outputs 3 to 12 of the converter 28 are connected to the ten inputs of the reader 16. In Fig. 1, outputs 3 to 5 and 8 to 10 are denoted by Cl to C 3 and M 1 to M 3 for reasons that will be explained in more detail below.

The reading device 16 has ten outputs which are connected to the inputs of a second converter 42 that converts the signals on its ten input lines into signals on four output lines. That Reading device 16 is designed in such a way that when a logical "1" is applied to its first input, the first column of the identification element is read, whereupon a logical "1" is sent to that output of the reader 16 appears which corresponds to the line in which the perforation occurs in the first column. The 2nd to 9th columns of the identification element are read in the same way if a logical "1" is sent to one of the inputs 2 to 10 of the reader 16 is applied. The second converter 42 sets the in the form of a decimal number to the Outputs of the reader 16 present information in a binary information at its outputs. the Outputs of the second converter 42 are connected to the bus 32 via a set of gates 44 tied together. The gate circuits 44 each have a control input, so that the output signals of the Converter 42 only get on the bus 32 if a logical one at the control inputs »1« is present. The output 13 of the first converter 28 is not used

The output 14 of the first converter 28 is denoted by the reference symbol ^ and serves as a set (enable) output. This output is connected to the set input of a second flip-flop 46. The connection point A is connected to the reset input of this second flip-flop 46 via an inverter 47. The (^ output of the second flip-flop 46 is connected to a circuit point C. The circuit point C is connected via a resistor 48 to the anode of a green light emitting diode, the cathode of which is connected to earth and which forms the green lamp 20. The circuit point C is furthermore connected to an ω control input of the monitoring terminal 10 associated with the copying machine 50. the copying machine 50 is enabled by a logic "1" at this control input. the output 15 of the first converter 28 is the end with the reference numeral EC as an abbreviation for " -Communication "This input 15 is connected via an inverter 51 to the reset input of a third flip-flop 52, which is triggered by negative edges and whose set input is connected to circuit point A. (The set input of the various flip-flops is each with “S” is designated, while the reset input is designated “R” ) The (^ output of the third flip-flo ps 52 is connected to a circuit point D , which in turn is connected via a resistor 54 to the anode of a yellow light emitting diode, the cathode of which is connected to earth and which forms the yellow lamp 18. Finally, the output 15 or ZTC of the first converter 28 is also connected to the reset input of the first flip-flop 35, the set input of which is connected to the connection point A.

Her connection point Λ is also connected to a first input of a NOR-Galier 56 nut three inputs, whose second input is connected to circuit point C and whose third input is connected to circuit point D and whose output via a resistor 58 to the anode of a red light emitting Light-emitting diode is connected, the cathode of which is connected to earth and which serves as a red lamp 22, each of the outputs of the reader 16 is also connected to an input of an OR gate 62 via a respective switch of a switch arrangement 60. The output of the OR gate 62 is connected to a first input of a NAND gate 64 with two inputs, the second input of which is connected to the 8th output M 1 of the first converter 28. The output of the NAND gate 64 is connected to a circuit point E , which in turn is connected to a first input of an AND gate 66 with two inputs, the second input of which is connected to the circuit point D and the output of which is connected to the control input of the gate circuits 44. The circuit points Sund Ds are connected to the two inputs of an OR gate 68, the output of which is connected to a circuit point F, which in turn is connected to a first control input of the compensation circuit 25. The output 15 or EC of the first converter 28 is connected to a second control input of the compensation circuit 25. As will be explained in more detail below, a logic "1" at the first control input of the compensation circuit 25 results in the establishment of a connection between the monitoring connection 10 and the central unit 12, while a logic "1" at the second control input interrupts this connection.

The circuit according to FIG. 1 serves, as far as it has been described so far, to implement the sequence of steps which was explained above in connection with column 2 of the table according to FIG. Before an identification element is inserted into the reader 16 for the first time, the first flip-flop 35 is in the reset state, and a logic “0” is present at the circuit point B. If an identification element is inserted in the reader 16 and the switch 34 is closed, the third flip-flop 22 is set, and a logic "1" results at circuit point D , whereby the light-emitting diode of the yellow lamp 18 is switched on. If at the switching point. When a "1" appears, there is also a "1" at the first control input of the compensation circuit 24, so that a connection with the central unit is established. If the request numbers 0 to 12 are received one after the other on the line 23, signals in the form of a logical "1" are successively sent to the outputs 0 to 12 of the first converter 28.

generated. The “!” Signals at the outputs 0 to 3 of the first converter 28 cause the memory circuit 30, 38 and 40 to apply their corresponding response numbers to the bus 32. Since if there is a slight "1" at circuit point D, there is also a logic "1" at circuit point F mi ', the bus 32 while the logical "i " signals are sent to the Unisciztrauspaniroi! 3 ois

13 have the consequence that the numbers on the identification element located in the reader appear one after the other the Sammelleitjr.i; 32 are given. If the Request number 14 is received at the output

14 or L · of the first converter generates a logic "i" which sets the second flip-flop 46. If the second flip-flop 46 is set, results at Schaltuiigpunkt Te ^; nc logical><1", and the copier 5u wildly enabled, while the green lamp 20 is switched on at the same time. The user can now make the desired number of copies. The arrival of the request number 15 causes a logical "1" to be generated at the output 15 of the first converter 28, which causes the third flip-flop 52 to be reset and the yellow lamp 18 to be extinguished. In addition, the logic "I" is applied to the second control input of the equalization circuit 25, whereby the connection with the central unit is interrupted. It should be pointed out that the red lamp 22 is not switched on unless the request number 15 is received before a request number 14 has arrived, since only in this case there is a logical "0" at the switching points A, C and D at the same time. J5

The copier 50 has an output at which a logical "1" is generated when each copy is made. This output of the copier 50 is connected to the counting input of a first counter with three counting decades 70, 72 and 74. Said output of the copier 50 is also connected to the inputs of a timer 76 and a second counter 78. The timer 78 is constructed in such a way that its output signal is a logical "0", except when a logical "0" has been applied to its input for a predetermined time. In this case, a logic “1” is generated at the output of the timer 76 at the end of the specified line interval. The second counter is designed so that it can count up to a maximum of 10. When this count is reached, it generates a logical "1" signal at its output and stops counting the pulses fed to its input. The output of the timer 76 is connected to a reset input of the second counter 78, via which this counter can be reset. The output of the second counter 78 is connected to the counting input of a third counter with three counting decades 80, 82 and 84. The outputs of the counting decades 70, 72, 74, 80, 82 and 84 are connected to the bus line via inverter gate circuits 90 , 92, 94, 100, 102 and 104 , respectively. Each of the inverter gate circuits 90, 92, 94, 100, 102 and 104 has a control input. The circuits mentioned are designed so that when a logical "1" is applied to their control input, the counter reading in the assigned counting decade is inverted and sent to the bus 32. Each counting decade 70, 72, 74, 80, 82 and 84 has a reset input via which it can be reset to zero by applying a logical "1". The reset inputs are connected to the shading track D.

The reader has an input which, when activated with a logical "1" ^{, causes the μ 1} , which is located on the reader, to be ejected. This aluminum throw input is connected to a circuit point G , which in turn is connected via a switch 27 to a source of positive potential and via a resistor 112 to ground. Those Ausginge det counting decade 74 which correspond to the binary 1 or the binä ^r s 8, are individually connected to two inputs of an L to) ND-Gauers II4, the output of which is connected to the node G. The outputs 4 to 6 and 8 to 10 of the first converter 28 are connected to the control inputs of the inverter gate circuits 90, 92, 94, i00, iö2 and Ί04.

It can be seen that the counting decades 70, 72 and 74 the total number of during a duty cycle of one Copies made by users on copier 50 are counted. The counting decades 80, 82 and 84 deliver a Counting result that corresponds to the number of multiple copies made from a single original is linked. In detail, the count in the third counter is increased by 1 each time from ten or more copies can be made from a single original. The timer 76 is set so that the second counter 78 is reset after a predetermined time interval, which on the The point in time at which the last copy was made follows. The length of the time interval is considerable longer than the time between copier duty cycles when making multiple copies of a single original, but considerably shorter than the time it takes to change the original in the Copier is required.

When the user of the copier 50 has finished making his copies, he briefly closes the switch 24, whereupon his identification element is ejected. As a result, the switch 34 is opened, the second flip-flop 46 is reset and the green lamp 20 is extinguished. In addition, the first flip-flop 35 is set and a logical "1" is applied to the first control input of the compensation circuit 25 via the OR gate 68, so that a connection to the central processing unit is established. Then, when request numbers 0-2 are received, memory circuits 30, 38 and 34 apply their respective binary-coded numbers to bus 32 , 72, 74, 80, 82 and 84 are applied one after the other to the bus 32 via the associated inverter gate circuits. When the request number 15 is received, the first flip-flop 35 is reset and a "1" pulse is applied to the second control input of the equalization circuit 25, whereby the connection to the central unit is interrupted. When an identification element is then inserted into the reader 16 again, the flip-flop 52 is reset and the logical "1" signal which then occurs at its output causes the counting decades 70, 72, 74, 80, 82 and 84 to be reset Zero. It should be noted that when the count decades are reset in this manner, the inverter gate circuits 90, 92, 94, 100, 102 and 104 apply logic "1" signals to bus 32 through all of their outputs, when an identification element is inserted into the reader 16

will. If the numbers of the identification element are then read out and appear on the bus line 32, the gate strings 44 can still pull the corresponding wires of the bus line 32 to a logical "0". The count of the counting decades 70, 72, 74, 80, 82 and 84 is inverted before it is sent to the bus 32. If the case occurs that an identifier is inserted into the reader 16 before the count from all counting decades 70, 72, '4, 80, 82 and 84 has been transmitted to the central unit, ie before the request number 15 arrives, the first remains Flip-flop 35 in the set state, and the logic "1" at its output prevents the node A from assuming the potential "0", which prevents the third flip-flop 52 from being set and the count in the counting decades from being lost up to the point in time at which all the information has been transmitted to the central unit.

The AND gate 114 prevents the counting decades 70, 72 and 74 from overflowing. Without this AND gate, the first counter would return to the count zero if more than 999 copies were made, and the central processing unit would not be able to record the previously completed copies. However, a logical "1" appears at the output of AND gate 114 when the nine hundredth copy is made, causing the identifier to be ejected from reader 16 . The data collected at the monitoring connection 10 are now transmitted to the central unit, whereupon the user can use his identification element again and make further copies. It will be understood that instead of counting and recording only six decimal digits in the monitoring port 10 of FIG. 1 could easily be expanded to include four more decimal numbers.

The elements 60 to 66 serve to generate the rank information which was mentioned above. The output of NAND gate 64 is normally a logic "1" which sets gates 44 as described above. If, however, the output signal of the OR gate 62 is a logic "1" when the 6th column of the identifier 14 is read by the reader 16 at the same time, then the output of the NAND gate 64 is a logic "0" so that the gate circuits 44 prevent the rank number or the rank bit from being transmitted to the central unit. The switches of the switch arrangement 60 can be set so that a transmission to the central unit takes place only with certain rank numbers. If it is desired that the operation of the copier assigned to the monitoring connection 10 is prevented at any particular rank number, it is only necessary to close that switch of the switch arrangement 60 which connects the corresponding output of the reader 16 to the OR gate 62. As mentioned, the security numbers of the identification member 14 may be of the characteristic element produced check digits by mathematical permutations of the remaining numbers. If this is the case and if the transmission of the rank number is suppressed, then the circuit of the central processing unit in which the permutations are carried out does not receive a corresponding digit, so that the permutation leads to an incorrect result. The central unit reacts to this as if the identification element contained invalid data, so that the copier in question is not released. The monitoring connection 10 can therefore be programmed in such a way that it does not enable the associated copier 50 if the identification element of the user has certain priority numbers. The programming takes place simply by closing the relevant switches of the switch arrangement 60.

F i g. Fig. 2 shows a preferred embodiment of a central unit for a monitoring system according to the invention. The central unit 12 contains a strip punch 140 with associated switching devices. The strip punch 140 has inputs which are connected to a bus line 142 , as well as a control input. If a positive voltage jump is applied to its control input, then the strip punch 140 takes over the information from the bus line 142, encodes this information in a suitable manner for the punching process and then carries out the recording of the information. The strip punch 140 has an output at which a logic "1" is normally present, but at which a logic "0" appears when the strip punch 140 is set by a positive voltage jump at its control input. The output remains at the logical "1" long enough for the information from the bus 142 to be recorded.

The Zentraleini cit 12 also has a two-phase coder-decoder 150 which is connected to the line 23 and which is similar in structure to the coder-decoder 26 in the monitoring connection 10. The coder-decoder 150 serves on the one hand to the two - to convert phase four-bit series data from line 23 into four-bit parallel data and convert the four-bit parallel data at its input into two-phase four-bit series data on line 23 to implement. The coder-decoder 150 also has a first and a second control input EN and ST, respectively. In order for the coder-decoder 150 to work, a logical "0" must first be applied to the first control input EN in order to set the coder-decoder 150 , and a positive voltage jump must also occur at the second control input 57 "so that the Coder-decoder 150 begins to work. The coder-decoder 150 is then switched off again by switching off the logical "1" at the first control input EN . The line 23 is also connected to the input of a threshold detector 152 which operates with a relatively high voltage threshold detector 152 having an output only a logical "1" appears at the when the voltage on line 23 is below a predetermined relatively high Spjnnungspegel. the output voltage of threshold detector 152 is located at a first input of an AND gate 154 having two inputs and also at the input of a monostable multivibrator 156. An output ζ) of the multivibrator 156 is connected to the second input of the AND gate 154 ver bound. Multivibrator 156 is designed in such a way that the signal at its output Q is normally a logic "0", but assumes the value "1" for a predetermined period of time if a logic "1" is applied to its input. The output of the AND gate 154 is connected to an input of an OR gate 158 , the output of which is connected to the set / input of a flip-flop 160 .

The Q output of the flip-chip 160 is connected to the first input of an AND gate 162 with two inputs. The output of this I'ND gate 162 is with your first input of a NAND gate 163 with

two inputs are connected, the output of which is connected to the first control input EN of the encoder-decoder 150. The second input of the AND gate 162 is connected to the output of the strip punch 140. The output of AND gate 162 is also connected to the control inputs of a two-phase clock oscillator 164 and a four-bit binary counter 160. The oscillator has two outputs Oa and Ob- If a logical "1" is applied to a control input, it delivers a series of logical "!" Pulses at its output Oa and a corresponding series of pulses at its output Ob- The pulses are at the output Ob slightly delayed compared to that at the output Oa . The output Oa of the oscillator 164 is connected to the control input of the strip punch 140. A counter 166 is designed so that when a logic "1" is applied to its control input, it counts the pulses applied to its counter input CL , a counting step being triggered by a negative voltage jump. The output Ob of the oscillator 164 is connected to the counting input CL of the counter 166, so that the counter 166 is incremented by the trailing edges of the "1" pulses from the output Ob of the oscillator 164. The outputs of the counter 166 are connected on the one hand to the inputs of a converter 168 with four inputs and 16 outputs and on the other hand to the input of the encoder-decoder 150 via a set of gate circuits 170. The gate circuits 170 have a control input and are designed in such a way that they let the count of the counter 166 through to the input of the encoder-decoder 150 when there is a logical "1" at the control input.

The devices of the central unit described up to now serve to generate the request numbers 0 to 13 and 15 and to put them on the line 23. For the central processing unit 12 to work, the flip-flop 160 must be set. If this flip-flop is set and if a logical "1" is present at the output of the strip punch 140, the coder-dcoder 150, the oscillator 164 and the counter 166 are set. The oscillator 165 then generates a "1" signal at its output O _A , which causes the strip punch 140 to record the data on the bus 142 at this point in time, whereupon the logic "0" occurs at the output of the strip punch 140 and the Oscillator 164 is turned off. Immediately after the "1" pulse occurs at output Oa , a similar pulse is generated at output Ob. The leading edge of this pulse initiates the operation of the encoder-decoder 150. The counter reading of the counter 166 is increased by one by the trailing edge of this pulse. At the output of the strip punch 140, the logical “0” is retained for a predetermined period of time. During this period, three things happen. First of all, the data previously present on the bus 42 are recorded by the strip punch 140. Thirdly, the response number received via line 23 is output at the output of coder-decoder 150 after conversion. When the tape punch has completed its recording process, its output goes to the state "1", the oscillator 164 is set again and the processes are repeated. It should be pointed out that the period of time which the strip punch 140 needs to record the information at its input is longer than the period which the coder-decoder 150 needs to send a request number to the monitoring connection 10 and the to receive the corresponding response number. It should also be noted that in the time intervals between successive "1" pulses at output O _A, the central unit records data that is already available on data bus 142,

ui, however, simultaneously requests and receives further data from the monitoring connection 10

The following will now describe the facilities with the help of which the data on the Collect line 142 arrive. In detail, the

η output signals of the coder-decoder 150 to the Inputs of a blocking circuit 172, a set of gate circuits 174 and a safety circuit 176 The blocking circuit 172 has a control input. If there is a logical "1" at the control input

jii can be applied to the locking circuit 172 to their Inputs through existing data to their outputs. However, if there is a logical "0" at the control input then the outputs of the locking circuit 172 remain in the state in which they were when the last time the

j-, have found the signal at the control input to be "0". The converter 168 has 16 outputs 0 to 15, of which output 1 is connected to the control input of the Lock circuit 172 is connected to the 16 outputs of converter 168 and the outputs of the lock circuit

«Ι 172 are connected to the inputs of a read-only memory 178. The read only memory 178 has seven outputs, which are designated by the designations SEQ SECCL, TQ DA, IN 1, IN 2 and FM . These symbols are abbreviations for »Security«,

t'i "Security-clear", "Time code (Time code) «,» Daten (Data) «,» Connection number 1 (installation digit 1) «,» Connection number 2 (installation digit 2) "or" card mark (file mark) ". In the 4th column of the table according to FIG. 4 are the 16 possible

• i «states of the counter 166 indicated, while in the 5th to 7th column indicates which outputs of the read-only memory 178 deliver a logical "1" if the counter is in the relevant state, depending on whether the output signal of the i Lock circuit 172 is a binary 0, a 1, or a 2.

The outputs of the gate circuits 174 are connected to the bus line 142 and are designed in such a way that that when there is a logical "1" at your control input, the signals from the output of the coder-de-

Vi coders 150 are applied to the manifold 142. The control input of the gate circuits 174 is connected to the output DA of the read-only memory 178. There are three more memories 180, 182 and 184 provided, each of which has a control input and so on

V) is designed that when a logical "1" a digit in binary form is applied to the collecting line 142 at its control input. The ones in memory 180 The stored digit is a card mark, which is removed from the strip punch along with the data

Wi is recorded. The control input of the memory 180 is connected to the output FM of the read-only memory 178. The digits stored in memories 182 and 184 form a number which is the connection number for a particular monitoring

ti'i port that is to the monitor port that belongs to the monitoring system. A single system can have more than one central unit, see above that the same union number has more than one

Central unit can be assigned. The control inputs of the memories 182 and 184 are connected to the outputs INi and IN 2 of the read-only memory 178 . An electronic clock 186 with calendar is provided, which can generate a 7-digit binary-coded decimal number that represents the date and time. The clock has a control input and generates an output signal at one of its outputs when a logic "1" is applied to its control input for a selected digit of the seven digits, the selection of the digit being controlled by input signals which are applied to the seven address inputs of the clock 186 . In detail, the address inputs are connected to the outputs 8 to 15 of the converter 168 . The control input of the clock 186 is connected to the output TC of the read-only memory 178 and its outputs are connected to the bus line 142.

The safety circuit 176 contains suitable devices for carrying out a safety check of the data supplied to it. As mentioned above, the identification element 14 has four digits which can be used for data security. The safety circuit 168 has a control input and can be set by a logical "1" at this control input. The security circuit works with the security digits and other digits of the identification element that are required for the security check. The safety circuit 176 can also be connected to the outputs of the clock 164 and the converter 168 so that the correct clock signals can be fed to it. The security circuit 176 can be constructed differently, depending on the security method used in detail. As mentioned above, the ranking number can also be included in the security check if permutations of all data of the identification element are carried out. In particular, one can proceed in such a way that, in the event that the priority number is not supplied to the central unit, no result is obtained due to the permutations which satisfies the security check, so that the central unit reacts as if the identifier were invalid. In the circuit according to FIG. 2, the safety circuit works with all ten digits or numbers of the identification element 14.

The control input of the safety circuit 176 is connected to the SfC output of the read-only memory 178 . An output of the safety circuit 176 normally supplies the logical "0", but changes to "1" if an invalid identifier is detected. The output of the safety circuit 176 is coupled to the set input of a flip-flop 188. The reset input of this flip-flop is connected to the SECCL output of the read-only memory 178 . The 0 output of flip-flop 188 is connected to a first input of a NAND gate 190 , to whose second input the output 14 of converter 168 is connected. The output of the NAND gate 190 is connected to the control input of the gate circuits 170 .

The following is the mode of operation of the central unit according to FIG. 2 will be explained. In the 4th column of the table according to FIG. 4 is the status of the counter 166 when the request number specified in the 1st column is transmitted to the monitoring connection 10 and when the corresponding data is received from the monitoring connection. It can be seen that when transmitting the request number

'(ι

0 and with the number 1 or 2 then received, depending on whether or not there is an identification element in the reader, the counter 166 has the counter reading 1. The information is given in the 9th and 10th columns of the table according to FIG , we'che during the individual positions of the counter 166 is recorded by the tape puncher 140th The 9th column indicates the information that is recorded when the signals at the outputs of the interlock circuit 172 represent a 1, while the 10th column shows the information that is recorded when the signals at the outputs of the interlock circuit 172 represent the number 2 represent. Before the start of a connection with any monitoring connection 10 , the counter 166 is at the count 0, and the memory is set and supplies a binary number to the bus 142 which corresponds to a card token. At the beginning of a connection, the flip-flop 160 is set, and the oscillator 164 is set under the condition that a logical "1" is present at the output of strip punch 140 then the oscillator 164 is a "1 generates" pulse at the output which has the result that the tape puncher 140 an index mark records . Immediately thereafter, a "1" pulse is generated at the output Ob of the oscillator 164. The leading edge of this pulse causes the counter reading 0 at the output of the counter 164 to be transmitted to the monitoring connection 10; the trailing edge of the pulse causes the counter 164 to increment to count 1. During the time that the tape punch 140 is working to record the card mark, its output has a logic "0" and the oscillator 164 is thus blocked. While the counter 164 has the counter reading 1, the strip punch 140 ends the recording of the card mark, and the response to the query number 0 is received, this response being either a 1 or a 2, depending on whether there is of the monitoring connection is an identification element or not. While the counter 164 has the counter reading I, there is a "1" at the output DA of the read-only memory 178 , the gate circuits 174 are set and the answer to the request number 0 is sent to the bus 142 via the gate circuits 174 . In addition, when the counter 164 has the counter reading 1, there is a logical "1" at output 1 of converter 168, so that the response to query number 0 appears at the output of blocking circuit 172 .

When the pin punch 140 has finished recording the card mark, a logical "1" appears at its output, the oscillator 164 is set again and "!" Pulses appear one after the other at its outputs Oa and Ob. The O ^ pulses cause the strip punch 140 to begin recording the information on the bus 142 , that is, the recording of the response to the query number 0, while the leading edge of the Oß pulse causes the count I of the counter 166 to Monitoring connection 10 is transmitted. The trailing edge of the Oβ pulse causes the counter 166 to advance to the count 2. While the counter 164 has the count 2, the tape punch 140 ends the recording of the response to the request number 0, and the response to the request number 1 is received, namely the first digit of the connection number. While the counter 164 has the count 2, the output remains the

Lock circuit 172 in the state that is predetermined by the response to query number 0. In addition, there is a logical “1” at output DA of read-only memory 168 , gate circuits 174 are set, and the response to query number 1 is forwarded to bus 142 via these gate circuits

When the tape punch 140 has finished recording the response to the request number 0, the process is repeated, and the tape punch 140 records the response to the request number 1, while the request number 2 is sent to the monitoring terminal 10 and received the response from there is applied to the manifold 142 . If the outputs of the blocking circuit 172 correspond to a binary 1, this process is repeated for the counts 3 to 8 of the counter 166. While the counter 166 has the counts 4 to 8, the responses to the request numbers 3 to 7, ie the department number, are received and the user number indicated on the identification element in the reader. While the counter is at 166 one of the counters 5 to 9, the answers to the inquiry items 3 are recorded to 7 by the tape puncher 140 while the counter is at 166 one of the counters 9 to 14, the digits are received, the ranking number or security number form. Usually there is no need for the tape punch to record these numbers. Instead, the clock 186 provides a time code which contains the date and time. The TC output of the read-only memory 178 supplies a logical "1" during the counts 9 to 15 of the counter 166 , and the seven digits from the output of the clock 186 are consequently recorded while the counter 166 has the counts 10 to 15 and 0.

If one further assumes that the output signal of the blocking circuit 172 is a binary 1, then at the output SEC of the read-only memory 178 for the counts 4 to 13 of the counter 166 there is a logic "I". The digits which are received by the monitoring connection 10 while the counter 166 has one of the counter readings 4 to 13, that is to say all digits which are read from the identification element, are thus fed to the safety circuit 176. If a logical "1" appears at the output of the safety circuit 176 and indicates that an invalid identifier has been used, then the central unit must not transmit the request number 14 to the monitoring connection 10. Elements 188 and 190 are provided for this purpose. Is normally at the (^ Q output of the one element forming the flip-flop 188 is a logical "0" to. Thus, generates a logical "1" at the output of the second member forming the NAND gate 190 and to the control inputs of the gate circuits 170 is applied so that the output signal of the counter 166 is applied to the input of the coder-decoder 150. However , if data is received indicating the use of an invalid identifier, a logic "1" appears at the output of the security circuit 176 , by means of which the Flip-flop 188 is set and now delivers a logical "1" at its output ζ). If in this situation a logical "1" occurs at the output 14 of the counter 166 , a logical "0" results at the output of the NAND gate 190 and the gate circuits 170 are blocked, whereby the connection between the output of the counter 166 and

the input of the coder-decoder 150 is interrupted and the transmission of the request number 14 is prevented. If the flip-flop 188 has been set, it will be necessary to reset it when the time information read from another identifier is received. This is achieved by providing the output SECCL of the read-only memory 178 , at which a logic "1" is present when the counter 166 has the counter reading 9 and by feeding the output signal from said output to the reset input of the flip-flop 183

To interrupt the operation of the central unit after all information has been received from the identification element and after the recording of the time code has ended, output 0 of converter 168 is connected to the reset input of flip-flop 160 . When the counter 166 returns to the counter reading 0 after running through all counters 1 to 15, the request number 15 is sent to the monitoring connection 10, whereby the memory 180 is set to enable the recording of a card mark as soon as the next connection to a monitoring connection is established. In summary, it can be stated that when an identification element is inserted into the reader, the strip punch 140 records a card mark followed by the number 1 and the five digits that identify the user and the seven digits that represent the date and time represent.

If the output of the interlock circuit 172 is a binary 2, then the central processing unit operates similarly to that described in the three paragraphs immediately preceding, except that the time code is not recorded and the security circuit 176 is not set. Instead, the total number of copies made and the number of multiple copies are transmitted from the monitoring port and recorded. In this case, the strip punch 140 records a card mark followed by the number 2. Three digits are available for the total number of copies and three digits are available for the number of multiple copies.

The central processing unit 12 also includes means for recording a two-digit port number and the date and time at the beginning of each operating cycle. These devices include a flip-flop 192 whose set input is connected to the output of a supply voltage detector 194 and whose reset input is connected via a switch 196 to a positive voltage source. The supply voltage detector is connected to the circuit for supplying the supply voltage for the central unit and its output signal is a logic "0" if the output voltage of the supply voltage source is below the voltage required for the operation of the central unit. Otherwise there is a logical “1” at the output of the supply voltage detector 194. The switch 196 is located on the control panel of the central unit and must be closed briefly every time the central unit is put into operation, ie either when the supply voltage for the central unit is switched on or when a new paper supply has been inserted into the strip punch 140. The Q output of flip-flop 192 is connected to the reset inputs of flip-flops 160 and 188 and ensures that these two flip-flops are first reset when the central processing unit is switched on. In addition, the (^ output

of the flip-flop 192 is connected to the clear input of the counter 166 and sets it to zero when the supply voltage is switched on. The output Q of the flip-flop 192 is connected to the input of a monostable multivibrator 198 . The output Q of the monostable multivibrator 198 is connected to the second input of the OR circuit 158 and is normally at "0", except for a given period after a logic "1" has been applied to its input. The output ζ) of the monostable multivibrator 198 is fed to a circuit point G , which in turn is connected to the second input of the NAND gate 163 . Every time the switch is closed 1%, the monostable multivibrator applies a logic "1" via gate 158 : the set input of flip-flop 160. As a result, the monostable multivibrator sends a logic "0" to the second input of the NAND- Gate 163 is applied so that a logic "1" is applied to the second control input EN of the coder-decoder 150, which blocks this circuit. The central processing unit begins to operate when the flip-flop 160 is set. However, since the encoder-decoder 150 is locked, no query numbers are sent to the monitoring ports and no responses are received from them. As a result, the output of interlock circuit 172 is held at state zero. The states of the outputs of the read-only memory 178 and the numbers recorded by the strip punch 140 are shown for this situation in the 5th and 8th columns of the table according to FIG.

While the counter 166 is counting 1 and 2, a card token and the number 0 are recorded. If the counter 166 has the counter readings 2 and 3, then there is a logical "1" at the outputs IN 1 and IN2 of the read-only memory 178. This sets memories 182 and 184 so that the signals corresponding to the first and second digits of the port number are placed on bus 142 . When the counter 166 becomes 3 and 4, the first and second digits of the port number are recorded. When the counter 166 shows 10-15 and 0, the seven digits of the time code are recorded. The period of the monostable multivibrator 198 should be slightly longer than the time required for the strip punch 140 to record the card mark. Each time the operation of the central unit 12 is initiated by closing the 1% switch, the strip punch records a card mark as well as the number 0 and a two-digit connection number assigned to the central unit in question and also the seven digits of the time code, which contain the date and time display the time. As mentioned above, the monitoring connection 10 contains a compensation circuit 25. The purpose of this circuit is to create the possibility of using a central unit to monitor and record the use of several copiers, each of which is assigned a monitoring connection 10. that a single two-wire line 23 can be used to connect all monitoring connections to the central unit, the individual monitoring connections being connected to the line in parallel. The compensation circuit ensures that there is only a connection between one monitoring connection and the central unit.

The compensation circuit or connection device is explained in more detail below with reference to FIG. 5. Each monitoring connection 10, which is connected to the counter unit 12 , has such a compensation circuit 25, which is connected to the line 23 via suitable connection devices 398, 398, 4.

A first compensation circuit 25 which is connected to a first monitoring connection 10 is shown in FIG. 5, while a second compensation circuit 25A which is assigned to a second monitoring connection 10/4 is partially shown. In fact, equalization circuits 25 and 25/4 can be identical. One wire of the line 23 is connected to earth or to the reference potential of the circuit, while the other wire is connected to an input of a threshold value detector 400 for a relatively high voltage and to an input of a threshold value detector 402 for a relatively low voltage. The output signal of the threshold value detector 400 is a logical "1" if the voltage on the line 23 exceeds a first voltage level and otherwise a logical "0", while the output signal of the threshold value detector 402 is a logical "1" when the voltage on the line 23 exceeds a second voltage level and is otherwise a logic "0", the first voltage level being higher than the second. The output signal of the threshold value detector 400 is fed to a first input of an AND gate 404 with two inputs. A JK flip-flop 406 has its / input connected to the output of AND gate 404 , while its K input is connected to ground. The clock input of flip-flop 406 is connected to the output of an oscillator 408 . The (^ output of the flip-flop 406 is connected to a load switch 410 , one terminal of which is connected to the ungrounded side of the line 23 via a resistor 412. The load switch 410 is used to connect the ungrounded core of the line 23 via the Resistor 412 should be connected to ground when its input is a logic "1." The Q output of flip-flop 406 is also connected to the input of a timer 414. An output of timer 414 is normally "1", goes but after "0" if the signal at its input was a logical "1" for a specified time interval. The output of the timer 414 is connected to the first input of an AND gate 416 with two inputs, the output of which is connected to a first input of an OR gate. Gate 418 is connected to two inputs The output of the threshold value detector 402 is connected via an inverter 420 to the second input of the AND gate 416. The second input of the OR gate 418 is connected to the A output 15 or £ Cde < first converter 28 of the monitoring connection K connected. The second input of the AND gate 404 is connected to the circuit point F of the monitoring connection 10. As mentioned, the compensation circuit 254 is constructed similarly to the compensation circuit 2i and contains in particular a load switch 410/4 and a resistor 412Λ, these elements being connected in the same way as the corresponding elements of the compensation circuit 25. The oscillator 408 of the compensation circuit 25 correspond to the oscillator of the compensation circuit 25/4 but work with a slightly different frequency than the oscillator 408. The central unit 12 contains a power source 430 which is connected between the wires of the line Z.

lies. This current source and the elements 152, 154 and 156 of the central processing unit cooperate with the compensation circuit 25 in order to bring about the desired function.

The fiber line are 23 transmitted data 'from zero Voli pulses. The compensation circuit 25 also contains a data switch 427 which is located between the ungrounded wire of the line 23 and earth. If a logical "1" is applied to the input of data switch 422, this switch | closes ₍₎ and causes a zero volt signal on line 23! appears. The input of the data switch 422 is connected to the output of a NOR gate 424 with two inputs, the first input of which is connected to the connection point of the load switch 410 and the resistor 412 . The data to be transmitted are applied by the coder-decoder 26 to the second input of the NOR gate 424 , while the received data are applied to the coder-decoder 26 from the output of the threshold value detector 402 for the low voltage ^ _0.

Briefly, the compensation circuit 25 operates as follows: The current source 430 of the central processing unit 12 supplies a relatively constant current between the wires of the line 23, so that the voltage between these two wires, at least when no data is being transmitted, is a function of the resistance between them is. When the connection between any monitoring connection 10 and the central processing unit 12 is established, the j ₀ load switch 410 of this monitoring connection is closed and the resistor 412 is placed between the wires of the line 23. If the load switches 410 of all monitoring connections JO, which are connected to a central unit, are open, then the voltage across the line 23 is a relatively high voltage, which is primarily determined by the internal resistance of the generator or the current source 430 . If the load switch 410 of one of the monitoring connections 10 is closed, then the presence of the resistor 412 between the wires of the line 23 leads to a voltage drop, which leads to a drop in the voltage below a first voltage level. The threshold value detector 400 determines whether the voltage across the line 23 is above or below the first voltage level. If ever two load switches 410 in two or more monitoring connections 10 are closed simultaneously, then two or more resistors 412 are placed between the wires of the line 23, with the result that the voltage below a second voltage level which is lower than the first voltage level , sinks. Accordingly, the second threshold detector 402 determines whether the voltage across the line is above or below the second voltage. If a logical "1" is present at the output of the threshold value detector 400 , then a connection can be established between the monitoring connection 10 and the central unit 12, and the load switch 410 is closed. If, on the other hand, a logic "0" is present at the output eo of the threshold value detector 400, then there is already a connection between another monitoring connection and the central unit, so that the connection between the new monitoring connection and the central unit cannot be established until the previous connection is interrupted If the case should occur that the load switches 410 and 410Λ both monitoring connections 10 and 10 / * are closed, then the voltage across the line 23 falls below the second voltage level. The threshold value detector 402 determines this and interrupts the connection between the two monitoring connections and the central unit. A pseudo-random system with the oscillator 408 then operates in the monitoring connections in order to establish a connection between one of the monitoring connections and the central unit.

Specifically, when an identification element 14 is inserted into the reader 16, the switch 34 is closed, the flip-flop 52 is set and a logic "1" is generated at the circuit point Feine. If the output signal of the threshold value detector 400 is a "1", then the flip-flop 406 is set by the next time pulse which is applied by the oscillator 408 to its clock input. In addition, the load switch 'MO is closed. Now a logic "0" is applied to the first input of the NOR gate 424 , and the data switch 422 is opened or closed, depending on the signal at the second input of the NOR gate 424, creating a connection between the monitoring connection 10 and the central unit 12 is produced. If, on the other hand, there is a logical "0" at the output of the threshold value detector 400 , then such a connection is only established when this output signal changes to "I", ie when a previously existing connection between another monitoring connection and the central unit has been interrupted. In a corresponding manner, when the identifier is removed from the reader 16, the switch 34 is opened, the flip-flop 35 is set and a logic "1" is generated at the circuit point F. If the output signal of the threshold value detector 400 is a logic "1" at this point in time, then the flip-flop 406 is set and the load switch 410 is closed in order to establish a connection between the monitoring connection 10 and the central processing unit 12 . If, on the other hand, the output signal of the threshold value detector 400 is a logic "0", then no connection is made until this output signal becomes a logic "1". If the request number 15 is received from the monitoring connection 10 , which indicates the end of the connection, then a logic "1" is applied from the output 15 of the converter 28 to the reset input of the flip-flop 406 , which causes the load switch 410 to open and the Connection between the monitoring connection and the central unit is terminated.

In Fig. 6 various exemplary pulse diagrams are shown, on the basis of which the mode of operation of the compensation circuit 25 is to be explained in more detail. The pulse train A represents the output signal of the oscillator 408, the pulse train B represents the output signal at the node F when it is desired to establish a connection between the monitoring connection 10 and the central processing unit 12; the pulse train C represents the output signal of the flip-flop 406. The pulse trains D, E and F correspond to the pulse trains A, Bund C, however, apply to the compensation circuit 25A In the compensation circuit 25 a logical "1" is earlier than the signal at the corresponding node F of the second compensation circuit 24/4, so that it can be seen that the monitoring connection 10 is an attempt earlier

was undertaken to establish a connection with the central unit than on the part of the other monitoring connection 10.4. The output signal of the flip-flop 406,4 thus remains a logic "0" until the connection between the monitoring connection 10 and the central unit is terminated.

The pulse diagrams C to K according to FIG. 6 show the mode of operation of the compensation circuit when both monitoring connections 10 and 10/4 simultaneously try to establish a connection with the central unit 12 , the pulse trains G and / or the output signal of the oscillator 408 or the signal at the node F being the compensation circuit 25, as well the output signal of the corresponding oscillator 408A and the signal at the corresponding node Fin of the other compensation circuit 25/4 and the pulse train K representing the corresponding voltage on line 23. The situation under consideration arises when the oscillators 408 and 408Λ of the monitoring connections 10 and 10A happen to work approximately in phase and when the circuit points F in both monitoring connections 10 and 10/4 occur in the time interval between the corresponding output pulses of the oscillators 408 and 408/4 assume the state "1", the time at which the two pulses occur is denoted by ii and β in FIG. If the case under consideration occurs, the load switches 410 and 410A in the two equalization circuits 25 and 25A are closed simultaneously at approximately time fc, and the voltage across m of the line 23 then falls below the second voltage level V2 , as the pulse sequence K shows away. If the voltage on the line 23 falls below the level V2, a logic "1" J5 is present at the output of the timer 414 via the AND gate 416 and a logic "1" via the OR gate 418 to the The reset input of the flip-flop 406 is applied and the load switch 410 is thus opened. Load switch 410/4 is also opened in a corresponding manner. As mentioned, the oscillators in the equalization circuits 25 and 25/4 operate at different frequencies. Like F i g. 6 shows, the frequency of the oscillator of the compensation circuit 25 is slightly lower than the frequency of the oscillator of the further compensation circuit 25/4. The next time an output pulse from oscillator 408 occurs - this pulse occurs at time h - the pulses from oscillators 408 and 408/4 are a little out of phase, and the logical "!" Pulse from oscillator 408 begins slightly earlier than the "1" -Pulse of oscillator 408/4. The arrangement of the load switch 410/4, the threshold value detector 400 and the AND gate 404 , however, has a response time which must elapse after the load switch 410A is closed in order to prevent the load switch 410 from closing. If the leading edges of the "1" pulses of the oscillators 408 and 408/4 are not shifted by at least this response time, the load switch 410 also closes again, although the load switch 410Λ was previously closed, which again results in the voltage overflowing on line 23 falls below voltage level V2 , so that both switches 410 and 410A are opened again. As FIG. 6 shows, the time interval between the pulses of the oscillator 408 starting at the times I ₃ , u, f ₅ and fe from the leading edges of the output pulses of the oscillator 408A is shorter than the required response time of the output pulse of the oscillator starting at the time tr However, 408 is shifted sufficiently in time with respect to the corresponding output pulse of the oscillator 408-4 , so that closing of the load switch 410 is now prevented. In this case, the voltage across the line 23 remains above the voltage level V2, so that the load switch 410A remains closed and enables a connection to be established between the further monitoring connection 10A and the central unit 12.

The drop in the voltage across the line 23 below the first voltage level is later detected by the threshold value detector 152 for the higher voltage in the central unit 12 , whereupon the flip-flop 160 initiates the operation of the central unit in the manner previously described. The monostable multivibrator 156 provides a delay between the drop in the voltage across line 23 below the first voltage level and the start of operation of the central unit. This ensures that neither low-voltage noise pulses from line 23 nor low-voltage pulses according to the pulse sequence K in FIG. 6 trigger the operation of the central unit due to the operation of the equalization circuits 25, 25A.

The timer 414 of the equalization circuit 25 is designed so that data pulses from the monitoring circuit 10 do not reset the flip-flop 406 and do not open the load switch 410. The output signal of the timer 414 thus goes to "0" after the output signal of the flip-flop 406 was a logical "1" for a predetermined time interval, so that the output signal of the threshold value detector 402 via the gate 416 no longer goes to the reset input of the flip -Flops 406 can be created. The threshold detector 402 for the lower voltage is then used to detect the data pulses on line 23.

The output Q of the flip-flop 406 is connected to a first input of an AND gate 426 with two inputs, while the output of the timer 414 is connected to the second input of the AND gate 426 via an inverter 428 . The output signal of the AND gate 426 can then be used to indicate to the remaining circuit parts of the monitoring connection 10 that this monitoring connection 10 is connected to the line 23 and should now receive and transmit data, for example by enabling the coder-decoder 26.

In a monitoring system according to the invention, the oscillators 408, 408A of the equalization circuits operated at frequencies of about 10 Hz and their output pulses had a duration of about 0.5 msec. The timers 414 operated with a delay time of about 6 msec, and the monostable multivibrator 156 provided output pulses with a duration of about 40 msec. It is, of course, desirable to ensure that the operating frequencies of the oscillators 408 are slightly shifted from one another in all of the monitoring connections cooperating with a central unit 12.

From the above description it is clear that a switching device has been created, soft all requirements set out above met. In particular, the connection device according to the invention enables the use of a single data line through several sub-connections remote from a central unit and ensures that the data line

is only used by one sub-connection. the The connection device preferably has interruption devices that are created in this case prevent a connection if the two Uiuer connections are essentially at the same time An attempt is made to rely on the Daienleitung to switch on. In addition, facilities are foreseen which ensure that a sub-circuit that is ready for connection is immediately transferred to the data line is switched on when their use by another Unteran '; r-M "B has ended. The interruption device are sure daii then, «" j η π ciic Data line from two or more sub-ports is required for each of the sub-ports in the essentially the same probability exists, o! s ü first to be switched off on the data line. This differs from the one according to the invention System of the Davenüberiragungssystemen, in which all sub-connections in a given order with the data line will be voibi'iidtn. In these systems the sub-connections that are at the end of the ranking always have to wait a long time until they are switched to the data line so that these sub-connections, when the system is heavily used, become practically useless The foregoing description also makes it clear that when using the Aufschaileinrichtung invention connected at any time further sub-connections mil the data line can be. The expansion of the system does not make any changes to the existing ones Switchgear ure! Unier connections required Indeed, in many applications of D. transmission systems according to the invention not necessary to take special precautions, u: ri for the oscillators for the individual sub-connections to ensure different frequencies, since the normal tolerances of the components differ in the limgebungsbedingungen etc. of selbsl ensure that there are sufficient frequency deviations result.

A preferred embodiment of the invention has been discussed in detail above; it understands however, that the invention is in no way limited to the details of the exemplary embodiment. Rather, both with regard to the basic arrangement and with regard to the individual circuits numerous modifications are possible without having to leave the concept of the invention. For example is in the embodiment for actuating the Aufschaileinrichtung the voltage between the wires of the data line evaluated. But it is also possible to control the switching device as a function of the current via the data line or in Depending on the frequency of an alternating current signal on the data line or also as a function from another parameter of a signal on the data line.

In addition 5 sheets of drawings

Claims (8)

Patent claims: 1. Connection device for establishing a connection between a transmitting and / or receiving unit and a line for transmitting data with signal generating devices which generate an electrical signal on the line with a parameter dependent on the usage state of the line, characterized in that connecting devices (398) for connecting the switching device to the line (23) that first detector devices (400) responding to the parameter are provided which generate a first electrical signal at an output when the value of the parameter differs from the nominal value provided for the free line Parameter deviates by a first predetermined amount that second detector devices (402) responding to the parameter are provided, which are connected to the connection devices (398) and generate a second electrical signal at an output when the value of the parameter is provided at the connection devices (398 ) deviates from the nominal value of the parameter predetermined for the free line by a second predetermined amount, which is greater than the first predetermined amount, that first switching means (408) are provided to repeatedly generate a third electrical signal at an output, the second Switching means (16, 34, 52) are provided in order to generate a fourth electrical signal at an output (F) when a connection to the line (23) is desired, that third switching means (410,412) are provided in order to control the Connecting devices (398) to change the effective impedance, in particular the impedance of the switching device, as a function of a fifth electrical signal at an input, so that fourth switching means (404, 406, 418 to 420) are provided which are connected to the output of the first detector device (400) , with the output of the first switching means (408), with the output of the second switching means (16,34,52) and with at least one input of the third switching means (410, 412) «5 are connected in order to apply the fifth electrical signal to the input of the third switching means (410, 412) when the first, third and fourth electrical signals occur simultaneously, unless the second electrical signal is present at the same time 2. Switching device according to claim 1, characterized in that the second switching means (16, 34, 52) generate a sixth electrical signal at an output when it is desired to release the line (23) and that the fourth switching means (404, 406 , 418 to 420) keep the fifth electrical signal away from the input of the third switching means (410, 412) when the sixth electrical signal occurs. ^M. 3. Switching device according to claim 1, characterized in that fifth switching means are connected to the fourth switching means (404, 406, 418 to 420) in order to apply the fifth electrical signal to the input of the third switching means (410, 412) to enable despite the occurrence of the second electrical signal when the fifth electrical signal has already been applied to the third switching means (410, 412) for a predetermined time interval 4. Switching device according to one of claims 1 to 3, characterized in that the to monitoring parameter is the potential on line (23) 5. Switching device according to one of claims 1 to 4, characterized in that the first switching means have an oscillator (408) . 6. Switching device according to claim 5, characterized in that the fourth electrical switching means have a flip-flop (406) , the data input of which is connected to the first detector devices (400) and to the output.der second switching means (16, 34, 52), whose clock input (CL) is connected to the output of the first switching means (408) and whose reset input (R) is connected to the output of the second detector device (402) 7. Switching device according to claim 6, characterized in that the reset input (R) of the flip-flop (406) is additionally connected to the second Schaltmitte'n (16, 34, 52) and responds to the sixth electrical signal. 8. switching device according to claim 7, characterized in that an output signal of the fifth switching means is used to provide an output signal as a function of the second electrical signal ar. to apply the reset input (R) of the flip-flop (406).