DE2007627C3 - - Google Patents
Info
- Publication number
- DE2007627C3 DE2007627C3 DE2007627A DE2007627A DE2007627C3 DE 2007627 C3 DE2007627 C3 DE 2007627C3 DE 2007627 A DE2007627 A DE 2007627A DE 2007627 A DE2007627 A DE 2007627A DE 2007627 C3 DE2007627 C3 DE 2007627C3
- Authority
- DE
- Germany
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H01L27/0727—
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19702007627 DE2007627B2 (de) | 1970-02-19 | 1970-02-19 | Verfahren zum herstellen einer integrierten halbleiterschaltung |
JP45118458A JPS504555B1 (de) | 1970-02-19 | 1970-12-24 | |
US00116494A US3788904A (en) | 1970-02-19 | 1971-02-18 | Method of producing an integrated solid state circuit |
GB20053/71A GB1291682A (en) | 1970-02-19 | 1971-04-19 | Method of producing an integrated solid-state circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19702007627 DE2007627B2 (de) | 1970-02-19 | 1970-02-19 | Verfahren zum herstellen einer integrierten halbleiterschaltung |
Publications (3)
Publication Number | Publication Date |
---|---|
DE2007627A1 DE2007627A1 (de) | 1971-09-02 |
DE2007627B2 DE2007627B2 (de) | 1973-03-22 |
DE2007627C3 true DE2007627C3 (de) | 1973-10-11 |
Family
ID=5762721
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19702007627 Granted DE2007627B2 (de) | 1970-02-19 | 1970-02-19 | Verfahren zum herstellen einer integrierten halbleiterschaltung |
Country Status (4)
Country | Link |
---|---|
US (1) | US3788904A (de) |
JP (1) | JPS504555B1 (de) |
DE (1) | DE2007627B2 (de) |
GB (1) | GB1291682A (de) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1357515A (en) * | 1972-03-10 | 1974-06-26 | Matsushita Electronics Corp | Method for manufacturing an mos integrated circuit |
JPS5410228B2 (de) * | 1973-08-20 | 1979-05-02 | ||
US4449224A (en) * | 1980-12-29 | 1984-05-15 | Eliyahou Harari | Dynamic merged load logic (MLL) and merged load memory (MLM) |
JPS5994453A (ja) * | 1982-10-25 | 1984-05-31 | ゼネラル・エレクトリック・カンパニイ | オン抵抗を低減した高圧半導体デバイス |
DE3408285A1 (de) * | 1984-03-07 | 1985-09-19 | Telefunken electronic GmbH, 7100 Heilbronn | Schutzanordnung fuer einen feldeffekttransistor |
US4694313A (en) * | 1985-02-19 | 1987-09-15 | Harris Corporation | Conductivity modulated semiconductor structure |
JPH0760854B2 (ja) * | 1985-08-30 | 1995-06-28 | 株式会社日立製作所 | 一方向導通形スイツチング回路 |
US4989058A (en) * | 1985-11-27 | 1991-01-29 | North American Philips Corp. | Fast switching lateral insulated gate transistors |
US5010034A (en) * | 1989-03-07 | 1991-04-23 | National Semiconductor Corporation | CMOS and bipolar fabrication process using selective epitaxial growth scalable to below 0.5 micron |
WO1994005042A1 (en) * | 1992-08-14 | 1994-03-03 | International Business Machines Corporation | Mos device having protection against electrostatic discharge |
-
1970
- 1970-02-19 DE DE19702007627 patent/DE2007627B2/de active Granted
- 1970-12-24 JP JP45118458A patent/JPS504555B1/ja active Pending
-
1971
- 1971-02-18 US US00116494A patent/US3788904A/en not_active Expired - Lifetime
- 1971-04-19 GB GB20053/71A patent/GB1291682A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
US3788904A (en) | 1974-01-29 |
GB1291682A (en) | 1972-10-04 |
JPS504555B1 (de) | 1975-02-20 |
DE2007627B2 (de) | 1973-03-22 |
DE2007627A1 (de) | 1971-09-02 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C3 | Grant after two publication steps (3rd publication) | ||
E771 | Valid patent as to the heymanns-index 1977, willingness to grant licences | ||
EHJ | Ceased/non-payment of the annual fee |