DE112010002229T5 - Bandwidth allocation in a Resilient Packet Ring network through a P-controller - Google Patents

Abstract

Implementations and techniques for bandwidth allocation in a resilient packet ring network are provided by a P controller.

Description

Related applications

The present application claims priority to U.S. Patent Application Serial No. 12 / 479,574, filed June 5, 2009, and entitled "ALLOCATING BANDWITH A RESILIENT PACKET RING NETWORK BY P CONTROLLER."

The present application is related to U.S. Application No. 12 / 479,438, filed June 5, 2009, and entitled "ALLOCATING BANDWITH A RESILIENT PACKET RING NETWORK BY PI CONTROLLER" by Fahd Alharbi and Nirwan Ansari.

background

Resilient Packet Ring (RPR) networks are often used for urban network technologies, due in part to their security and fault tolerance properties. However, city network technologies may be characterized by various limitations. For example, individual nodes in a synchronous optical networking (SONET) ring may be granted a minimal fair share, although it may not be possible to recover the unused bandwidth. In addition, a percentage of the potentially available bandwidth may be reserved for security purposes, but this can result in poor utilization. In contrast, with a Gigabit Ethernet ring, complete statistical multiplexing can be done at the expense of fairness. RPR networks can be used to mitigate the problems of underutilization and fairness associated with the currently existing ring technologies of the SONET and Ethernet type.

Summary

The present invention generally provides methods for bandwidth allocation in a Resilient Packet Ring (RPR) network through a proportional controller (P-controller). Some example methods of the invention may include determining a fair rate for providing allocated bandwidth in a Resilient Packet Ring network via a P-controller associated with at least one node of the Resilient Packet Ring network. One or more forwarding rates associated with at least one node of the Resilient Packet Ring network may be stabilized in unbalanced traffic scenarios based at least in part on the allocated bandwidth.

The present invention also broadly provides computer program products for bandwidth allocation in a Resilient Packet Ring (RPR) network through a proportional controller (P-controller). Some example computer program products of the invention may include determining a fair rate for providing allocated bandwidth in the Resilient Packet Ring network via a P-controller associated with at least one node of the Resilient Packet Ring network. One or more forwarding rates associated with at least one node of the Resilient Packet Ring network may be stabilized in unbalanced traffic scenarios based at least in part on the allocated bandwidth.

The present invention generally provides systems for bandwidth allocation in a Resilient Packet Ring network through a proportional (P-controller) controller. Some example systems of the invention may include a Resilient Packet Ring network having a plurality of nodes, an inner ring of links, an outer ring of links, and / or a P-controller. The inner ring of links may be connected between the plurality of nodes. The outer ring of links may be connected between the plurality of nodes. The P-controller may be connected to at least one of the plurality of nodes. The P-controller may be configured to determine a fair rate for providing allocated bandwidth in the Resilient Packet Ring network, and / or may be configured to unbalanced one or more forwarding rates associated with at least one of the plurality of nodes At least partially stabilize traffic scenarios based on the assigned bandwidth.

The present invention generally provides a device for bandwidth allocation in a Resilient Packet Ring (RPR) network through a proportional controller (P-controller). Some example devices of the invention may include a P-controller. The P-controller may be connected to at least one of the plurality of nodes in the Resilient Packet Ring network. The P-controller may be configured to provide a fair rate for providing allocated bandwidth in the Resilient Packet Ring network and / or configured to stabilize one or more forwarding rates associated with at least one of the plurality of nodes of the Resilient Packet Ring network in unbalanced traffic scenarios based at least in part on the allocated bandwidth.

The above summary is meant to be illustrative and not restrictive. In addition to the above aspects, embodiments, and features, further aspects, embodiments, and features will become apparent from the following detailed description with reference to the drawings.

Brief description of the drawings

The object of the invention is defined by the claims. The foregoing and other features of the invention will become apparent from the following description and claims, with reference to the accompanying drawings. It should be noted that the drawings illustrate a few exemplary embodiments of the invention and are not intended to be limiting. The invention will now be described in detail with reference to the accompanying drawings.

1 is a diagram showing an exemplary RPR ring.

2 Fig. 10 is a block diagram showing a node of an exemplary RPR ring.

3 FIG. 10 is a flowchart showing an example process for bandwidth allocation in a Resilient Packet Ring network. FIG.

4 shows an example bandwidth allocation control process in a Resilient Packet Ring network.

5 is a diagram showing an exemplary unbalanced traffic scenario.

6 is a diagram showing an exemplary unbalanced traffic scenario.

7 Figure 12 is a diagram showing throughput in time in an exemplary unbalanced traffic scenario.

8th Figure 12 is a diagram showing throughput in time in an exemplary unbalanced traffic scenario.

9 shows an exemplary computer program product.

10 FIG. 10 is a block diagram showing an example computing device according to the invention. FIG.

Detailed description

In the following description, various embodiments are described in detail to illustrate the claimed subject matter of the invention. It should be apparent to those skilled in the art, however, that the subject matter of the invention may be practiced otherwise than as described herein. For the sake of simplicity, well-known methods, procedures, systems, components and / or circuits will not be described in detail here. In the following detailed description, reference is made to the accompanying drawings, which form a part of the specification. Throughout the drawings, like reference numerals are used to indicate similar components. The embodiments described herein and shown in the drawings are not intended to be limiting. Other embodiments may be realized without departing from the scope of the invention. The features of the invention described herein and shown in the drawings may also be arranged, replaced or combined in other ways.

In the following, among other things, methods, devices, systems and / or computer program products for bandwidth allocation in a Resilient Packet Ring (RPR) network are indicated by a proportional controller (P-controller).

RPR networks can be used as high-speed metropolitan area networks (MAN) backbone technology. For example, RPR networks can be introduced to mitigate the problems of underutilization or lack of fairness in SONET and Ethernet type ring technologies. RPR performance goals include high bandwidth utilization, optimal spatial reuse on the dual rings of an RPR, and / or fairness.

One challenge may be to develop an algorithm that can dynamically respond to traffic to meet the stated performance goals. The RPR fairness algorithms in an Aggressive-Mode (RPR-AM) and in a Conservative-Mode (RPR-CM) can be relatively simple processes, but they have certain limitations. One limitation, for example, is that the bandwidth allocated by RPR-CM and / or RPR-AM may oscillate in unbalanced traffic scenarios. Such unbalanced traffic scenarios are described in more detail below with reference to the in 5 and 6 illustrated examples explained. These oscillations may set a limit to achieving spatial reuse and / or high bandwidth utilization. In addition, the performance of RPR-CM and / or RPR-AM may be sensitive to parameter settings of the algorithm. Accordingly, the methods, apparatus, systems, and / or computer program products for bandwidth allocation in an RPR network via a P-controller are described below with reference to a resolution of the limitations of the RPR-CM and / or RPR-AM fairness algorithms ,

Some example methods in accordance with the invention may include determining a fair rate to provide allocated bandwidth in a Resilient Packet Ring network via a P-controller associated with at least one node of the Resilient Packet Ring network. One or more forwarding rates associated with at least one node of the Resilient Packet Ring network may be stabilized in unbalanced traffic scenarios based at least in part on the allocated bandwidth.

Some example computer program products according to the invention may include determining a fair rate for providing allocated bandwidth in a Resilient Packet Ring network via a P-controller associated with at least one node of the Resilient Packet Ring network. One or more forwarding rates associated with at least one node of the Resilient Packet Ring network may be stabilized in unbalanced traffic scenarios based at least in part on the allocated bandwidth.

Some example systems in accordance with the invention may include a Resilient Packet Ring network having a plurality of nodes, an inner ring of links, an outer ring of links, and / or a P-controller. The inner ring of links may be connected between the plurality of nodes. The outer ring of links may be connected between the plurality of nodes. The P-controller may be associated with at least one of the plurality of nodes. The P-controller may be configured to determine a fair rate for providing allocated bandwidth in the Resilient Packet Ring network, and / or may be configured to unbalanced one or more forwarding rates associated with at least one of the plurality of nodes At least partially stabilize traffic scenarios based on the assigned bandwidth.

Some example devices according to the invention may include a P-controller. The P-controller may be associated with at least one of the plurality of nodes in the Resilient Packet Ring network. The P controller may be configured to determine a fair rate for providing allocated bandwidth in the Resilient Packet Ring network, and / or configured to ring one or more with at least one of the plurality of Resilient Packet node nodes. To at least partially stabilize network associated forwarding rates in unbalanced traffic scenarios based on the assigned bandwidth.

In some examples according to the invention, determining the fair rate may include determining a difference between a destination queue length and a current transit queue length. In some examples, determining the fair rate may include determining the rate of change of a difference between the destination queue length and the current transit queue length. In some examples, determining the fair rate may include determining a round-trip delay between a bottleneck link of the Resilient Packet Ring network and the at least one node of the Resilient Packet Ring network.

In some examples according to the invention, the determination of the fair rate may be based, at least in part, on a proportional gain k _p expressed as follows: 0 <k _p <π / 2Wτ where W represents a sum of weights associated with the nodes of the Resilient Packet Ring network, and τ at least partially on a round-trip delay between a Bottleneck link of the Resilient Packet Ring network and the at least one node of the Resilient Packet Ring network based.

In some examples of the invention, the fair rate F (n) may be expressed as follows: F (n) = F (n-1) -k _p (e (n) -e (n-1)) where F (n-1) represents a previous fair rate, k _{p represents} a proportional gain, e (n) represents a difference between a destination queue length and a current transit queue length, and e (n-1) represents a preceding difference between the destination queue length and a current one Transit queue length.

1 is a diagram illustrating an exemplary RPR network 100 according to one or more example implementations. The RPR network 100 may include two rotating ringlets. For example, this can be a ringlet as an inner ringlet 102 while the other ringlet is an outer ringlet 104 can be designated. The inner and outer ringlets 102 . 104 can span two or more nodes. For example, the inner and outer ringlets may be 102 . 104 over the knots 106A . 106B . 106C . 106D . 106E and 106F extend. A part of the inner ringlet 102 or the outer ringlet 104 , the two adjacent nodes 106A . 106B operatively connecting can be referred to as a link 108 become. This can be the inner ringlet 102 and / or the outer ringlet 104 several links 108 include, operatively, two or more nodes 106A . 106B . 106C . 106D . 106E and 106F connect with each other. During operation, information may be present at a particular upstream node, such as the node 106A into the RPR network 100 enter and along the inner ringlet 102 or the outer ringlet 104 via one or more links 108 to a downstream destination node, such as the node 106B be guided. If the information is a downstream target node, such as the node 106B can reach the information from the RPR network 100 escape.

2 is a block diagram showing a node 106B an exemplary RPR network 100 ( 1 ) according to one or more exemplary implementations of the invention. The knot 106B may include hardware, software, and / or a combination thereof to perform the functions of entry data measurement, congestion avoidance, and bandwidth allocation. For example, the node 106B one or more rate control devices 210 , one or more local buffers 212 , a primary transit queue buffer (PTQ buffer) 214 , a secondary transit queue buffer (STQ buffer) 216 , a testing device 218 , a planning facility 220 and / or a P-controller 222 contain. These functional units may be operated to provide flow control in the RPR network 100 execute ( 1 ). Such flow control may allow an overloaded node 106B a (in accordance with measurements on the node 106B derived) fairness message to one or more upstream nodes 106A etc. ( 1 ) sends. Such a fairness message may result in one or more upstream nodes 106A etc. ( 1 ) throttle the information entry rates to a congestion state at the congested node 106B to reduce and / or eliminate and fairness among the participating nodes 106A etc. ( 1 ).

The knot 106B may be one or more rate controllers 210 use that in the RPR network 100 ( 1 ) entering station traffic 230 to throttle. For example, the rate control device 210 the station traffic 230 throttling on a per-destination basis to support virtual destination queue operation and / or to avoid head-of-line blocking (HOL). By HOL blocking is meant here a situation in which a head-of-line packet of a particular buffer can not be switched to a destination because of congestion along the path from the source to the destination. In this case, the rest of the packets in this buffer may possibly be blocked by the head-of-line packet, even if there is no congestion along the path from the source to the corresponding destinations. Additionally or alternatively, the rate control device 210 the delivery of a station traffic 230 to the local buffer 212 allow. The local buffer 212 can define multiple service classes of a user traffic. For example, the local buffer 212 a user traffic of class A at a guaranteed rate and fluctuation, class B user traffic at a committed information rate (CIR) and a limited rate and fluctuation and / or class C user traffic as best effort traffic.

The testing device 218 can be an entry traffic 232 from a ringlet (not shown) in the node 106B receive. The testing device 218 can the exit traffic 234 from the node 106B to steer. Additionally or alternatively, the testing device 218 a transit traffic 236 to the PTQ buffer 214 and / or the STQ buffer 216 hand off.

The planning device 220 can the flow of information from the PTQ buffer 214 , the STQ buffer 216 and / or the local buffer 212 coordinate. For example, the planning device 220 optionally an exit traffic 238 from the PTQ buffer 214 , the STQ buffer 216 and / or the local buffer 212 to the starting node 106B for propagation along the RPR network 100 ( 1 ). For example, the planning device 220 optionally first a departure traffic 238 from the PTQ buffer 214 allow. If the PTQ buffer 214 is empty, the STQ buffer 216 Priority before station traffic from the local buffers 212 to have. For example, the STQ buffer 216 Priority over the station traffic from the local buffers 212 when the STQ queue length exceeds an STQ threshold; otherwise, the station traffic 230 to be served. In this case, the station traffic 230 into one or more importance classes such as a class A, a class B, a class C and / or the like. For example, the station traffic 230 operated in the following order: class A traffic, and then class B traffic. If the node 106B is not in Class A or B traffic, Class C traffic may be served.

The P-controller 222 can measure traffic including the transit queue length 240 receive. For example, the P-controller 222 Traffic measurements to that with the STQ buffer 216 associated waiting queue length 240 receive. At least in part, based on such traffic measurements, the P-controller 222 apply a fairness algorithm to determine a fair rate F (n). Such a specific rate can be used to provide bandwidth in an RPR network 100 ( 1 ). For example, such a determined fair rate may become upstream nodes 106A etc. ( 1 ) in the form of a control message 242 be sent. Such upstream nodes 106A etc. ( 1 ), which is the control message 242 may use the control message information and / or local information to throttle the rates accordingly.

3 is a flowchart that illustrates an example process 300 for allocating bandwidth in a Resilient Packet Ring network according to one or more example implementations. The process 300 and other processes described herein undergo various functional blocks or steps that may be described as processing steps, functional operations, events, and / or actions that may be performed by hardware, software, and / or firmware. It should be clear to the person skilled in the art that numerous alternatives to the in 3 shown function blocks in various implementations can be realized. While, for example, the process 300 as in 3 As shown in a particular order of blocks or steps, the subject invention is not limited to the order of blocks or steps shown here, or even to any particular order. Accordingly also can not in 3 shown inserted and / or additionally provided and / or can some of the steps of 3 be omitted without, therefore, the scope of the invention is abandoned.

As shown, the process can 300 can be implemented to allocate bandwidth in a Resilient Packet Ring network. Processing begins in step 302 where at the end of a given sampling time T is a P-controller 222 ( 2 ) at the downstream node 106B can scan the current transit queue length. For example, the downstream node 106B the current transit queue length of the STQ buffer 216 ( 2 ). The "sampling time T" here is to be understood as a sampling time between a determination of a current fair rate F (n) and a determination of a preceding fair rate F (n-1). The processing progresses from step 302 to step 304 where the transit queue length can be compared to a destination queue length. For example, the P-controller 222 ( 2 ) at the downstream node 106B the current transit queue length of the STQ buffer 216 ( 2 ) with a previously specified destination queue length.

In the following step 306 a fair rate can be determined. For example, the P-controller 222 ( 2 ) at the downstream node 106B a fair rate based at least in part on the comparison of the current transit queue length of the STQ buffer 216 ( 2 ) with the previously specified Determine destination queue length. In one implementation, such a fair rate may be determined to be bandwidth in an RPR network 100 over one with at least one node of the RPR network 100 such as the downstream node 106B associated P-controller 222 ( 2 ).

In the following step 306 Such a particular rate may be to one or more upstream nodes 106A to get redirected. For example, the downstream node 106B a fair rate to one or more upstream nodes 106A on an opposite ringlet 102 ( 1 ) hand off. Accordingly, individual upstream nodes 106A about the at the downstream node 106B be taught at fair rates. Additionally or alternatively, similar fair rates may be derived from other nodes (such as nodes 106C etc.) in an RPR network 100 be sent. Accordingly, individual nodes can 106A . 106B etc. in the RPR network 100 about the at the downstream node 106B supported fair rates and / or at individual nodes 106A . 106B etc. in the RPR network 100 be taught at fair rates.

In the following step 310 can be the upstream node 106A adjust its forwarding rate. For example, the upstream node 106A its forwarding rate based, at least in part, on that of the downstream node 106B Adjust fair rate received. As explained in greater detail below, the procedure may be 300 As a result, these forwarding rates are as in step 312 be stabilized shown. For example, one or more may be associated with one or more individual nodes 106A . 106B etc. in the RPR network 100 associated forwarding rates in unbalanced traffic scenarios based at least in part on a bandwidth allocation as described above with respect to step 306 be explained stabilized. In one implementation, the downstream node 106B in step 312 one or more of the steps 302 - 308 repeat that with the upstream node 106A stabilized associated forwarding rate. Alternatively, or in addition, similar steps may be performed on other nodes (such as nodes 106C etc.) in the RPR network 100 be executed. Accordingly, individual nodes can 106C . 106D etc. ( 1 ) in the RPR network 100 also stabilize forwarding rates, each with each node 106C . 106D etc. ( 1 ) in the RPR network 100 are associated. Alternatively or additionally, such stabilization of the forwarding rates in unbalanced traffic scenarios can be achieved.

4 shows an exemplary control process 400 for bandwidth allocation in a Resilient Packet Ring network according to one or more example implementations. The process 400 and other processes described herein undergo various functional blocks or steps that may be described as processing steps, functional operations, events, and / or actions that may be performed by hardware, software, and / or firmware. It should be clear to the person skilled in the art that numerous alternatives to the in 3 shown function blocks in various implementations can be realized. While, for example, the process 400 as in 4 As shown in a particular order of blocks or steps, the subject invention is not limited to the order of blocks or steps shown here, or even to any particular order. Accordingly also can not in 4 shown inserted and / or additionally provided and / or can some of the steps of 4 be omitted without, therefore, the scope of the invention is abandoned.

As shown, the control process can 400 can be implemented to allocate bandwidth in a Resilient Packet Ring network. In block 401 is the transit queue length Q (s) 402 with the destination queue length Q _T 404 compared. For example, an error E (s) 406 determined to make such a comparison of the transit queue length Q (s). 402 with the destination queue length Q _T 404 to quantify. In one implementation, the error E (s) 406 be determined, at least in part, on the basis of the following equation: E (s) = Q _T (s) - Q (s) (Equation 1)

The processing proceeds from block 401 to block 408 away where a fair rate F (s) 410 based at least in part on the comparison between the transit queue length Q (s) 402 and the destination queue length Q _T 404 can be determined. For example, the error E (s) 406 modified at least in part on the basis of a proportional gain k _p such that a fair rate F (s) 410 as in block 408 is shown. In one implementation, the fair rate F (s) 410 be determined, at least in part, on the basis of the following equation: F (s) = k _p e (s) (Equation 2)

The processing proceeds from block 408 to block 412 where an updated transit queue length Q (s) 402 can be determined. For example, the updated transit queue length Q (s) 402 based at least in part on the fair rate F (s) 410 be determined. In one implementation, the fair rate F (s) 410 be modified based at least in part on the following equation to obtain an updated transit queue length Q (s) 402 to determine:

The block 412 of the tax process 400 is in 4 where W can represent a sum of weights associated with different nodes of an RPR network, as follows:

In addition, τ _i may be the round-trip delay between a bottleneck link 108 ( 1 ) and a source node i of an RPR network. Such a round-trip delay τ _i may be a period of time between the initiation of communications at the downstream node 106B ( 1 ) and the reception at the upstream node 106A ( 1 ) represented by a backward delay τ b / i and may be a period of time between the initiation of communications at the upstream node 106A ( 1 ) and receiving communications at the downstream node 106B ( 1 ) represented by a forward delay τ f / i is reproduced. For example, the round-trip delay τ _{i may be given} by τ _i = τ b / i + τ f / i are calculated, where τ b / i a backward delay from a bottleneck link 108 ( 1 ) to a source node i and τ f / i a forward delay from a source node i to a bottleneck link 108 ( 1 ). In one implementation, τ may represent an upper bound of such round-trip delay τ _i .

The tax process 400 is explained by the following explanations to the formation of the tax process 400 further clarified. At one with a downstream node 106B ( 1 ) associated bottleneck link 108 ( 1 ) may be a rate of change of a transit queue length 402 as follows:

In this case, r _i may be a transmission rate of a source node i, such as an upstream node 106A ( 1 ), τ f / i the forward delay from the source node i to the bottleneck link 108 ( 1 ), t can represent the time, N can represent the number of source nodes, and C can represent the available bandwidth of the bottleneck link 108 ( 1 ) associated subordinate node 106B ( 1 ) play. For example, the rate of change of a transit queue length 402 proportional to the traffic coming from upstream source node i through the one with the downstream node 106B ( 1 ) associated bottleneck link 108 ( 1 ) when the available bandwidth C and the forward delay τ f / i be taken into account.

One or more source nodes i such as the upstream node 106A ( 1 ) can receive information at a rate in accordance with a received fair rate f from that with a downstream node 106B ( 1 ) associated bottleneck link 108 ( 1 ) send as follows: r _i (t) = w _i f (t - τ b / i) (Equation 6)

In this case, w _{i can represent} a weight less than or equal to 1 and can be τ b / i the backward delay from one to a downstream node 106B ( 1 ) associated bottleneck link 108 ( 1 ) to a source node i such as the upstream node 106A ( 1 ) play.

A fair rate f (t) for one with a downstream node 106B ( 1 ) associated bottleneck link 108 ( 1 ) can be represented as follows: f (t) = k _p e (t) (Equation 7)

In such a case, k _p may represent a proportional gain for a P-controller, and e (t) = q _T -q (t) may represent a difference between a transit queue length q (t) and a destination queue length q _T.

und

In diesem Fall kann f* eine optimale faire Rate wiedergeben. Die Gleichung 5 an dem ausgeglichenen Punkt kann also wie folgt sein:

The RPR network 100 ( 1 ) may be considered as a closed-loop system having a balanced point in which

and

In this case, f * can represent an optimal fair rate. The equation 5 at the balanced point can thus be as follows:

In this case, r * may represent an optimal rate at which individual source nodes i such as an upstream node 106A ( 1 ) by one with a downstream node 106B ( 1 ) associated bottleneck link 108 ( 1 ).

Using Equation 8 and Equation 6, the following can be obtained:

In this case, it can be seen from Equation 9 that the P-controller achieves the following weighted maximum / minimum fair rates:

In addition to the above-described weighted maximum / minimum fair rates of Equation 10, stability conditions can be found for control gains including a proportional gain k _p for a P-controller. Using Equation 5 and Equation 6, the following can be obtained:

In this case, τ _i = τ b / i + τ f / i a round-trip time between a source node i such as an upstream node 106A ( 1 ) and one with a downstream node 106B ( 1 ) associated bottleneck link 108 ( 1 ) play.

Using the Laplace transform of Equation 8 and Equation 11, the following Equations 2 and / or 3 discussed above can be obtained: F (s) = k _p e (s) (Equation 2) and

For the sake of simplicity, a round-trip delay τ _i = τ, ∀ i ε N can be assumed. In this case, τ can represent an upper limit of the round-trip delay τ _i . Accordingly, the control process 400 be formulated, at least in part, on the basis of Equation 2, Equation 3, and / or Equation 1.

The tax process 400 from 4 can be at least partially represented by a characteristic equation in the Laplace domain as follows:

kann die folgende Gleichung erhalten werden: k_pWcos(ωτ) – jk_pWsin(ωτ) = –jω (Gleichung 13) By substituting the following equations s = jω and

the following equation can be obtained: k _p Wcos (ωτ) -jk _p Wsin (ωτ) = -jω (Equation 13)

After algebraic manipulation, the following conditions under which a closed-loop system can be stable can be obtained, at least in part, on the basis of Equation 13 given above. 0 <k _p <π / 2Wπ (Equation 14)

In this case, W may be a sum of with source node i of the RPR network 100 ( 1 ), and τ may be an upper limit of such a round-trip delay τ _i, for example between one with a downstream node 106B the RPR network 100 ( 1 ) associated bottleneck link 108 ( 1 ) and an upstream node 106A ( 1 ) of the RPR network 100 ( 1 ) play. Accordingly, determining a fair rate, as explained below, may be based, at least in part, on a round-trip delay τ _i between a bottleneck link 108 ( 1 ) of the RPR network 100 ( 1 ) and at least one source node i of the RPR network 100 ( 1 ).

A discrete implementation of the P-controller may be arranged to account for the occurrence of sampling at non-continuous times. Such an implementation of the P-controller in a discrete time may be based, at least in part, on a derivative of Equation 7 in the real-time domain, and may be expressed as follows: F (n) = F (n-1) -k _p (e (n) -e (n-1)) (Equation 15)

In this case, F (n) may represent a current fair rate, n may represent a sample time, F (n-1) may represent a previous fair rate, k _{p may represent} a proportional gain, e (n) may be a difference between a Reflect destination queue length and current transit queue length, and may represent e (n-1) a preceding difference between a destination queue length and a current transit queue length. Accordingly, determining a fair rate F (n) may be based, at least in part, on a difference between the destination queue length and a current transit queue length. Additionally or alternatively, a determination of a fair rate F (n) may be based, at least in part, on a rate of change of a difference between the destination queue length and a current transit queue length.

5 is a diagram that is an example of an unbalanced traffic scenario 500 according to the invention shows. A how with respect to 2 and 4 described P-controller 222 can be one or more with nodes 106A . 106B etc. in an RPR network 100 Stabilize associated forwarding rates in unbalanced traffic scenarios. By "unbalanced traffic scenarios" are meant here scenarios in which a variation in the information rates of upstream nodes 106A etc. is given. For example, in an unbalanced traffic scenario, one or more information rates may be from upstream nodes 106A be greedy while at the same time one or more Information rates from the upstream nodes 106A etc. are not greedy and have about a certain predetermined rate.

In the exemplary unbalanced traffic scenario 500 can be a flow from a first node 502 to a third node 506 be greedy while having a flow from a second knot 504 to a third node 506 may have a low rate. For example, the flow from the second node 504 to the third node 506 have a low rate of 50 megabits per second (Mbps). A link 508 between the first node 502 and the second node 504 and a link 510 between the second node 504 and the third node 506 can have a fixed capacity of about 622 Mbps. In the unbalanced traffic scenario 500 may be the second node 504 be overloaded when the sum of the rate of flow 512 from the second node 504 to the third node 506 and from the rate of the river 514 from the first node 502 to the third node 506 greater than the capacity of the link 510 between the second node 504 and the third node 506 is. In this case, the link 510 may be a bottleneck link and may be the second node 504 an updated fair rate to the upstream nodes, such as the first node 502 send. In the exemplary unbalanced traffic scenario 500 can the forward delay τ f / i reflect the amount of time that a packet takes to get from the first node 502 to the STQ buffer 216 ( 2 ) of the second node 504 to go while the backward delay τ b / i the time period between the initiation of communication of an updated fair rate at the second node 504 and receiving them at the first node 502 can play.

6 is a diagram illustrating an example unbalanced traffic scenario 600 according to the invention shows. In this exemplary unbalanced traffic scenario 600 are ten nodes 601 - 610 intended. In the unbalanced traffic scenario 600 reject all links 612 the same capacity of about 622 Mbps and rejects each link 612 a propagation delay of 0.1 ms. All forwarding rate flows are UDP flows, with all flows starting at time zero. The rivers 614 . 616 and 618 are greedy, while the river 622 has a rate equal to 50 Mbit / s. In the unbalanced traffic scenario 600 may be an unbalanced traffic at the link 624 occur. Without the use of a P-controller 222 ( 2 ) may oscillate during operation due to unbalanced traffic at the link 624 occur. Such oscillation can lead to bandwidth loss. In addition, without the use of the P-controller 222 ( 2 ) due to an overload the lengths of several with the nodes 601 - 610 associated transit queues grow larger.

The diagram 700 from 7 shows the throughput in time in an exemplary unbalanced traffic scenario 500 according to the invention. As shown, the forwarding rate flows 512 and 514 be brought together at their correspondingly stabilized, optimal fair rates. A "stabilized" state is a state of little or no oscillation in continuous operation.

The diagram 800 from 8th shows the throughput in time in an exemplary unbalanced traffic scenario 600 according to the invention. In the simulation results of 8th the measurement time interval was set to T = 1 ms and the target length of the transit queue was set to q _T = STQ size / 16 set. The simulation results of 8th were obtained using an RPR simulator as described in S. Gjessing, "The Simula RPR Simulator Implemented in Java", Simula Research Laboratory Technical Report 2003-12, December 2003 is described. As in 8th shown, the rivers can 614 - 620 and the river 622 be brought together in their correspondingly stabilized, optimal fair rates in continuous operation.

9 shows an exemplary computer program product 900 according to the invention. The program product 900 can be a signal carrier medium 902 include. The signal carrier medium 902 can be one or more machine-readable commands 904 which, when executed by one or more processors, cause a computing device to perform the above with reference to 3 and or 4 performs functions described. With reference to the system of 2 can the P-controller 222 So one or more of the in 3 and or 4 shown steps in response to commands 904 from the medium 902 To run.

In some implementations, the signal carrying medium 902 a computer readable medium 906 such as a hard disk drive, a CD, a DVD, a digital tape, a memory, etc. In some implementations, the signal carrying medium 902 a recordable medium 908 such as a memory, a rewritable CD, a rewritable DVD, and so on. In some implementations, the signal carrying medium 902 a communication medium 910 such as a digital and / or analog communication medium (eg, a fiber optic cable, a waveguide, a wired communication link, a wireless communication link, etc.).

10 FIG. 12 is a block diagram illustrating an exemplary computing device. FIG 1000 according to the invention shows. In an exemplary configuration 1001 can the computing device 1000 one or more processors 1010 and a system memory 1020 contain. A memory bus 1030 can for communication between the processor 1010 and the system memory 1020 be used.

Depending on the desired configuration, the processor 1010 of any type, such as a microprocessor (μP), a microcontroller (μC), a digital signal processor (DSP), or a combination thereof. The processor 1010 can have one or more cache levels with about a level 1 cache 1011 and a level 2 cache 1012 , a processor core 1013 and registers 1014 contain. The processor core 1013 may include an arithmetic logic unit (ALU), a floating point unit (FPU), a digital signal core (DSP core), or a combination thereof. A memory controller 1015 can in conjunction with the processor 1010 to be used, the memory controller 1015 in some implementations, an integrated part of the processor 1010 can be.

Depending on the desired configuration, the system memory 1020 of any type, such as volatile memory (such as RAM), non-volatile memory (such as ROM, flash memory, etc.), or a combination thereof. The system memory 1020 can be an operating system 1021 , one or more applications 1022 and program data 1024 contain. The application 1022 may be a bandwidth allocation algorithm 1023 in a Resilient Packet Ring network include the features described here including the function blocks and / or steps of the process 300 from 3 and / or the process 400 from 4 perform. The program data 1024 can data 1025 for use in the bandwidth allocation algorithm, which may be, for example, data for indicating one or more transit queue lengths. In some example embodiments, the application 1022 be provided with program data 1024 on an operating system 1021 so that implementations for bandwidth allocation may be provided as described herein. For example, the RPR node 106B all or part of the computing device 1000 may include all or part of the application 1022 in such a way that the implementations for a bandwidth allocation can be provided as described herein. The basic configuration described is in 10 through the inside of the dashed line 1001 enclosed components formed.

The computing device 1000 may have additional features or functions as well as additional interfaces for communications between the basic configuration 1001 and other required devices and interfaces. For example, a bus / interface controller 1040 can be used to communicate between the basic configuration 1001 and one or more data storage devices 1050 via a memory interface bus 1041 to enable. The data storage devices 1050 can removable storage devices 1051 , non-removable storage devices 1052 or a combination of them. Examples of removable and non-removable storage devices include magnetic disk devices such as floppy disk drives or hard disk drives, optical disk drives such as CD or DVD drives, solid state drives (SSD), and tape drives. Exemplary computer storage media may include volatile and nonvolatile, removable and non-removable media that may be implemented by any method or technique for storing information such as computer readable instructions, data structures, program modules, or other data.

The system memory 1020 , the removable storage 1051 and the non-removable memory 1052 are all examples of computer storage media. Computer storage media include RAMs, ROMs, EEPROMs, flash memory or other storage technologies, CD-ROMs, DVDs or other optical storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, and any other media that may be used to store desired information by the computing device 1000 can be accessed. Such a computer storage medium may be part of the device 1000 be.

The computing device 1000 can be an interface bus 1042 for establishing communication from various interface devices (eg, output interfaces, peripheral interfaces, and communication interfaces) to the basic configuration 1001 over the bus / interface controller 1040 include. Exemplary output interfaces 1060 are a graphics processing unit 1061 and an audio processing unit 1062 , which may be configured to interface with various external devices such as a display or speakers via one or more A / V ports 1063 to communicate. Exemplary peripheral interfaces 1060 can be a serial interface controller 1071 or a parallel one Interface Controller 1072 , which may be configured to communicate with external devices such as input devices (eg, a keyboard, a mouse, a stylus, a voice input device, a touch input device, etc.) or other peripheral devices (eg, a printer, a scanner, etc .) via one or more I / O ports 1073 to communicate. An exemplary communication interface 1080 includes a network controller 1081 which may be arranged to communicate with one or more other computing devices 1090 by means of network communication via one or more communication ports 1082 to enable. A communication connection is an example of a communication medium. Communication media may usually be embodied by computer readable instructions, data structures, program modules, or other data in a modulated data signal, such as a carrier wave or other transport mechanism, and may include any information transfer media. A "modulated data signal" may be a signal having one or more characteristics that are set or changed so that information in the signal may be encoded. Examples of communication media include a wired network or direct wired connection, and wireless media such as acoustic, radio frequency, infrared or other wireless media. As a computer-readable medium, both a storage medium and a communication medium may be referred to here.

The computing device 1000 can be implemented as a part of a small-size, portable (mobile) electronic device such as a mobile phone, a PDA, a personal media player, a wireless Internet device, a personal headset, an application-specific device or a hybrid device with any of the above functions. The computing device 1000 can also be implemented as a PC with a laptop or non-laptop configuration. Furthermore, the computing device 1000 as part of a radio base station or other wireless system or other wireless device such as that described above with reference to FIG 2 described node 106B be implemented.

Some portions of the above detailed description refer to algorithms or symbolic representations of operations on data bits or binary digital signals stored in a computing system memory such as a computer memory. These algorithmic descriptions are used by the data processing professional to present the content of his work to other professionals. An algorithm is to be understood here as well as generally as an independent sequence of operations or similar processing leading to a desired result. In this context, the operations or processes involve a physical manipulation of physical quantities. Typically, such quantities take the form of electrical or magnetic signals that can be stored, transferred, combined, compared, or otherwise manipulated. It has been found to be practical and a convention to designate such signals as bits, data, values, elements, symbols, characters, terms, numbers or the like. It should be clear, however, that behind all these or similar terms, there are physical quantities in each case and it is merely a practical paraphrase. Unless otherwise stated herein, throughout the following description, terms such as "processing," "computing," "determining," or the like are used to describe actions or processes of a computing device to manipulate or transform data that is referred to as physical electronic or magnetic quantities Store, registers or other information storage devices, transmission devices or display devices of the computing device are reproduced.

The claimed subject matter is not limited to the implementations described herein. For example, hardware implementations operating on a device or on a combination of devices are also possible. But there are also implementations in software and / or hardware possible. Some implementations may include one or more articles, such as a signal carrying medium and / or a storage medium. Storage media such as CD-ROMs, hard disks, flash memories, or the like, may, for example, contain instructions stored thereon that, when executed by a computing device such as a computing system, computing platform, or other system, may cause a processor to respond in accordance with that claimed subject matter as operated in one of the previously described implementations. A computing device may include one or more processing units or processors, one or more input / output devices such as a display, a keyboard and / or a mouse, and one or more memory such as static RAM, dynamic RAM, flash memory, and / or. or a hard disk.

Hardware and software implementations provide the same results, with the decision to use hardware or software generally in terms of cost and desired Efficiency (in some contexts, however, the choice between hardware and software may be important for other reasons). The processes and / or systems and / or other techniques described herein may be implemented in a variety of ways (eg, hardware, software, and / or firmware), the preferred implementation depending on the context in which the processes and / or or systems and / or other techniques. For example, if a developer determines that speed and accuracy are paramount, the developer may choose to implement hardware and / or firmware. In contrast, if flexibility is crucial, the developer can opt for a software-implemented implementation in particular. But there are also different combinations of hardware, software and / or firmware possible.

In the detailed description given above, various embodiments of the devices and / or processes have been explained with reference to block diagrams, flowcharts, and / or examples. To the extent that these block diagrams, flowcharts, and / or examples indicate one or more functions and / or operations, it should be apparent to those skilled in the art that the functions and / or operations in the block diagrams, flow diagrams, or examples individually and / or collectively by hardware, software, firmware or any combinations thereof can be realized. In one embodiment, various portions of the described subject matter may be implemented by application specific integrated circuits (ASICs), field programmable integrated circuits (FPGAs), digital signal processors (DSPs), or other integrated formats. However, it should be apparent to those skilled in the art that some aspects of the embodiments described herein are fully or partially embodied as integrated circuits, as one or more computer programs for execution on one or more computers (eg, as one or more programs for execution on one or more computers multiple computer systems), as one or more programs for execution on one or more processors (eg, as one or more programs for execution on one or more microprocessors), as a firmware, or any combination thereof, can be realized; one skilled in the art can, based on the teachings herein, design the circuitry and / or write the code for the software and / or firmware. In addition, it should be apparent to those skilled in the art that the mechanisms of the subject matter described herein may be variously distributed in the form of a computer product, the embodiments of the subject matter described herein being independent of the particular type of signal carrying medium used for the actual transmission of the distribution becomes. Examples of a signal carrying medium include a recording medium such as a floppy disk, a hard disk, a CD, a DVD, a digital tape, a computer memory, etc., or a transmission medium such as a digital and / or analog communication medium (eg, a fiber optic cable) Waveguide, a wired communication link, a wireless communication link, etc.).

It should be apparent to those skilled in the art that it is common practice in the art to describe devices and / or processes as used herein, and then to use various development approaches to integrate the devices and / or processes described herein into data processing systems. At least a portion of the devices and / or processes described herein may be integrated into a data processing system through a reasonable amount of experimentation. It should be appreciated by those skilled in the art that a typical data processing system generally includes one or more of: a system unit housing, a video display device, memory such as volatile or nonvolatile memory, processors such as microprocessors and digital signal processors, computing devices such as operating systems, Drivers, graphical user interfaces and application programs, one or more interaction devices such as a touchpad or a touch screen, and / or control systems including control loops and control motors (eg, a control loop for detecting position and / or speed, and control motors for moving and / or or adjusting components and / or sizes). A typical data processing system may be implemented using any of the commercially available components commonly used in systems and / or networks for computing and communicating data.

The subject matter described herein is sometimes illustrated as including or being associated with various components or elements in other components or elements. It should be noted that the architectures described herein are exemplary only and that many other architectures can be implemented to achieve the same functions. In a conceptual sense, any arrangement of components can be effectively associated with one another to achieve the desired functions. Accordingly, any two components that are combined together to perform a particular function may be considered to be "associated with one another" such that the desired function is satisfied regardless of the architectures or intermediate components used. Furthermore, any two components so associated may be considered " operatively linked "or" operatively linked "for the performance of a desired function. And any two components that may be so associated may be considered "operably coupleable" for the performance of the desired function. Examples of operatively connectable components are components that can physically, wirelessly and / or logically interact with each other.

As for the use of the singular and / or plural forms of units in the present specification, it should be apparent to those skilled in the art that various contexts and / or applications may be substituted for the singular and plural forms. Occasionally, attention is drawn to the possible change between singular and plural forms.

It should be apparent to those skilled in the art that the terminology used herein is to be interpreted generally in a broad sense, particularly in the appended claims (eg, the phrase "contains" is generally to be construed as "includes, but is not limited to" and is the phrase "has" as "at least indicates", etc). Furthermore, the person skilled in the art should note that in the claims only a certain number of elements can be assumed, if this is expressly stated. If no quantities are given, the amount of elements is not restricted. For example, in the appended claims, the phrase "at least one" or "one or more" may be used. However, this does not mean that the use of indefinite articles in other places can only be assumed to be a single entity (ie, the use of the indefinite article should also be interpreted as "at least one" or "one or more"). The same applies to certain items. And even if a certain number is mentioned, it should be clear to those skilled in the art that this number is to be interpreted as a minimum number (ie when talking about "two" units, this is considered to be "at least two" units or "two or more" units) interpret). And if the wording "A, B and / or C" is chosen, this is to be interpreted in accordance with the general convention such that, for example, "a system with A, B and / or C" is a system with only A, only B , only C, A and B, A and C, B and C, or A, B and C may be. Furthermore, it should be noted by those skilled in the art that in juxtaposition of two alternative units in the specification, claims, and drawings, it is to be understood that either only one or both of the units may be provided. Thus, the phrase "A or B" is to be understood such that only A, B only or A and B may be provided.

It should also be noted that an "optimization" can be maximization and / or minimization. Minimization may result in a global minimum, a local minimum, an approximate global minimum, and / or an approximate local minimum. Similarly, maximization may result in a global maximum, a local maximum, an approximate global maximum, and / or an approximate local maximum.

Whenever one or more implementations are referred to in the present description, this means that a particular feature, construct, or characteristic may be included in at least some implementations but not necessarily in all implementations. The various terms of one or more implementations in the present specification are not necessarily related to the same implementations.

Certain exemplary techniques are described and shown herein, it being understood by those skilled in the art that various modifications may be made to the described embodiments, or equivalent constructions or procedures may be utilized without departing from the scope of the invention. Thus, many modifications may be made to adapt a particular situation to the teachings of the claimed subject matter without, however, departing from the inventive concept described herein. The scope of the invention is not limited by the examples described herein but is defined by the appended claims and their equivalents.

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited non-patent literature

• S. Gjessing, "The Simula RPR Simulator Implemented in Java", Simula Research Laboratory Technical Report 2003-12, December 2003 [0072]

Claims (22)

A method implemented in a Resilient Packet Ring network, comprising the steps of: Determining a fair rate for providing allocated bandwidth in the Resilient Packet Ring network via a P-controller associated with at least one node of the Resilient Packet Ring network, and Stabilizing one or more forwarding rates associated with the at least one node of the Resilient Packet Ring network in unbalanced traffic scenarios based at least in part on the allocated bandwidth. The method of claim 1, wherein determining the fair rate comprises determining a difference between a destination queue length and a current transit queue length. The method of claim 1, wherein determining the fair rate comprises determining the rate of change of a difference between a destination queue length and a current transit queue length. The method of claim 1, wherein determining the fair rate comprises determining a round-trip delay between a bottleneck link of the Resilient Packet Ring network and the at least one node of the Resilient Packet Ring network. The method of claim 1, wherein determining a fair rate is based at least in part on a proportional gain kp expressed as follows: 0 <k _p <π / 2Wτ where W is a sum of weights associated with the nodes of the Resilient Packet Ring network and τ is at least partially due to a round trip delay between a Bottleneck link of the Resilient Packet Ring network and the at least one node of the Resilient Packet Ring network based. The method of claim 1, wherein the fair rate F (n) is expressed as follows: F (n) = F (n-1) -k _p (e (n) -e (n-1)) where F (n-1) is a preceding fair rate, k _{p is} a proportional gain, e (n) is a difference between a destination queue length and a current transit queue length, and e (n-1) is a preceding difference between the destination queue length and a current one Transit queue length is. The method of claim 1, wherein the fair rate F (n) is expressed as follows: F (n) = F (n-1) -k _p (e (n) -e (n-1)) where F (n-1) is a preceding fair rate, k _{p is} a proportional gain, e (n) is a difference between a destination queue length and a current transit queue length, and e (n-1) is a preceding difference between the destination queue length and a current one Transit queue length, and where the proportional gain k _p is expressed as follows: 0 <k _p <π / 2Wτ where W is a sum of weights associated with the nodes of the Resilient Packet Ring network and τ is at least partially due to a round trip delay between a Bottleneck link of the Resilient Packet Ring network and the at least one node of the Resilient Packet Ring network based. An article for use with a Resilient Packet Ring network, comprising: a signal carrying medium containing machine-readable instructions stored thereon that when executed by one or more processors cause a computing device to operatively perform the steps of: Determining a fair rate for providing an allocated bandwidth in the Resilient Packet Ring network via a P-controller associated with at least one node of the Resilient Packet Ring network, and stabilizing one or more with the at least one node of the Resilient Packet Ring network. Network associated forwarding rates in unbalanced traffic scenarios based at least in part on the allocated bandwidth. The article of claim 8, wherein determining a fair rate is based at least in part on a difference between a destination queue length and a current transit queue length. The article of claim 8, wherein determining a fair rate is based at least in part on the rate of change of a difference between a destination queue length and a current transit queue length. The article of claim 8, wherein determining a fair rate is based, at least in part, on a round-trip delay between a bottleneck link of the Resilient Packet Ring network and the at least one node of the Resilient Packet Ring network. The article of claim 8, wherein determining a fair rate is based at least in part on a proportional gain k _p expressed as follows: 0 <k _p <π / 2Wτ where W is a sum of weights associated with the nodes of the Resilient Packet Ring network and τ is at least partially due to a round trip delay between a Bottleneck link of the Resilient Packet Ring network and the at least one node of the Resilient Packet Ring network based. An article according to claim 8, wherein the fair rate F (n) is expressed as follows: F (n) = F (n-1) -k _p (e (n) -e (n-1)) where F (n-1) is a preceding fair rate, k _{p is} a proportional gain, e (n) is a difference between a destination queue length and a current transit queue length, and e (n-1) is a preceding difference between the destination queue length and a current one Transit queue length is. An article according to claim 8, wherein the fair rate F (n) is expressed as follows: F (n) = F (n-1) -k _p (e (n) -e (n-1)) where F (n-1) is a preceding fair rate, k _{p is} a proportional gain, e (n) is a difference between a destination queue length and a current transit queue length, and e (n-1) is a preceding difference between the destination queue length and a current one Transit queue length, and where the proportional gain k _p is expressed as follows: 0 <k _p <π / 2Wτ where W is a sum of weights associated with the nodes of the Resilient Packet Ring network and τ is at least partially due to a round trip delay between a Bottleneck link of the Resilient Packet Ring network and the at least one node of the Resilient Packet Ring network based. A Resilient Packet Ring network comprising: a plurality of nodes, an inner ring of links associated with the plurality of nodes, an outer ring of links associated with the plurality of nodes, and a P-controller; associated with at least one of the plurality of nodes, the P-controller configured to: determine a fair rate for providing an allocated bandwidth in the Resilient Packet Ring network, and Stabilizing one or more forwarding rates associated with the at least one of the plurality of nodes of the Resilient Packet Ring network in unbalanced traffic scenarios based at least in part on the allocated bandwidth. The resilient packet ring network of claim 15, wherein said determining a fair rate is based, at least in part, on a proportional gain k _p expressed as follows: 0 <k _p <π / 2Wτ where W is a sum of weights associated with the nodes of the Resilient Packet Ring network and τ is at least partially due to a round trip delay between a Bottleneck link of the Resilient Packet Ring network and the at least one node of the Resilient Packet Ring network based. The resilient packet ring network of claim 15, wherein the fair rate F (n) is expressed as follows: F (n) = F (n-1) -k _p (e (n) -e (n-1)) where F (n-1) is a preceding fair rate, k _{p is} a proportional gain, e (n) is a difference between a destination queue length and a current transit queue length, and e (n-1) is a preceding difference between the destination queue length and a current one Transit queue length is. The resilient packet ring network of claim 15, wherein the fair rate F (n) is expressed as follows: F (n) = F (n-1) -k _p (e (n) -e (n-1)) where F (n-1) is a preceding fair rate, k _{p is} a proportional gain, e (n) is a difference between a destination queue length and a current transit queue length, and e (n-1) is a preceding difference between the destination queue length and a current one Transit queue length, and where the proportional gain k _p is expressed as follows: 0 <k _p <π / 2Wτ where W is a sum of weights associated with the nodes of the Resilient Packet Ring network and τ is at least partially due to a round trip delay between a Bottleneck link of the Resilient Packet Ring network and the at least one node of the Resilient Packet Ring network based. Device for use with a Resilient Packet Ring network comprising: a P-controller associated with at least one of a plurality of nodes in the Resilient Packet Ring network, the P-controller configured to: Determining a fair rate for providing an allocated bandwidth in the Resilient Packet Ring network, and Stabilizing one or more forwarding rates associated with the at least one of the plurality of nodes of the Resilient Packet Ring network in unbalanced traffic scenarios based at least in part on the allocated bandwidth. The apparatus of claim 19, wherein the P-controller is further configured to determine the fair rate based at least in part on a proportional gain k _p , which is expressed as follows: 0 <k _p <π / 2Wτ where W is a sum of weights associated with the nodes of the Resilient Packet Ring network and τ is at least partially due to a round trip delay between a Bottleneck link of the Resilient Packet Ring network and the at least one node of the Resilient Packet Ring network based. The apparatus of claim 19, wherein the fair rate F (n) is expressed as follows: F (n) = F (n-1) -k _p (e (n) -e (n-1)) where F (n-1) is a preceding fair rate, k _{p is} a proportional gain, e (n) is a difference between a destination queue length and a current transit queue length, and e (n-1) is a preceding difference between the destination queue length and a current one Transit queue length is. The apparatus of claim 19, wherein the fair rate F (n) is expressed as follows: F (n) = F (n-1) -k _p (e (n) -e (n-1)) where F (n-1) is a preceding fair rate, k _{p is} a proportional gain, e (n) is a difference between a destination queue length and a current transit queue length, and e (n-1) is a preceding difference between the destination queue length and a current one Transit queue length, and where the proportional gain k _p is expressed as follows: 0 <k _p <π / 2Wτ where W is a sum of weights associated with the nodes of the Resilient Packet Ring network and τ is at least partially due to a round trip delay between a Bottleneck link of the Resilient Packet Ring network and the at least one node of the Resilient Packet Ring network based.

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