DE102013213135B3 - Method for establishing connection between e.g. diode and substrate, involves positioning semiconductor chip on corresponding preform, so that semiconductor chip is held on preform through adhesion force produced by liquid - Google Patents
Method for establishing connection between e.g. diode and substrate, involves positioning semiconductor chip on corresponding preform, so that semiconductor chip is held on preform through adhesion force produced by liquid Download PDFInfo
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- DE102013213135B3 DE102013213135B3 DE201310213135 DE102013213135A DE102013213135B3 DE 102013213135 B3 DE102013213135 B3 DE 102013213135B3 DE 201310213135 DE201310213135 DE 201310213135 DE 102013213135 A DE102013213135 A DE 102013213135A DE 102013213135 B3 DE102013213135 B3 DE 102013213135B3
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- preform
- substrate
- liquid
- semiconductor chip
- metallization
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
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- B23K26/32—Bonding taking account of the properties of the material involved
- B23K26/323—Bonding taking account of the properties of the material involved involving parts made of dissimilar metallic material
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- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
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- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13062—Junction field-effect transistor [JFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/20—Parameters
- H01L2924/201—Temperature ranges
- H01L2924/2011—Temperature range 400 C=<T<450 C, 673.15K =<T< 723.15K
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10166—Transistor
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10174—Diode
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/0415—Small preforms other than balls, e.g. discs, cylinders or pillars
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- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
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Abstract
Description
Die Erfindung betrifft die Herstellung von Leistungshalbleitermodulen, insbesondere das Weichlöten von Leistungshalbleiter-Chips auf ein Leistungshalbleiter-Substrat.The invention relates to the production of power semiconductor modules, in particular the soldering of power semiconductor chips on a power semiconductor substrate.
Beim Verbinden von leistungselektronischen Bauelementen mit einem Träger (z. B. Leistungselektronik-Substrat oder Leiterplatte) durch Weichlöten muss vor dem oder während dem Lötprozess Lotmaterial auf den Träger oder das Bauelement aufgebracht werden. Die Art der Aufbringung hängt hierbei von Faktoren wie der der Zugänglichkeit der Lötstelle und der Bauteilgeometrie ab. Auch die unterschiedliche Wirtschaftlichkeit verschiedener Verfahren können ein Kriterium für die Wahl der Aufbringung des Lotmaterials sein. Bekannte Löt-Verfahren verwenden beispielsweise eine druckbare Lötpaste, welche an der Lötposition auf den Träger aufgedruckt wird. Hierbei können direkt druckende Systeme zum Einsatz kommen als auch Systeme, bei denen die Kontur über eine Schablone bzw. ein Sieb vorgegeben wird. Nach dem Drucken der Lötpaste auf den Träger und vor dem eigentlichen Lötprozess wird der Träger mit den zu lötenden Bauelementen (z. B. Silizium-Chips) bestückt, wobei durch die adhäsive Wirkung der Lötpaste die Bauelemente an ihrer Soll-Position gehalten werden.When connecting power electronic components to a carrier (eg power electronics substrate or printed circuit board) by soldering, solder material must be applied to the carrier or the component before or during the soldering process. The type of application depends on factors such as the accessibility of the solder joint and the component geometry. Also, the different economics of different methods may be a criterion for the choice of application of the solder material. Known soldering methods use, for example, a printable solder paste which is printed on the carrier at the soldering position. In this case, direct printing systems can be used as well as systems in which the contour is specified via a template or a sieve. After the solder paste has been printed on the carrier and before the actual soldering process, the carrier is equipped with the components to be soldered (eg silicon chips), the components being held in their desired position by the adhesive effect of the solder paste.
Die Verwendung druckbarer Lötpasten ermöglicht eine hohe Produktivität, jedoch hat die Verwendung von Lot in pastöser Form anstatt eines festen Lots auch Nachteile. Bei bestimmten Anwendungen ist die Verwendung eines pastösen Lots nicht möglich. Alternativ kann das Lot in fester Form und in vorgefertigter Größe an die Lötposition gebracht werden. Zum Einsatz kommen häufig Verfahren, bei denen ein Lotformteil, ein sogenanntes „Preform” verwendet wird. Ein Preform besteht aus Lotmaterial und kann z. B. in Form einer Scheibe oder als Folie vorliegen. Zur Positionierung der Preforms auf dem Träger können z. B. Lötrahmen verwendet werden, durch deren Geometrie die Position des Preforms und der zu lötenden Bauelemente auf dem Träger definiert werden. Die Geometrie wird also durch den Lötrahmen bestimmt, und diese müssen bei der Fertigung unterschiedlicher Baugruppen entsprechend vorgehalten werden.The use of printable solder pastes allows high productivity, but the use of solder in pasty form rather than a solid solder also has disadvantages. In certain applications, the use of a pasty solder is not possible. Alternatively, the solder can be brought to the soldering position in solid form and in prefabricated size. Often methods are used, in which a solder preform, a so-called "preform" is used. A preform consists of solder material and can, for. B. in the form of a disk or as a film. For positioning of the preforms on the carrier can, for. As soldering frames are used, are defined by the geometry of the position of the preform and the components to be soldered on the carrier. The geometry is thus determined by the soldering frame, and these must be kept in the production of different modules accordingly.
Die
Die
Die
Die
Die der Erfindung zu Grunde liegende Aufgabe besteht darin ein Lötverfahren zur Verfügung zu stellen, welches für die Verwendung fester Preforms geeignet ist, jedoch keine Lötrahmen benötigt. Diese Aufgabe wird durch die Lötverfahren gemäß Anspruch 1 und 4 sowie die Verfahren zum Herstellen eines Leistungshalbleiter-Moduls gemaß Anspruch 9 und 10 gelöst. Unterschiedliche Ausgestaltungen und Weiterentwicklungen der Erfindung sind Gegenstand der abhängigen Ansprüche.The object underlying the invention is to provide a soldering method which is suitable for the use of solid preforms but does not require soldering frames. This object is achieved by the soldering method according to
Es wird ein Verfahren zum Herstellen einer Verbindung zwischen mindestens einem Halbleiter-Chip und einem Substrat mittels Weichlöten beschrieben. Gemäß einem ersten Beispiel der Erfindung umfasst das Verfahren das Bereitstellen eines Substrats mit einer Metallisierung und das Bereitstellen von mindestens einem Preform aus festem Lotmaterial. Das mindestens eine Preform wird auf einer korrespondierenden Lötposition auf der Metallisierung des Substrats positioniert und lokal an der Metallisierung des Substrat durch Laserschweißen befestigt. Mindestens ein Halbleiter-Chip wird auf dem korrespondierenden Preform positioniert, und im Anschluss erfolgt die Herstellung der Lötverbindung zwischen dem mindestens einen Halbleiter-Chip und der Metallisierung des Substrats durch Aufschmelzen des mindestens einen Preforms. Erfindungsgemäß wird auf das mindestens eine Preform oder auf den mindestens einen Halbleiter-Chip eine Flüssigkeit aufgebracht, sodass der auf dem Preform positionierte Halbleiter-Chip von einer durch die Flüssigkeit bewirkten Adhäsionskraft gehalten wird, wobei die dynamische Viskosität der Flüssigkeit weniger als 5 mPa s beträgt.A method is described for establishing a connection between at least one semiconductor chip and a substrate by means of soft soldering. According to a first example of the invention, the method comprises providing a substrate with a metallization and providing at least one preform of solid solder material. The at least one preform is positioned on a corresponding soldering position on the metallization of the substrate and locally fixed to the metallization of the substrate by laser welding. At least one semiconductor chip is positioned on the corresponding preform, and subsequently the solder connection is produced between the at least one semiconductor chip and the metallization of the substrate by melting the at least one preform. According to the invention, a liquid is applied to the at least one preform or to the at least one semiconductor chip so that the semiconductor chip positioned on the preform is held by an adhesion force caused by the liquid, the dynamic viscosity of the liquid being less than 5 mPa s ,
Gemäß einem zweiten Beispiel der Erfindung umfasst das Verfahren das Bereitstellen eines Substrats mit einer Metallisierung und das Bereitstellen von mindestens einem Preform aus festem Lotmaterial. Mindestens ein Halbleiter-Chip wird auf einem korrespondierenden Preform positioniert, und im Anschluss erfolgt die Herstellung der Lötverbindung zwischen dem mindestens einen Halbleiter-Chip und der Metallisierung des Substrats durch Aufschmelzen des mindestens einen Preforms. Erfindungsgemäß wird auf das mindestens eine Preform oder auf die Metallisierung an mindestens einer Lötposition eine Flüssigkeit aufgebracht. An jeder Lötposition auf der Metallisierung des Substrats wird ein Preform so positioniert, dass das mindestens eine Preform von einer durch die Flüssigkeit bewirkten Adhäsionskraft gehalten wird, wobei die dynamische Viskosität der Flüssigkeit weniger als 5 mPa s beträgt.According to a second example of the invention, the method comprises providing a substrate with a metallization and providing at least one preform of solid solder material. At least one semiconductor chip is positioned on a corresponding preform, and then the solder connection is made between the at least one semiconductor chip and the metallization of the substrate by melting the at least one preform. According to the invention is applied to the at least one preform or the metallization applied to at least one soldering position, a liquid. At each soldering position on the metallization of the substrate, a preform is positioned so that the at least one preform is held by an adhesive force caused by the liquid, the dynamic viscosity of the liquid being less than 5 mPa s.
Ein weiterer Aspekt der vorliegenden Beschreibung betrifft ein Verfahren zum Herstellen eines Leistungshalbleiter-Moduls. Gemäß einem weiteren Beispiel der Erfindung umfasst das Verfahren das Bereitstellen einer metallischen Bodenplatte des Leistungshalbleiter-Moduls, das Bereitstellen eines Leistungselektronik-Substrats mit mindestens einem darauf angeordneten Halbleiter-Chip sowie das Bereitstellen eines Preforms aus festem Lotmaterial. Das Preform wird auf einer korrespondierenden Lötposition auf der Bodenplatte positioniert und lokal an der Bodenplatte durch Laserschweißen befestigt. Das Leistungselektronik-Substrat wird auf dem auf der Bodenplatte befestigten Preform positioniert. Schließlich erfolgt die Herstellung der Lötverbindung zwischen dem Leistungselektronik-Substrats und der Bodenplatte durch Aufschmelzen des Preforms.Another aspect of the present description relates to a method of manufacturing a power semiconductor module. According to another example of the invention, the method comprises providing a metallic bottom plate of the power semiconductor module, providing a power electronics substrate having at least one semiconductor chip disposed thereon, and providing a preform of solid solder material. The preform is positioned on a corresponding soldering position on the bottom plate and fixed locally to the bottom plate by laser welding. The power electronics substrate is positioned on the preform attached to the bottom plate. Finally, the production of the solder joint between the power electronics substrate and the bottom plate by melting the preform.
Erfindungsgemäß wird auf ein Preform oder auf die Bodenplatte eine Flüssigkeit aufgebracht und das Preform wird auf einer korrespondierenden Lötposition auf der Bodenplatte so positioniert, dass das Preform von einer durch die Flüssigkeit bewirkten Adhäsionskraft gehalten wird, wobei die dynamische Viskosität der Flüssigkeit weniger als 5 mPa s beträgt.According to the invention, a liquid is applied to a preform or to the bottom plate and the preform is positioned on a corresponding soldering position on the bottom plate so that the preform is held by an adhesive force caused by the liquid, the dynamic viscosity of the liquid being less than 5 mPa s is.
Gemäß einem weiteren Beispiel der Erfindung umfasst das Verfahren das Bereitstellen einer metallischen Bodenplatte, das Bereitstellen eines Leistungselektronik-Substrats mit mindestens einem darauf angeordneten Halbleiter-Chip sowie das Bereitstellen eines Preforms aus festem Lotmaterial.According to another example of the invention, the method comprises providing a metallic bottom plate, providing a power electronics substrate having at least one semiconductor chip disposed thereon, and providing a preform of solid solder material.
Die Erfindung wird nachfolgend anhand von den in den Abbildungen dargestellten Beispielen näher erläutert. Die Darstellungen sind nicht zwangsläufig maßstabsgetreu und die Erfindung beschränkt sich nicht nur auf die dargestellten Aspekte. Vielmehr wird Wert darauf gelegt, die der Erfindung zugrunde liegenden Prinzipien darzustellen. In den Abbildungen zeigt:The invention will be explained in more detail with reference to the examples shown in the figures. The illustrations are not necessarily to scale and the invention is not limited to the aspects presented. Rather, emphasis is placed on representing the principles underlying the invention. In the pictures shows:
In den Figuren bezeichnen gleiche Bezugszeichen gleiche oder korrespondierende Komponenten mit gleicher oder ähnlicher Bedeutung.In the figures, like reference characters designate like or corresponding components of like or similar meaning.
Für die folgende Beschreibung sei angemerkt, dass im Folgenden unter „Löten” grundsätzlich Weichlöten (Soldering) verstanden wird, wobei die Liquidustemperatur des Lotes typischerweise unter 450° Celsius liegt. Zum Zwecke der Verbindung von Halbleiterbauelementen mit einem Träger (z. B. einem Leistungselektronik-Substrat) kommt Hartlöten (Brazing) aufgrund der hohen Temperaturen beim Lötprozess nicht in Betracht (Liquidustemperatur des Lotes größer 450° Celsius).For the following description, it should be noted that in the following "soldering" fundamentally refers to soldering (soldering), the liquidus temperature of the solder typically being below 450 ° Celsius. For the purpose of connecting semiconductor devices to a carrier (eg a power electronics substrate) brazing is not considered due to the high temperatures during the soldering process (liquidus temperature of the solder greater than 450 ° Celsius).
Zunächst wird bezugnehmend auf
Das Modul
Auf dem Substrat
In
Um eine ausreichende Kühlung der Leistungshalbleiterchips
Die Grundplatte
Allgemein umfasst ein Leistungshalbleitermodul
Um die Unterseite
Wie eingangs erwähnt kann die Lötverbindung zwischen den Halbleiter-Chips
Das hier beschriebene Verfahren betrifft die Lötverbindung zwischen mindestens einem Halbleiter-Chip
Gemäß dem hier beschriebenen Beispiel wird das Ausgangsmaterial für die Preforms in Form zu einer Spule (Lotrolle
Der Durchmesser der einzelnen Schweißpunkte (d. h. der Durchmesser der beim Schweißen entstehenden, annähernd kreisförmigen Fügestelle) ist gemäß einem Beispiel des hier beschriebenen Verfahrens kleiner als 0,5 mm, wobei zur Fixierung eines Preforms
Auf die am Substrat
In den Halbleiter-Chips
In
Im Folgenden werden einige Aspekte der Erfindung zusammengefasst. Es sei jedoch angemerkt, dass es sich dabei nicht um eine abschließende Aufzählung handelt. Ein Aspekt der Erfindung betrifft ein Verfahren zum Herstellen einer Verbindung zwischen einem oder mehreren Halbleiter-Chips und einem Substrat mittels Weichlöten. Gemäß einem Beispiel der Erfindung wird ein Substrat
Im Anschluss werden die Halbleiter-Chips
Im Gegensatz zu anderen Verfahren, welche ein pastöses Lot benötigen, wird gemäß den hier beschriebenen Beispielen das Lotmaterial in festem Aggregatzustand bereitgestellt, beispielsweise in Form einer Folie, welche zu einer Rolle gewickelt sein kann (von der die Folie während des Verfahrens sukzessive abgewickelt wird). Das Lotmaterial wird zugeschnitten, um die Preform
Das hier beschriebene Verfahren ermöglicht ein Positionieren der Preforms und der Halbleiter-Chips, ohne einen Lotrahmen verwenden zu müssen. Dadurch wird auch die Einbringung von Materialien (das des Lotrahmens) auf das Substrat vermieden, welche den weiteren Produktionsprozess beeinflussen können. Die Konfektionierung (das Zuschneiden) der Preforms und deren Verarbeitung ist effizient in einem Prozess möglich.The method described here allows positioning of the preforms and the semiconductor chips without having to use a solder frame. This also prevents the introduction of materials (that of the solder frame) onto the substrate, which can influence the further production process. The assembly (cutting) of the preforms and their processing is possible efficiently in one process.
Wie bereits erwähnt kann das hier beschriebene Verfahren bei der Herstellung von Leistungshalbleiter-Modulen mit metallischer Grundplatte (Bodenplatte) auch zur Herstellung der Lötverbindung zwischen Leistungselektronik-Substrat und Grundplatte verwendet werden (vgl.
Im Anschluss wird das Leistungselektronik-Substrat
Claims (11)
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DE201310213135 DE102013213135B3 (en) | 2013-07-04 | 2013-07-04 | Method for establishing connection between e.g. diode and substrate, involves positioning semiconductor chip on corresponding preform, so that semiconductor chip is held on preform through adhesion force produced by liquid |
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EP3499553A1 (en) * | 2017-12-13 | 2019-06-19 | Heraeus Deutschland GmbH & Co. KG | Method for producing a component bonded to a soldering preform through thermocompression below the melting point of the solder |
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US11081465B2 (en) | 2017-12-13 | 2021-08-03 | Heraeus Deutschland GmbH & Co. KG | Method for producing a stable sandwich arrangement of two components with solder situated therebetween |
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DE102019106394B4 (en) | 2019-03-13 | 2023-06-01 | Danfoss Silicon Power Gmbh | Method of making a cohesive bond and bonding material preform therefor |
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