DE102014007429A1 - Printed circuit board with component and method for its production - Google Patents
Printed circuit board with component and method for its production Download PDFInfo
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- DE102014007429A1 DE102014007429A1 DE102014007429.3A DE102014007429A DE102014007429A1 DE 102014007429 A1 DE102014007429 A1 DE 102014007429A1 DE 102014007429 A DE102014007429 A DE 102014007429A DE 102014007429 A1 DE102014007429 A1 DE 102014007429A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/25—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
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- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/061—Disposition
- H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/06181—On opposite sides of the body
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/25—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/82009—Pre-treatment of the connector or the bonding area
- H01L2224/8203—Reshaping, e.g. forming vias
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- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10166—Transistor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
- H05K2203/1469—Circuit made after mounting or encapsulation of the components
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Verfahren zum Ankontaktieren eines Bauelements (30) in einer Leiterplattenschichtabfolge (10) mit den folgenden Schritten: Bereitstellen eines Bauelements (30) mit Kontaktflächen (34, 36, 38) aus einem Metallmaterial, das nicht Kupfer ist; Herstellen eines Schichtabfolgelaminats (10) mit eingebettetem Bauelement; Erzeugen von einem oder mehreren Löchern (V1, V2, VL) in einer Oberfläche des Schichtabfolgelaminats (10) zum zumindest partiellen Freilegen der Kontaktflächen (34, 36, 38) des Bauelements (30); Behandeln von Oxidschichten (35, 37) auf den freigelegten Kontaktflächen (34, 36), Aufbringen einer Basismetallschicht (40) und Durchführen eines Galvanisierungsprozesses zum Verstärken der Basismetallschicht (40) mit einer Kupferschicht (42). Leiterplatte mit einem Leiterplattenschichtaufbau (10) und darin eingebrachtem Bauelement (30), wobei das Bauelement (30) mindestens eine Kontaktfläche (34, 36, 38) aufweist, die über mindestens ein Sackloch (V1, V2, VL) ankontaktiert ist, wobei die Kontaktfläche (34, 36, 38) im Bereich des mindestens einen Vias (V1, V2, VL) eine Schicht aus metallischem Material aufweist, das nicht Kupfer ist, an die sich direkt und ohne Vorhandensein einer Metalloxidschicht (35, 37) eine Basismetallschicht (40) anschließt, die durch aufgalvanisiertes Kupfer (42) verstärkt ist.A method of contacting a device (30) in a circuit board layer sequence (10), comprising the steps of: providing a device (30) having contact surfaces (34, 36, 38) of a non-copper metal material; Producing a laminar laminate (10) with an embedded component; Creating one or more holes (V1, V2, VL) in a surface of the laminate laminate (10) to at least partially expose the contact surfaces (34, 36, 38) of the device (30); Treating oxide layers (35, 37) on the exposed contact surfaces (34, 36), depositing a base metal layer (40), and performing a plating process for reinforcing the base metal layer (40) with a copper layer (42). Printed circuit board having a printed circuit board layer structure (10) and a component (30) incorporated therein, wherein the component (30) has at least one contact surface (34, 36, 38) which is contacted via at least one blind hole (V1, V2, VL), wherein the Contact surface (34, 36, 38) in the region of the at least one vias (V1, V2, VL) has a layer of metallic material, which is not copper, to which directly and without the presence of a metal oxide layer (35, 37) a base metal layer ( 40) reinforced by plated copper (42).
Description
Technisches GebietTechnical area
Die vorliegende Erfindung betrifft ein Verfahren zum Ankontaktieren eines Bauelements in eine Leiterplattenschichtabfolge sowie eine Leiterplatte mit einem eingebetteten Bauelement.The present invention relates to a method of contacting a device with a circuit board layer sequence and a printed circuit board having an embedded device.
In Leiterplatten eingebrachte bzw. eingebettete Bauelemente wie Halbleiter, Leistungshalbleiter, Chips, Feldeffekttransistoren u. dgl. müssen zur Anbindung an den integrierten Schaltkreis ankontaktiert werden. Hierzu verfügen die Bauelemente üblicherweise über geeignete Kontaktflächen. Für eine galvanische Ankontaktierung von Bauelementen bestehen die Kontaktflächen idealerweise aus Kupfer bzw. sind mit Kupfer beschichtet. Es stellt sich zunehmend jedoch bei der Herstellung von Leiterplatten mit galvanisch anzukontaktierenden integrierten/eingebetteten Bauelementen die Herausforderung, dass viele Bauelemente nicht über Kupferterminierungen verfügen, sondern über Kontaktflächen mit Aluminium oder einer Aluminiumlegierungsoberfläche.In printed circuit boards introduced or embedded components such as semiconductors, power semiconductors, chips, field effect transistors u. Like. Must be contacted for connection to the integrated circuit. For this purpose, the components usually have suitable contact surfaces. For a galvanic Ankontaktierung of components, the contact surfaces are ideally made of copper or coated with copper. However, in the manufacture of printed circuit boards with integrated / embedded devices to be plated, the challenge is that many devices do not have copper terminations but contact surfaces with aluminum or an aluminum alloy surface.
Erfindungsgemäß werden ein Verfahren zum Ankontaktieren eines Bauelements in einer Leiterplattenschichtabfolge mit den Merkmalen des Anspruchs 1 sowie entsprechende Leiterplatten mit den Merkmalen der Ansprüche 12 und 17 vorgeschlagen.According to the invention, a method for contacting a component in a circuit board layer sequence with the features of claim 1 and corresponding circuit boards having the features of
Erfindungsgemäß wird ein Verfahren bereitgestellt, das eine Einbettung und Ankontaktierung von Standard-Bauelementen mit nicht kupferbeschichteten Kontaktflächen gestattet. Derartige Kontaktflächen weisen in der Regel Oberflächen aus Aluminium oder einer Aluminiumlegierung wie AlSiCu oder AlSi.According to the invention, a method is provided which allows embedding and contacting of standard components with non-copper-coated contact surfaces. Such contact surfaces usually have surfaces of aluminum or an aluminum alloy such as AlSiCu or AlSi.
Der Erfindung liegt die Erkenntnis zugrunde, dass Kontaktflächen aus einem Metallmaterial, das nicht Kupfer ist (Nicht-Kupfer-Metall), so behandelt werden, dass eine Plattierung mit Kupfer darauf ermöglicht wird. Die erfindungsgemäße Behandlung kann bspw. ein Entfernen der Oxidschicht zumindest in einem Bereich der Kontaktflächen (bspw. in einem freigelegten Bereich und/oder einem zum Plattieren vorgesehenen Bereich) sein. Alternativ kann die erfindungsgemäße Behandlung ein Konditionieren der Oberfläche der Kontaktfläche aus Nicht-Kupfer-Metall sein.The invention is based on the recognition that contact surfaces made of a metal material which is not copper (non-copper metal) are treated in such a way that plating with copper on it is made possible. The treatment according to the invention may, for example, be removal of the oxide layer at least in a region of the contact surfaces (for example in an exposed region and / or a region intended for plating). Alternatively, the treatment of the invention may be a conditioning of the surface of the non-copper metal contact surface.
Auf die erfindungsgemäß behandelte Kontaktfläche wird dann eine Basismetallschicht aufgebracht. Unter einer Basismetallschicht ist im Kontext der vorliegenden Erfindung eine einzelne Schicht aus einem plattierfähigen Metall (wie bspw. Kupfer) oder auch eine Schichtfolge zu verstehen, auf die in einem Anschließenden Galvanisierungsschritt eine verstärkte Kupferschicht aufgebracht wird.A base metal layer is then applied to the contact surface treated according to the invention. In the context of the present invention, a base metal layer is to be understood as meaning a single layer of a plateable metal (such as, for example, copper) or else a layer sequence to which a reinforced copper layer is applied in a subsequent electroplating step.
Weitere Vorteile und Ausgestaltungen der Erfindung ergeben sich aus der Beschreibung und der beiliegenden Zeichnung.Further advantages and embodiments of the invention will become apparent from the description and the accompanying drawings.
Es versteht sich, dass die voranstehend genannten und die nachstehend noch zu erläuternden Merkmale nicht nur in der jeweils angegebenen Kombination, sondern auch in anderen Kombinationen oder in Alleinstellung verwendbar sind, ohne den Rahmen der vorliegenden Erfindung zu verlassen.It is understood that the features mentioned above and those yet to be explained below can be used not only in the particular combination indicated, but also in other combinations or in isolation, without departing from the scope of the present invention.
Die Erfindung ist anhand von Ausführungsbeispielen in der Zeichnung schematisch dargestellt und wird im folgenden unter Bezugnahme auf die Zeichnung ausführlich beschrieben.The invention is illustrated schematically by means of embodiments in the drawing and will be described in detail below with reference to the drawing.
Kurzbeschreibung der ZeichnungBrief description of the drawing
Ausführliche BeschreibungDetailed description
Das Schichtabfolgelaminat
Der dargestellte und beschriebene Laminataufbau ist selbstverständlich rein beispielhaft, und dem Fachmann erschließt sich ohne weiteres jeder andere davon abweichende Aufbau.The illustrated and described laminate construction is of course purely exemplary, and the skilled person will readily understand any other deviating structure.
Das Bauelement
Dem Fachmann erschließt sich ohne weiteres, dass jegliche andere Form von Bauelement mit entsprechenden Kontaktflächen zur Ankontaktierung erfindungsgemäß Verwendung finden kann.The skilled person will readily understand that any other form of component with corresponding contact surfaces for Ankontaktierung invention can be used.
Typischerweise werden zur Ankontaktierung der Kontaktflächen
Alternativ kann auf die im dargestellten Ausführungsbeispiel großflächige Source-Kontaktfläche
Am Beispiel der in
Die Kontaktflächen
Aluminium bzw. Aluminiumlegierungen bilden in Sauerstoffumgebung sehr schnell eine Oxidschicht auf ihrer Oberfläche, die in
Unter dem Begriff des ”Behandelns” der Oxidschicht ist im Kontext der vorliegenden Anmeldung jede Form von physikalischer und/oder chemischer Bearbeitung zu verstehen, die zu einer plattierbaren Oberfläche an dieser Stelle führt. Dabei kann es sich erfindungsgemäß bspw. um ein Entfernen der Oxidschicht handeln, aber auch um eine Konditionierung.The term "treating" the oxide layer in the context of the present application means any form of physical and / or chemical processing that results in a platable surface at that location. In this case, according to the invention, it may be, for example, a removal of the oxide layer, but also a conditioning.
Im folgenden wird anhand des dargestellten Ausführungsbeispiels die Erfindung zunächst am Beispiel des Entfernens der Oxidschicht detaillierter beschrieben.In the following, the invention is first described in more detail using the example of the removal of the oxide layer on the basis of the illustrated embodiment.
Vor der Entfernung der Oxidschicht erfolgt ein Lochreinigungsprozess zum Reinigen der Oberflächen des Substrats und des Halbleiters und insbesondere auch der Lochwandungen. Auf ein nasschemisches Reinigen, wie es als Standardtechnologie bekannt ist (bspw. in Form des Desmear-Prozesses), kann jedoch nicht zurückgegriffen werden, da die heiße alkalische wässrige Lösung das amphotere Aluminium angreift. Als Reinigungsprozesse bieten sich deshalb Trockenreinigungsprozesse wie Plasmareinigung oder UV-Reinigung (ebenfalls als Desmear-Prozesse) an.Before the removal of the oxide layer, a hole cleaning process for cleaning the surfaces of the substrate and the semiconductor and in particular also the hole walls. Wet-chemical cleaning, as known as standard technology (for example in the form of the desmear process), however, it can not be used because the hot alkaline aqueous solution attacks the amphoteric aluminum. Dry cleaning processes such as plasma cleaning or UV cleaning (also known as desmear processes) are therefore suitable as cleaning processes.
Nach dem Reinigen der Lochoberflächen (Wandungen und Böden) erfolgt das bereits angesprochene Entfernen der Oxidschichten
Das erfindungsgemäße Entfernen der Oxidschicht kann bspw. auch durch chemische Reduktion erfolgen, bspw. mittels eines reduzierend eingestellten Plasmas. Als Prozessgas bietet sich hierbei bspw. Wasserstoff an, der mit dem Sauerstoff aus der Oxidschicht zu Wasser reagiert. Eine weitere Alternative besteht in einem chemischen Auflösen der Oxidschicht, bei dem das Oxid bspw. in alkalischer Lösung als Aluminat in Lösung geht und darunter liegendes metallisches Aluminium freigelegt wird.The removal of the oxide layer according to the invention can, for example, also be carried out by chemical reduction, for example by means of a reducing plasma. As a process gas in this case, for example, offers hydrogen, which reacts with the oxygen from the oxide layer to water. Another alternative is a chemical dissolution of the oxide layer, in which the oxide, for example. In alkaline solution as aluminate dissolves and exposed underlying metallic aluminum.
Um eine Reoxidation auf der Oberfläche der Kontaktflächen
Als Alternative zu Vakuumprozessen können auch sogenannte ”Open Air”-Plasma-Prozesse eingesetzt werden, bei denen das Plasma räumlich begrenzt erzeugt wird. Auch hier kann das Plasma zunächst z. B. durch Zugabe von Wassersoff reduzierend eingestellt werden, um Oxidschichten von den Aluminiumoberflächen zu entfernen. Danach kann, unter Aufrechterhaltung des Plasmas, dem Plasma mit einem Trägergas Kupfer in Partikelform zugeführt werden und somit in direkter Folge eine Desoxidation und Kupferbeschichtung erfolgen. Dieser Beschichtungsprozess wird dabei so eingestellt, dass die Oberflächen der freigelegten Kontaktflächenbereiche sowie die Lochwandungen gleichzeitig mit einer ausreichend dicken Kupferbeschichtung versehen werden, so dass anschließend eine galvanische Verstärkung mit z. B. Kupfer möglich ist.As an alternative to vacuum processes, so-called "open air" plasma processes can be used in which the plasma is generated spatially limited. Again, the plasma can first z. B. can be adjusted reducing by the addition of Wassersoff to remove oxide layers from the aluminum surfaces. Thereafter, while maintaining the plasma, the plasma can be supplied to the plasma with a carrier gas copper in particle form and thus take place in a direct consequence of deoxidation and copper coating. This coating process is adjusted so that the surfaces of the exposed contact surface areas and the hole walls are provided simultaneously with a sufficiently thick copper coating, so that then a galvanic reinforcement with z. B. copper is possible.
Das Aufbringen der in
Je nach Größe der Kontaktfläche und Legierungszusammensetzung kann das Aufbringen von haftungsverbessernden Schichten oder Schichtfolgen erforderlich sein. Derartige Schichtfolgen können z. B. Ti, Ti-W, Ti-Cu oder andere Kombinationen von Ti-, Cu-, W-Schichten sein. Auf diese Schichten wird dann zusätzlich eine reine Kupferschicht gesputtert.Depending on the size of the contact surface and alloy composition, it may be necessary to apply adhesion-improving layers or layer sequences. Such layer sequences can z. Ti, Ti-W, Ti-Cu or other combinations of Ti, Cu, W layers. In addition, a pure copper layer is sputtered onto these layers.
Alternativ kann auch ein Aufbringen einer Basismetallschicht aus Zink auf den Metalloberflächen
Im Rahmen der Oxidschichtentfernung im Wege des Zinkatprozesses als einer nasschemischen Anwendung wird die Oxidschicht zumindest teilweise abgelöst und in einer wässrigen alkalischen Lösung mit ZnO wird dabei eine dünne Zinkschicht auf dem Aluminium abgeschieden.In the context of the oxide layer removal by means of the zincate process as a wet-chemical application, the oxide layer is at least partially removed and in a water alkaline solution with ZnO a thin zinc layer is deposited on the aluminum.
Eine Leitfähigkeit der Lochwandungen kann bspw. durch Abscheiden eines leitfähigen Polymers auf dem Harzmaterial der Prepregschicht
Die Erfindung beschränkt sich jedoch nicht auf ein Behandeln der Nicht-Kupfer-Metall-Kontaktflächen auf ein Entfernen der sich darauf befindlichen Oxidschicht. Alternativ kann erfindungsgemäß auch eine Konditionierung der Kontaktfläche erfolgen, wie sie nachfolgend detaillierter beschreiben wird.However, the invention is not limited to treating the non-copper-metal pads to remove the oxide layer thereon. Alternatively, according to the invention, a conditioning of the contact surface can take place, as will be described in more detail below.
An die bereits voranstehend beschriebene Locherzeugung und Lochwandreinigung kann eine direkte (chemische) Abscheidung von Nickel auf Aluminium erfolgen. Danach folgen die bereits beschriebenen Prozesse der Abscheidung von chemisch Cu oder einem leitfähigen Polymer auf den Lochwandungen und ggf. der Oberfläche. Danach folgt die galvanische Verstärkung ggf. bis zur vollständigen Verfüllung.At the above-described hole production and perforated wall cleaning can be carried out a direct (chemical) deposition of nickel on aluminum. This is followed by the already described processes of the deposition of chemical Cu or a conductive polymer on the hole walls and possibly the surface. This is followed by galvanic reinforcement, if necessary, until complete filling.
Für eine weitere Variante der galvanischen Beschichtung mit z. B. Kupfer wird die vergleichsweise dünne Oxidschicht auf der Oberfläche belassen, ggf. sogar in der Schichtdicke verstärkt. In einem Konditionierungsschritt wird die Oxidschicht mit einem sogenannten Conditioner (Untergrundverbesserer) belegt. Der Conditioner hat die Eigenschaft, mittels eine reaktiven, häufig komplexierenden Gruppe an die Oberfläche, hier Aluminiumoxid, anzudocken. Der Rest des Moleküls ist organischer Natur. Der Konditionierungsschritt erfolgt bspw. in einem nasschemischen Prozess. Als Conditioner können bspw. Silane mit organischem Rest, Polyolefine o. dgl. dienen. Als Conditioner kann jeder auf einer Oxidschicht aufbringbarer Haftvermittler dienen, mit dessen Hilfe das leitfähige Polymer auf der Oberfläche abgeschieden werden kann. Der Schritt des Konditionierens dient somit im wesentlichen dem Aufbringen einer gut haftenden leitfähigen Polymerschicht, mit deren Hilfe Cu galvanisch auf der betreffenden Oberfläche abgeschieden werden kann.For a further variant of the galvanic coating with z. As copper, the comparatively thin oxide layer is left on the surface, possibly even reinforced in the layer thickness. In a conditioning step, the oxide layer is coated with a so-called conditioner (substrate improver). The conditioner has the property of docking to the surface, here aluminum oxide, by means of a reactive, often complexing group. The rest of the molecule is organic. The conditioning step takes place, for example, in a wet-chemical process. As a conditioner, for example, silanes with organic residue, polyolefins o. The like. Serve. The conditioner can be any adhesion promoter that can be applied to an oxide layer, with the aid of which the conductive polymer can be deposited on the surface. The step of conditioning thus essentially serves to apply a well-adhering conductive polymer layer with the aid of which Cu can be deposited galvanically on the relevant surface.
Danach wird ein leitfähiges Polymer abgeschieden, auf dem nachfolgend Kupfer galvanisch abgeschieden wird. Die Abscheidung des leitfähigen Polymers erfolgt gleichzeitig auf der Lochwandung sowie auf der Oxidoberfläche. Die Oxidschicht ist so dünn, dass diese für die elektrische Funktion und Kontaktierung von untergeordneter Bedeutung ist.Thereafter, a conductive polymer is deposited on which copper is subsequently electrodeposited. The deposition of the conductive polymer takes place simultaneously on the hole wall and on the oxide surface. The oxide layer is so thin that it is of minor importance for the electrical function and contacting.
Die mittels einem wie voranstehend beschriebenen Verfahren aufgebrachte Basismetallschicht bzw. Basismetallschichtfolge
Gegebenenfalls kann erfindungsgemäß vor dem Einbetten des Bauelements
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US6180523B1 (en) * | 1998-10-13 | 2001-01-30 | Industrial Technology Research Institute | Copper metallization of USLI by electroless process |
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US9953910B2 (en) * | 2007-06-21 | 2018-04-24 | General Electric Company | Demountable interconnect structure |
US8120158B2 (en) * | 2009-11-10 | 2012-02-21 | Infineon Technologies Ag | Laminate electronic device |
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US6180523B1 (en) * | 1998-10-13 | 2001-01-30 | Industrial Technology Research Institute | Copper metallization of USLI by electroless process |
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