DE102007017788A1 - Doping zone producing method for semiconductor body, involves executing short-time heat treatment at one temperature, and executing longer heat treatment at another temperature for forming doping zone - Google Patents

Abstract

The method involves providing a semiconductor body (1). A dopant (2) is introduced into the semiconductor body, where the dopant is sulphur, selenium, Indium or antimony. A short-time heat treatment is executed at a temperature. Another heat treatment which is longer that the former heat treatment is executed at another temperature for forming a doping zone, where the former temperature is higher than the latter temperature. The former heat treatment is executed in such a manner that no diffusion of the dopant takes place in the semiconductor body.

Description

BACKGROUND OF THE INVENTION

Semiconductor devices have a plurality of differently doped semiconductor regions which are formed, for example, by implantation of a suitable dopant in a semiconductor body. Following the implantation, a temperature step typically takes place, by means of which the dopant is activated and implantation damage which has occurred during implantation is healed. The formation of semiconductor regions by implantation is for example in the documents US 6,426,248 . US 2002/0060353 . US 2002/0009841 such as US 4 151 008 described.

Power semiconductor components sometimes make special demands on the doping profile and the dopant concentration of semiconductor regions since thereby the performance of power semiconductor devices can be set specifically. For example, IGBTs require and diodes before their back contact a so-called field stop layer, whose doping is high enough to form that in the drift zone electric field in the blocking case in front of the back emitter or the backside metallization completely dismantle. If the field stop layer is not sufficiently dimensioned, The electric field in IGBTs penetrates very close to that on the back of the IGBT arranged emitter or up to defects or spikes, for example, by the backside metallization in the semiconductor body of the IGBT were induced. This can increase it Leakage currents and even come to failure of the power semiconductor device. For diodes, inhomogeneous backs - especially for high-voltage diodes - for inhomogeneous current distributions at Shut down. This favors the phenomenon the rounding of the blocking characteristic after a high switching load.

Power semiconductor components with a rock stop layer are, for example, in DE 100 53 445 . US Pat. No. 6,610,572 and DE 10 2004 013 932 described. Out US 6,482,681 and US 6,707,111 It is known to produce rock stop layers by implantation of protons. Out US 6,441,408 . WO 00/04596 and WO 00/04598 however, it is known to use sulfur or selenium to form field stop layers. Sulfur or selenium may also be used to form edge seals, such as in US 6,455,911 described.

As Shown in the aforementioned publications, field stop layers be made in different ways. A common one Use case are n-doped field stop layers, as in the vast majority Cases of IGBTs, for example, with an n-doped drift path be used. Around the field stop layers at a certain depth in the semiconductor body, it is necessary to do so used dopant corresponding deep into the semiconductor body contribute. In the case of an n-doped field stop layer separates However, the deep implantation or diffusion of dopants production reasons often because the required long temperature treatments at high Temperatures usually not compatible with on the front of the semiconductor body arranged doped glasses and the source and body regions of a MOS cell. Alternatively could the semiconductor bodies are thinned to very deep Avoid implantations and long diffusion processes. This would however, the handling of thin semiconductor bodies or wafer slices over many process steps, connected with a very high risk of disc breakage.

A method for producing deep field stops with a low temperature budget is the proton doping with a subsequent annealing step. However, the doping profile of protons strongly follows the implantation profile, ie that the resulting doping is peak-shaped with very steep flanks. This leads to a "harder" field stop behavior, which is not always desirable. To mitigate the "hard" field stop behavior and to simulate "softer" profiles could several implantation steps, such as in the above-mentioned publication US 6,482,681 shown to be performed. However, this increases the manufacturing costs to a not inconsiderable extent.

Another variant for the production of field stop layers is the doping with fast-diffusing donors such as selenium and sulfur. The diffusion temperatures are below about 1000 ° C with a maximum of a few hours diffusion time, which is still compatible with the cell structure of power semiconductor devices. The problem with these dopants, however, is that the achievable doses of electrically active dopant in the semiconductor body in the range of some 10 ¹² / cm ² , because at high implantation doses, the outdiffusion of selenium, in particular, greatly increases. Ultimately, only a small portion of the implanted atoms remain electrically active in the semiconductor body. This proportion even decreases with increasing implantation dose.

SUMMARY OF THE INVENTION

In an embodiment, a method for producing a doping zone in a semiconductor body is provided. The method has the following steps: providing a semiconductor body; Introducing at least one dopant into the semiconductor body, wherein the dopant is selected from the group comprising sulfur, selenium, indium and antimony and mixtures thereof; Performing at least a short term first temperature treatment at a temperature T1; and performing a second temperature treatment, which is longer than the first temperature treatment, at a temperature T2 to form a doping zone, wherein T1 is higher than T2.

In a further embodiment, a semiconductor device is provided that comprises a semiconductor body made of a semiconductor material with a doping zone having at least one dopant selected from the group comprising sulfur, selenium, indium and antimony and mixtures thereof, wherein the concentration of the electrically active Dopant in the doping zone is greater than 10 ¹⁶ / cm ² and in particular greater than 5 x 10 ¹⁶ / cm ² .

BRIEF DESCRIPTION OF THE FIGURES

in the Below, the invention with reference to in the attached Figures embodiments shown described from which There are further advantages and modifications. The invention is but not on the specific embodiments described but may be modified as appropriate and modified. It is within the scope of the invention, individual Features and feature combinations of an embodiment with Features and feature combinations of another embodiment suitable to combine to further inventive To get to embodiments.

embodiments generally refer to semiconductor devices. Particularly refer to power semiconductor devices and in particular Power semiconductor components with at least partially vertical Current flow. Furthermore, embodiments relate to Method for producing a semiconductor component.

1A to 1C show individual method steps of a method for producing a doping zone according to a first embodiment.

2A shows an emitter structure of a power semiconductor device with a field stop layer according to another embodiment.

2 B shows an emitter structure of a vertical power semiconductor device with a field stop layer and highly doped dopant islands according to another embodiment.

3A shows a cathode structure of an IGBT (Insulated Gate Bipolar Transistor).

3B shows a cathode structure of a MCT (MOS-controlled thyristor).

3C shows a cathode structure of a GTO (gate turn-off thyristor).

4 shows a structure of a power diode according to another embodiment.

5 shows the schematic course of the electric field strength along a vertical line through the in 4 shown structure.

6 shows the net dopant profile of an IGBT with a field stop layer according to an embodiment.

7 shows the schematic net dopant profile of an IGBT according to another embodiment.

8th shows the SIMS and SRP analysis of a selenium implanted semiconductor body after a successful laser anneal.

9 shows the solid state saturation concentration of various dopants in silicon as a function of temperature.

10A and 10B show the dependence of the diffusion constant of different dopants in silicon as a function of the temperature.

DETAILED DESCRIPTION

following some embodiments will be explained. Here are the same structural features in the figures with the same Reference number marked. In the context of the present description should under "lateral" or "lateral direction" a direction or Extension understood to be parallel to the lateral extent a semiconductor material or a semiconductor body runs. Typically, there is a semiconductor body as a thin wafer or chip and includes two on opposite sides Side surfaces, one surface of which is called the main surface. The lateral direction thus extends parallel to these surfaces. in the In contrast, the term "vertical" or "vertical Direction "understood a direction perpendicular to the main surface and so that it runs to the lateral direction. The vertical direction therefore runs in the thickness direction of the wafer or chip.

The structures shown in the figures are not drawn to scale, but are only for better understanding of the embodiments. In this case, individual elements are shown enlarged compared to other elements to their Structure to show more clearly.

Regarding 1A to 1C First, individual process steps of a production process according to an embodiment will be described. The starting point is, for example, a semiconductor body 1 that has a first surface 3 and one of the first surface 3 opposite second surface 4 having. The semiconductor body 1 may for example consist of a monocrystalline silicon semiconductor material. Other semiconductor materials such as silicon carbide (SiC) or compound semiconductors may also be used.

The semiconductor body 1 For example, it may be weakly n-doped, with the dopant concentration being between about 1 × 10 ¹² / cm ³ and about 1 × 10 ¹⁵ / cm ³ . For example, by implantation becomes a dopant 2 in the area of the first surface 3 in near-surface regions of the semiconductor body 1 brought in. The implanted dopants are, in particular, selenium, sulfur, indium, antimony and mixtures thereof. The dopant can also be introduced as a selenium, sulfur, indium and antimony-containing compound or compounds. In this case, the dopant at a dose of about 1 · 10 ¹¹ / cm ² to about 1 · 10 ¹⁵ / cm ² , in particular with a dose to about 1 · 10 ¹² / cm ² to about 1 · 10 ¹⁴ / cm ² , and an energy of about 1 keV to about 10 MeV, in particular with an energy of about 10 keV to about 500 keV, in the semiconductor body 1 be implanted. Typically, the dopant becomes 2 implanted flat, for example, to a depth of about 0.01 microns to about 3 microns, and more preferably from about 0.02 microns to about 0.3 microns. The location of the implanted dopant 2 is in 1A through the dashed line 5 indicated.

After implantation, at least a first short-term temperature treatment is carried out ( 1B ). In the first temperature treatment, a short energy pulse typically acts substantially on the first surface 3 of the semiconductor body 1 one. This may be, for example, a laser anneal or a rapid thermal anneal (RTA) step. The aim of the first temperature treatment is the fastest possible elimination of damage caused by the implantation in the crystal lattice of the semiconductor body 1 , It has been found in investigations that crystal defects can be cured very effectively, in particular if the first temperature treatment is carried out very briefly and at very high temperatures. The first temperature treatment should therefore be shorter than 10 seconds and in particular shorter than 5 seconds. In order to achieve a particularly good recrystallization, the first temperature treatment may also be shorter than 1 second and, in particularly favorable cases, even in the range of a few milliseconds (for example less than 100 milliseconds) to a few microseconds and even less than 1 microseconds. Such short times can be achieved in particular when using a pulsed laser. The pulse duration of lasers can be set, for example, to times below 1 μsec, for example 200 nsec. In contrast, flash lamps, which are used for example in RTA processes, a flash duration of a few msec. In the context of the present description, the term "duration" of the first temperature treatment, in particular, refers to the duration, in particular, of the semiconductor body 1 understood acting energy pulse.

The use of very short pulsed short-wave lasers with a maximum pulse duration of, for example, 1000 nsec has proven to be particularly favorable. Without wishing to be limited, the reason for this is understood as follows. The electromagnetic radiation of the laser light is in layers near the surface of the semiconductor body 1 almost completely absorbed. The laser light penetrates only a few nm into the semiconductor body 1 a, since the absorption coefficient of, for example, UV radiation with about 3 to 5 eV photon energy in the range 3 x 10 ⁴ / cm to about 3 x 10 ⁶ / cm in crystalline silicon as a solid body. Therefore, at a wavelength of the laser light in the range of about 300 nm, the irradiated light power is I ₀ dropped within about 5 to 10 nm to 1 / e · I _0th The radiated energy leads to the formation of a "heat wave" from the first surface 3 in the semiconductor body 1 penetrates. With correspondingly high energy supplied, this heat wave leads to the melting of regions near the surface of the semiconductor body 1 , It may melt the semiconductor body 1 come to a depth of about 200 to 300 nm. Observations have shown that the speed at which the heat wave and, associated therewith, a "fusing wave" into the semiconductor body 1 depends on the duration of the exposure, the speed being higher, the shorter the exposure time. From comparisons it is also known that a short and rapid melting leads to a better recrystallization of the semiconductor body.

As has surprisingly been shown by the short-term first temperature treatment introduced a clustering of the Dotierstoffs improved and sometimes even largely avoided become. The problem of clustering should follow, without getting to want to restrict the example of in a silicon semiconductor body implanted selenium.

Selenium has a comparatively low solids saturation concentration in silicon, such as for example 9 is apparent. The solids saturation solubility describes the concentration of impurity atoms in a semiconductor lattice, up to which the impurity atoms can be incorporated into the lattice, without disturbing the solid lattice. If the concentration of the foreign atoms, in this case selenium, is increased above the solid-state saturation concentration, selenium is precipitated out of the lattice in the form of clusters. Clustering is preferably carried out on condensation nuclei in the silicon lattice, in which case crystal defects in particular play a role. However, crystal defects inevitably occur as a result of implantation. With correspondingly high implantation doses, it can even lead to an amorphization of the semiconductor body. In a subsequent heat treatment to heal the crystal lattice, the selenium atoms diffuse and segregate on the existing crystal defects. Segregation leads to the formation of selenium clusters. Since selenium has a high diffusion constant in silicon, much selenium concentrates relatively quickly in the clusters.

The short term first temperature treatment, however, leads to a significant reduction in segregation of selenium. The first Temperature treatment is carried out so short that essentially no or only a slight diffusion of selenium in the Semiconductor body takes place. At the same time by the first temperature treatment the crystal lattice damage and thus eliminating the "condensation germs". Will be the first temperature treatment carried out so that it is a melting of near-surface Areas of the semiconductor body comes even occurs additional cleaning of these areas by melting, comparable to a floating zone method. Because selenium is due to the Short of the first heat treatment not appreciable Selenium can not collect in clusters either. The selenium atoms therefore remain largely uniform distributed in the silicon crystal lattice.

As a result, the formation of polyatomic selenium clusters, which act much less than implanted single atoms as dopant source, is avoided by the first temperature treatment. As a result, clustering may be reduced or even significantly reduced even with significant disruption of the crystal lattice by the implantation of selenium, where the amorphization dose is about 2 × 10 ¹⁴ / cm ² , and even at higher doses.

To carry out the first temperature treatment, one or more laser pulses can be used per irradiated area. A typical pulse duration is about 100 nsec to 300 nsec, which can lead to a melting time of about 100 nsec to 800 nsec depending on the power of the laser pulse. The radiated energy surface density can be in the range of about 0.5 to 10 J / cm ² and in particular in a range greater than 3 J / cm ² . As a light source, for example, XeCl excimer laser with a laser light wavelength of 308 nm or Nd-YAG laser with a wavelength of 532 nm can be used. Other suitable excimer lasers with other gas compositions are F ₂ (157 nm), Xe (172 nm), ArF (193 nm), KrF (248 nm), XeBr (282 nm), and XeF (351 nm) lasers Excimer lasers with a very short wavelength emission wavelength are suitable for near-surface absorption. The maximum temperature during melting is approximately 1400 ° C. In some embodiments, the attained maximum temperature T1 of the first temperature treatment is at levels above about 700 ° C. In other embodiments, the attained maximum temperature T1 of the first temperature treatment may even reach values above 1000 ° C or even 1100 ° C and above. The higher the maximum temperature T1 of the first temperature treatment is, the shorter its duration can be, so that the formation of the clusters can be better avoided thereby.

In the case of the commonly used dopants such as boron, phosphorus and arsenic, on the other hand, only a very small cluster formation is observed. Also, the solid state solubility of these dopants, such as 9 can be taken, comparatively high, so that the concentration of electrically active dopant in the commonly used dopants is also very high. In this case, electrically dopant means the dopant atoms which are incorporated in the lattice of the semiconductor body and thus can be electrically activated, ie they act as donors or acceptors. In contrast, the dopant atoms concentrated in clusters are not incorporated in the lattice and therefore can not act as donors or acceptors.

at Sulfur, indium and antimony can also be a nuisance Segregation occur. In particular, indium also shows a relative low solids saturation solubility and a strong tendency for precipitation or segregation from the silicon grid.

For carrying out the first temperature treatment, for example, the beam cross section of a laser beam 7 be concentrated so that the desired energy density is achieved. The maximum area to be exposed thus depends on the performance of the laser used. The exposed surface may be approximately cuboid with an edge length of, for example, about 15 mm. For example, each with a pulse, the semiconductor body 1 at its first surface 3 melted. Then the semiconductor body becomes 1 or the Imaging optics of the laser offset relative to each other and another surface area melted by another laser pulse. The offset is chosen so that a slight overlap between exposed areas occurs, so that a complete melting of all desired surface areas is ensured. If the implantation takes place only in individual surface areas, for example when using implantation masks, it is sufficient to subject only these areas to the first temperature treatment, ie to irradiate them.

It should be noted that in the first temperature treatment, the energy is substantially only the first surface 3 is supplied, so that the first temperature treatment, especially when using short laser pulses only to a melting or heating of the first surface 3 of the semiconductor body 1 leads. When using flashlamps whose pulse duration is in the range of milliseconds, however, it can also lead to a significant heating of the second surface 4 come. The temperature effect is essentially limited to this upper side, so that on the second surface 4 structures are not thermally or only slightly loaded. Since the radiated energy dissipates relatively quickly, the heat treatment on the first surface 3 only a small warm up of the second surface 4 , Because through can on the second surface 4 even structures are present, for example metallizations, which melt at temperatures between 400 ° C and 500 ° C.

After the first temperature treatment, a second temperature treatment is carried out whose maximum temperature T2 is below the maximum temperature T1 of the first temperature treatment. The second temperature treatment is schematically in 1C shown. Typically, the second temperature treatment is a furnace process by which the introduced dopant diffuses out and thus the spatial extent of the doping zone, which in 1C With 6 is designated, set. The second temperature treatment is schematically in 1C through the wavy line 8th indicated. The doping zone 6 can be next to the dopant 2 be doped with other dopants, such as the basic doping of the semiconductor body. The dopant 2 should, however, be the predominant doping.

In a typical oven process, the semiconductor body may 1 For example, be introduced into a preheated to about 600 ° C oven. After the semiconductor body 1 heated to this temperature, there is a controlled heating to, for example, 900 ° C with a temperature gradient of about 1 to 10 ° C / min. Depending on the desired depth of diffusion, the semiconductor body becomes 1 tempered at the target temperature for at least 1 min and in particular more than 5 min. Typical times are even at least 10 to 15 minutes, with an average Temperierungszeit at the target temperature is about 30 minutes. The duration of the heat treatment at the target temperature T2 applies here as the duration of the second temperature treatment. Subsequently, the semiconductor body is cooled, for example, with a temperature gradient of about 1 to 10 ° C / min and in particular about 5 ° C / min at temperatures below 600 ° C and then removed from the oven.

The target temperature or maximum temperature 12 the second temperature treatment is below 1000 ° C in some embodiments. In other embodiments, the target temperature reaches 12 however, only values in the range up to 950 ° C. Typically, the target temperature is 12 approximately in the range of 700 ° C to 950 ° C.

By The two-stage temperature treatment makes it possible to use the Concentration of the electrically active dopant even as far Increase that above the solids saturation solubility lies in the semiconductor material of the semiconductor body. Therefore, will the dopant in one embodiment with a dose introduced, which is chosen so that the concentration the dopant in the semiconductor body at least partially is higher than the solids saturation solubility the semiconductor material of the semiconductor body.

The increase in the concentration of the electrically active dopant compared to the solids saturation solubility can be understood as follows without wishing to be limited. In molten semiconductor material, the dopant can be present in a concentration which can significantly exceed the solids saturation solubility. By a rapid melting and in particular rapid cooling is achieved that more than the solids saturation solubility more dopant atoms are incorporated into the crystal lattice. If cooling to sufficiently low temperatures occurs so rapidly that the dopant atoms are largely immobile, segregation is also suppressed to some extent or even largely suppressed. If the concentration of the dopant atoms on the solid solubility it increases, however, this can lead to tensions within the crystal. The built-in foreign atoms, however, are electrically active, ie they sit at lattice sites. Strained semiconductor gratings are particularly tolerable, for example, if they are formed as thin layers. Therefore, the concentration of the electrically active dopant, in particular in regions, for example in thin layers, be higher than the solids saturation solubility in the semiconductor material of the semiconductor body. For example, the concentration of the electrically active selenium in the doping zone 6 greater than 10 ¹⁶ / cm ³ and in particular greater than 5 x 10 ¹⁶ / cm ³ . This also applies to sulfur. With indium, even an even higher concentration can be achieved, for example, about 1 × 10 ¹⁸ / cm ³ to about 3 × 10 ¹⁸ / cm ³ .

According to one embodiment, on the first surface 3 of the semiconductor body 1 an optional barrier layer 9 be formed at least partially. The barrier layer 9 , in the 1C is shown by dashed lines, for example, by oxidation of the first surface 3 of the semiconductor body 1 and / or by depositing a layer on the first surface 3 be formed. The barrier layer 9 intended to evaporate the introduced dopant from the first surface 3 prevent or significantly reduce. Suitable materials for the barrier layer 9 are, for example, silicon oxide and silicon nitrite. Silicon oxide can be formed for example by thermal oxidation or deposition of a TEOS layer. Silicon nitrite is typically deposited or formed by nitriding silicon. A combination of these materials is also possible.

If a diffusion acceleration during the driving in of the dopant by means of the second temperature treatment is desired, then in particular through the barrier layer 9 through - silicon interstitials, e.g. B. by implantation of a front dopant 2 different implantation material in the semiconductor body 1 be introduced. The dose should still be well below the amorphization limit in order to form a cluster of the introduced dopant 2 to avoid. The introduction of the implantation material typically takes place after the first temperature treatment. The barrier layer 9 on the other hand can be generated before or after the first temperature treatment. Particularly suitable as implantation material are those atoms which, relative to the semiconductor material of the semiconductor body 1 are not doping. In the case of the silicon semiconductor body, these are in particular silicon atoms. However, interlattice silicon atoms are also injected by oxidation of the semiconductor surface, thus already forming a thermally-made silicon oxide barrier layer 9 leads to the formation of interstitial atoms and thus to a diffusion acceleration.

In a further embodiment, several short first temperature treatments may be performed. In this case, between the temperature treatments further dopant 2 in the semiconductor body 1 be introduced. Thus, it is possible, for example, when using a plurality of laser pulses or higher energy pulses for annealing the first surface 3 to dispense with the second temperature treatment. This is of particular interest when on the second top 4 of the semiconductor body 1 already a metallization or passivation is applied because the temperature on the second upper side can be kept below about 400 to 450 ° C by the extremely short energy pulses of the laser and thus the metallization and passivation located there remains in a compatible temperature range.

By using several reflowing laser pulses, the implanted dopant atoms are already slightly diffused out. Because of the melting even on the first surface 3 As a result, several implantations can be carried out, between which, for example, at least one laser annealing step (a first thermal treatment) is carried out in order to reduce the influence of masking. Disturbing masking, for example, by impurities on the first surface 3 caused by particles, for example. There is no implantation of dopant in the areas shaded by the overlying particles. However, the melting through the laser annealing steps also has an effect on the outdiffusion of the dopant into the shaded regions, since the dopant atoms have a relatively high lateral diffusion length in the semiconductor body which has been melted on the surface.

It is therefore possible to divide the first temperature treatment into at least two separate temperature steps which are each very short and lead to a heating of the first surface to a temperature T1, which is the melting temperature of the semiconductor material of the semiconductor body 1 can reach. It is also possible to introduce the dopant by at least two separate implantation steps, followed by a short temperature step after each implantation step. On a subsequent second temperature treatment can, if following the last implantation step, for example, join several temperature steps, also be dispensed with.

Regarding 2 to 5 will be described below some semiconductor devices in which the method outlined above for the formation of semiconductor regions, for example, field stop layers can be used. However, the method is not limited to the formation of field stop layers.

2A and 2 B show differently formed emitter structures, each with arbitrary with in 3A to 3C let combine shown cell structures. This is done by thoughtfully combining one of the in 2A and 2 B shown structures with one of in 3A to 3C structures shown, wherein the 2A to 2 B then the lower portion of the semiconductor device and the 3A to 3C show the upper part of the semiconductor device. The combination takes place on the dashed line.

A semiconductor body 10 points in the area of its first surface 11 (in the present case back) an emitter area 18 on, which is p-type, for example. Between the emitter area 18 and a drift area 13 typically located in a central region of the semiconductor body 10 extends is a field stop layer 16 arranged. The drift area 13 is, for example, weakly n-doped. The field stop layer 16 is also n-doped, but has a higher dopant concentration than the drift region 13 on. The field stop layer 16 can be, for example, by the method described above by introducing, for example by implantation, a dopant in the first surface 11 of the semiconductor body 10 followed by a short first and a longer second temperature treatment. The second temperature treatment then serves in particular for driving in the dopant, so that the field stop layer 16 from the first surface 11 from further into the semiconductor body 10 extends as the emitter area 18 ,

On the first surface 11 can be a backside metallization 31 be formed, which with a backside connection 30 connected is. It is also possible to have highly doped sliding dopant islands 17 , as in 2 B shown to train. By using highly doped dopant islands 17 For example, the on-resistance of the semiconductor device can be further reduced. Alternatively, the dopant islands 17 also be n-doped, thus allowing a Rückwärtsleitfähigkeit the device. A laterally alternating sequence of n- and p-doped dopant islands is also possible.

At the in 3A shown cell structure of an IGBT (Insulated Gate Bipolar Transistor) are in the area of the second surface 12 (Front surface or main surface in the present case) of the semiconductor body 10 For example, p-conducting body areas 14 diffused. N-type source regions 15 are at the second surface 12 into the body areas 14 embedded. Conductive channels, in this case n-channels, are used in the body regions 14 at the two surface 12 below gate electrodes 20 educated. By means of the gate electrodes 20 can thereby be the base zone or the drift area 13 control the IGBT. The gate electrodes 20 are through a gate dielectric 21 opposite to the semiconductor body 10 as well as one on the second surface 12 applied front side metallization 41 that with a front port 40 connected, electrically isolated.

In the circuit technology, however, the IGBT the front as Emitter and the back called the cathode, where but not with the component physical structures of the IGBT correlated.

In the 3B In contrast, the cathode structure of an MCT (MOS-controlled thyristor) shown has a p-type base region 24 with n-type emitter regions embedded therein 23 on. P-conducting islands 22 are in the emitter areas 23 embedded. Conductive channels 28 be between the islands 22 and the base 24 in the emitter area 23 below the gate electrodes 20 educated.

Instead of in the 3A and 3B Of course, the gate in a trench in the semiconductor material shown can also be realized with the planar gate planar cell structures shown, wherein the forming channel is in a direction approximately perpendicular to the second surface 12 is trained. Such arrangements are often referred to as a trench gate.

In the 3C In contrast, the cathode structure of a GTO (gate turn-off thyristor) shown has a p-type base region 25 on, in the n-type cathode regions 26 are formed. Only the cathode areas 26 carry the cathode metallization 41 , Between the cathode areas 26 are gate electrodes 27 arranged.

4 on the other hand shows the structure of a power diode with one in the region of the first surface 11 trained emitter area 18 that with an anode metallization 31 is occupied. Between the emitter area 18 (Anode emitter) and the second back surface here 12 associated with the cathode metallization 41 is covered, the drift area extends 13 , to the second surface 12 towards a field stop layer 16 followed. The effect of the field stop layer with respect to the electric field is in 5 indicated. As can be seen, the electric field in the field stop layer 16 in comparison to the drift zone 13 degraded considerably stronger, so that a penetration of the electric Fel and thus the blocking pn junction between the emitter region 18 and the drift zone 13 not on the backside cathode metallization 41 can pass through.

In the case of in 2A and 2 B Therefore, the semiconductor device generally comprises a first semiconductor region of the first conductivity type (here n-type), a second semiconductor region of the first conductivity type, and a third semiconductor region of the second conductivity type complementary to the first conductivity type, the second semiconductor region being located between the first and third semiconductor regions and with each of these areas each forms a transition region. The second semiconductor region is in 2A and 2 B from the field stop layer 16 is formed, which is doped higher than the first semiconductor region forming drift region 13 , The third semiconductor region is here from the emitter region 18 educated.

In contrast, at the in 4 structure shown, the first semiconductor region disposed between the second and third semiconductor region.

The second semiconductor region (field stop layer 16 ) can be prepared in all structures by the method described above and is doped in particular with sulfur, selenium, indium or antimony, wherein the concentration of the electrically active dopant is greater than 5 · 10 ¹⁵ / cm ³ .

The use of sulfur and especially selenium to form the field stop layer 16 offers particular advantages with regard to the electrical behavior of semiconductor devices. This will be described by way of example on the basis of an IGBT. An exemplary structure of an IGBT is given by combining the in 2A and 3A shown structures. An associated doping profile along a vertical line through the IGBT is shown in FIG 6 shown. This designates 50 the vertical extent of the source region 15 . 51 the vertical extent of the body area 14 . 52 the drift area 13 . 53 that of the field stop layer 16 and 54 those of the emitter area 18 ,

Sulfur and selenium are dopants that each have at least two energy levels with respect to a silicon base material that are within the silicon band gap and are at least 200 meV away from the silicon conduction and valence band. As a result, these dopant atoms are only partially electrically active at room temperature. However, if the region doped with selenium or sulfur is detected by a space charge zone, the dopant atoms become completely active as double donors, ie they act as donors with two released charge carriers, so that a sulfur or selenium atom is charged twice. The energy levels of sulfur and selenium are so deep in the silicon band gap that they are fully electrically activated only when a space charge zone is applied. For example, an energy level of sulfur is 260 meV below the conduction band in silicon and a second energy level is 480 meV above the valence band. The bandgap of silicon is 1120 meV. For selenium, the two energy levels are about 310 meV and 590 meV below the conduction band of silicon. The electrically active dopant profile therefore changes as a function of the extent of the space charge zone, with considerably more dopants being electrically active in the blocking case. In 6 is the different behavior of sulfur and selenium indicated, with 55 the electrically effective dopant profile in the forward direction and with 56 the electrically effective dopant profile is drawn in the reverse direction. The sharp drop in profile 56 This is due to the fact that the space charge zone in the case of blocking only strikes up to the middle of the field stop 16 expands and therefore the selenium or sulfur impurities are fully activated only in this area.

The selenium or sulfur doped field stop layer can furthermore be combined with a proton doping. It will be the first surface 1 respectively. 11 seen deeper dopants produced by proton implantation, while the rather flat dopants are produced by means of selenium or sulfur implantation. Such combined field stop layers are particularly suitable for IGBTs. In 7 , which schematically shows the net dopant profile of an IGBT, are exemplified by two buried proton implants 57 and a bit flatter by comparison (in terms of the first surface 11 ) Selenium doping 58 shown. There may also be more or fewer proton implants. The proton implantations lead to comparatively sharp peaks in the doping profile. The compared to selenium doping 58 deeper proton-induced doping regions 57 With appropriate dimensioning of the penetration depths and the dopant concentrations or dopant doses, the switching behavior positively influences the switching behavior in the direction of smoother switching. As a result, it is possible to dispense with a shallow and relatively highly doped proton doping for achieving the blocking capability that has hitherto been used frequently.

Namely, a shallow and relatively highly doped proton doping can degrade the short-circuit behavior. In addition, in the case of short circuit, the electron density and thus the negative charge in the space charge zone is so high that the positive charge of the dopant atoms is overcompensated. Therefore, the electric field can tilt dynamically with shallow proton doping and then no longer has its highest field strength at the pn junction between body region 51 and drift path 52 , but at the so-called nn + transition at the back field stop. The device loses dynamically to blocking capability and is destroyed. By using sulfur or selenium as a deep donor, this problem can be reduced because it is not fully ionized in thermal equilibrium and thus the electric field of the space charge zone initially penetrates deeper. This means that the vertical pnp transistor of the IGBT has a smaller neutral base width (outside the space charge zone) and thus has a higher current gain. There are thus more holes from the back p-emitter 54 injected, which is the electrical Stabilize field in its gradient and thus ensure the blocking ability.

8th shows measurement results of a selenium-doped doping zone produced by the method described above. Curve 60 shows the measured with a SRP (Spreading Resistance Probing) measurement selenium, which was implanted at a dose of 7 · 10 ¹³ / cm ² at an accelerating voltage of 90 keV. Only a laser annealing step with a pulse having an energy density of 3.8 J / cm ^{2 was} performed. As can be seen, the dopant concentration is in some areas even above 10 ¹⁷ / cm ³ and thus above the solids saturation solubility of selenium in silicon. The relatively sharp drop in the profile 60 suggests the use of the laser anneal. The selenium profile can also be determined with SIMS (Secondary Ion Mass Spectroscopy) measurements in 8th through curve 61 are indicated.

The significant reduction of selenium clusters or crystal defects could verified by TEM analyzes.

By Use of other measuring methods, for example DLTS measurements (Deep level transient spectroscopy) or glow discharge mass spectroscopy, can also be the incorporation of selenium or the other dopants be detected, from which draw conclusions for the targeted adjustment of process parameters for the Derive production of the doping zone.

The The invention was essentially based on semiconductor power devices and in particular power semiconductor devices described. The However, the invention is not limited thereto. With the above However, described methods can also doping zones for example, to produce CMOS semiconductor devices. In particular, indium is of interest for adjusting the threshold voltage a MOS transistor.

The The invention is not limited to the embodiments described above but includes appropriate modification within of the frame indicated by the claims. The attached Claims are to be understood as a first non-binding attempt to describe the invention in general terms.

1

Semiconductor body

2

dopant

3

first surface

4

second surface

5

implanted dopant

6

Doping zone / doping region

7

/ First laser beam temperature treatment

8th

Furnace process / second temperature treatment

9

barrier layer

10

Semiconductor body

11

first surface

12

second surface

13

Drift region / base region / first Semiconductor region

14

Body area

15

source region

16

Doping zone / field stop layer / second semiconductor region

17

Dotierstoffinseln

18

Emitter region / third Semiconductor region

20

gate electrode

21

gate dielectric

22

island

23

emitter region

24

base region

25

base region

26

cathode region

27

gate electrode

28

channel region

30

Back connection

31

Back-side / anode metallization

40

Front connection

41

Front-side / cathode metallization

50

source region

51

Body area

52

drift region

53

stop layer

54

emitter region

55

dopant in the forward direction

56

dopant in the reverse direction

57

proton implantation

58

selenium implantation

60

SRP Profile

61

SIMS profile

QUOTES INCLUDE IN THE DESCRIPTION

This list The documents listed by the applicant have been automated generated and is solely for better information recorded by the reader. The list is not part of the German Patent or utility model application. The DPMA takes over no liability for any errors or omissions.

Cited patent literature

• US 6426248 [0001]
• US 2002/0060353 [0001]
• US 2002/0009841 [0001]
• US 4151008 [0001]
• - DE 10053445 [0003]
• - US 6610572 [0003]
• - DE 102004013932 [0003]
• - US 6482681 [0003, 0005]
• US 6707111 [0003]
• - US 6441408 [0003]
• WO 00/04596 [0003]
• WO 00/04598 [0003]
• US 6455911 [0003]

Claims (26)

Method for producing a doping zone in a semiconductor body, comprising: providing a semiconductor body ( 1 ); - introducing at least one dopant ( 2 ) in the semiconductor body ( 1 ), wherein the dopant ( 2 ) is selected from the group comprising sulfur, selenium, indium and antimony and mixtures thereof; Performing at least one brief first temperature treatment ( 7 ) at a temperature T1; and - performing a comparison with the first temperature treatment ( 7 ) longer second temperature treatment ( 8th ) at a temperature T2 to form a doping zone ( 6 ), where T1 is higher than T2. Method according to claim 1, wherein the first temperature treatment ( 7 ) is performed so that substantially no diffusion of the dopant ( 2 ) in the semiconductor body ( 1 ) he follows. Method according to claim 1 or 2, wherein the duration of the first temperature treatment ( 7 ) is shorter than 10 seconds and in particular shorter than 5 seconds. Method according to one of the preceding claims, wherein the duration of the second temperature treatment ( 8th ) is longer than 1 minute and especially longer than 5 minutes. Method according to one of the preceding claims, wherein - the semiconductor body ( 1 ) a first surface ( 3 ) and one of the first surfaces ( 3 ) opposite second surface ( 4 ) having; - The dopant at least in a partial area in the region of the first surface ( 3 ) is introduced; and - the first temperature treatment ( 7 ) is performed so that the energy for heating the semiconductor body ( 1 ) essentially only its first surface ( 3 ) is supplied. Method according to claim 5, wherein the first temperature treatment ( 7 ) is performed so that the semiconductor body ( 1 ) on its first surface ( 3 ) at least partially melts. Method according to one of the preceding claims, wherein the first temperature treatment is an RTA step or a laser annealing step is. Method according to one of the preceding claims, wherein the dopant ( 2 ) is introduced at a dose which is selected such that the concentration of the dopant in the semiconductor body ( 1 ) is at least partially higher than the solids saturation solubility of the dopant in the semiconductor material of the semiconductor body. Method according to one of the preceding claims, further comprising: - forming a barrier layer ( 9 ) at least on a partial area of the first surface ( 3 ) of the semiconductor body ( 1 ). The method of claim 9, wherein the barrier layer ( 9 ) by oxidation of the first surface ( 3 ) of the semiconductor body ( 1 ) and / or by depositing a layer on the first surface ( 3 ) is formed. Method according to claim 9 or 10, wherein the barrier layer ( 9 ) comprises a material or combination of materials selected from the group comprising silicon nitride and silicon oxide. Method according to one of the preceding claims, further comprising: implanting one of the dopant ( 2 ) different implantation material in the semiconductor body ( 1 ). The method of claim 12, wherein the implantation material passes through the barrier layer (10). 9 ) is implanted therethrough. A method according to claim 12 or 13, wherein the implantation substance with respect to the semiconductor material of the semiconductor body ( 1 ) is non-doping. Method according to one of the preceding claims, wherein the first temperature treatment comprises: - Carry out of at least two short temperature steps. A method according to claim 15, wherein between the temperature steps further dopant ( 2 ) in the semiconductor body ( 1 ) is introduced. Method according to one of the preceding claims, further comprising: - implanting protons in the semiconductor body ( 1 ). Method according to one of the preceding claims, where T1 is in the range above 700 ° C and in particular above 1000 ° C and T2 in the range below 1000 ° C and especially below 950 ° C. Method for producing a doping zone in a semiconductor body, comprising: providing a semiconductor body ( 1 ) having at least a first surface ( 3 ); - introducing at least one dopant ( 2 ) selected from the group comprising sulfur, selenium, indium and antimony and mixtures thereof in the semiconductor body ( 1 ), wherein the dopant ( 2 ) in at least a portion of the first surface ( 3 ) is introduced; Melting at least the partial area of the first surface ( 3 ) of the semiconductor body ( 1 ); and - heating the semiconductor body ( 1 ) for driving the dopant, wherein the semiconductor body ( 1 ) is heated to a temperature below its melting temperature. Method for producing a doping zone in a semiconductor body, comprising: providing a semiconductor body ( 1 ) having at least a first surface ( 3 ); - introducing at least one dopant ( 2 ) selected from the group comprising sulfur, selenium, indium and antimony and mixtures thereof in at least a portion of the first surface ( 3 ) of the semiconductor body ( 1 ); Repeated melting of at least the partial region of the semiconductor body ( 1 ) with several laser pulses ( 7 ). Method according to one of the preceding claims, wherein the semiconductor body is made of silicon. Use of the method according to one of the claims 1 to 21 for producing a power semiconductor device or a CMOS semiconductor device. Semiconductor component, comprising: - a semiconductor body ( 1 ) of a semiconductor material with a doping zone ( 6 ) containing at least one dopant ( 2 ) selected from the group comprising sulfur, selenium, indium and antimony and mixtures thereof, - wherein the concentration of the electrically active dopant in the doping zone ( 6 ) is greater than 10 ¹⁶ / cm ³ and in particular greater than 5 x 10 ¹⁶ / cm ³ . A semiconductor device according to claim 23, wherein the concentration of the electrically active dopant ( 2 ) greater than the solids saturation solubility of the dopant in the semiconductor material of the semiconductor body ( 1 ). A semiconductor device according to claim 23 or 24, wherein the semiconductor device is a power semiconductor device or a CMOS semiconductor device. Semiconductor component according to one of claims 23 to 25, wherein the doping zone ( 6 ) of the first conductivity type and between a first semiconductor region ( 13 ) of the first conductivity type and a third semiconductor region ( 18 ) is arranged by the second conductivity type complementary to the first conductivity type and forms a transition region with each of the first and third semiconductor regions.