DE10112820A1 - Measuring currents in multi-phase converters involves performing a current or voltage measurements on pairs of half bridges combined to form current measurement units - Google Patents

Abstract

The method involves performing a current or voltage measurements on pairs of half bridges (13) combined to form current measurement units. The current or voltage measurement can be performed in a current measurement unit either on the high side (11) or on the low side (12) of the half-bridge involved. Regulator output parameters are fed to a PWM regulator that generates center-aligned PWM signals.

Description

Technical field

Voltage transformers are usually equipped with a regulator. To determine the Controller outputs are the inputs and the currents and voltages required. In the case of voltage converters clocked with multiple offsets, each path (i.e. each Phase) of the voltage converter own current sensors necessary to detect asymmetries and To be able to compensate for tolerances.

State of the art

The conversion of electrical energy, for example in a vehicle electrical system, he usually follows today through static converters. In these power electronics Circuits are often equal quantities in alternating quantities of a certain frequency or vice versa, converted alternating variables into equal variables. The change or equal Variables are for example voltages or currents. For resizing sizes there is also the possibility that equals in equals, for example an equals voltage can be converted into a DC voltage with a different voltage level. With this voltage conversion, energy can flow in both directions gene.

DE 196 46 043 A1 relates to a converter for the conversion of electrical Energy, in the case of a vehicle electrical system, that supplied by a three-phase generator Voltage is transformed. In this known system, the three-phase generator also operated as a starter. So that the machine as both a starter and Generator can work and for optimal control of the output voltage at Genera gate operation, the electrical machine is connected to a controlled rectifier bridge  DC link capacitor connected to the vehicle electrical system including the battery. The Rectifier bridge comprises six pulse inverter elements, which are from a board network control device can be controlled.

DE 199 47 476.1 relates to a converter for the conversion of electrical Energy. There will be converters for the conversion of electrical energy, in particular specified for a vehicle electrical system, which have at least one half-bridge, their on the one hand, at least one high-side and one low-side switch with a predefinable on number of switches included. The high-side and the low-side switch have a ge common connection, which with a means generating the electrical energy in Connection is established. Parallel to the half-bridge is an intermediate circuit capacitor, the Ka capacity should be kept as small as possible. For this purpose, the control of the switches of the Half-bridge offset from each other, so that the DC link current to be supplied remains as low as possible.

With multi-phase converters with four staggered half bridges, one current can be measured in every phase, d. H. Each phase of the half-bridge has its own current measurement element assigned. In addition, in multi-phase converters with offset clocked Half-bridge current measuring elements in the transistor path both on the high side or Arrange on the low side in the transistor path.

The current measuring elements used can, for example, as a shunt or as a compensa tion transducer or the like. In simple circuit arrangements the selection is reduced to the use of shunts.

In multi-phase converters, the number of phases increases with the number of phases used shunts and the evaluation circuit proportional to what the component number and thus driving up costs accordingly.

Presentation of the invention

The advantages that can be achieved with the solution according to the invention can be seen primarily therein ken that offset using the method proposed by the invention clocked multi-phase converters with an even number of phases necessary for its controller controller inputs with a significantly reduced number of ammeters elements can be provided. As current measuring elements can be simple  Circuit arrangements shunts, with more complex arrangements compensation converters deploy.

With the solution according to the invention, the necessary number of current sensors can be be halved. This not only has the immediate effect of component reduction and the associated cost reduction, but reduces the effort, which is to be operated on a downstream circuit for evaluation, considerably. It can current amplifiers, A / D converters and monitoring circuits can be dispensed with, see above that the number of possible sources of error also decreases and the circuit diagnosis can be simplified considerably.

With the solution according to the invention, two currents offset by 180 ° are driven, detected and evaluated with a current measuring element and the controller of the multi-phase converter, such as a voltage converter, is given as input variables. The current measurement is triggered by means of a trigger module to generate current measurement pauses. Compared to conventional regulator arrangements, only half the number of current measuring elements and the electronics associated with them are necessary. Fer ner, the currents to be measured are always recorded in their mean value, so that signal processing with regard to averaging can also be omitted. Rapid overcurrent monitoring can be carried out in the control circuit if the monitoring used is switched over in synchronization with the individual currents I ₁ , I ₂ to be measured.

The arrangement of the current measuring elements can be both on the high side and on the Low-side can be arranged in the transistor path of the multi-phase converter.

Depending on the design of the multi-phase converter with 4, 6 or even higher straight ones Number of half-bridges clocked with offset, is one of this number of inputs or Provide appropriate controller structure for outputs.

A particularly advantageous application of the method proposed according to the invention arises when the control of the transistors in the transistor phases by means of Center-aligned PWM signals occur. The resulting pulse pauses allow a particularly reliable current measurement, since the resulting pulse pauses are sufficient allow appropriate measuring times.

drawing

The invention is described in detail below with reference to the drawing.

It shows:

Fig. 1 is a multi-phase converter (U ₂ / U ₁ voltage transformers) with 4 added clocked half-bridge and current measurement in the transistor path,

Fig. 2 is a multi-phase converter of FIG. 1, but with 6 ken clocked Halbbrüc,

Fig. 3 shows a complete control loop with display of two offset by 180 ° on parent half-bridges,

Fig. 4, 5, the generation of 180 ° -versetzten center-aligned PWM commands,

Fig. 6, the generation of trigger signals (trigger 1 ) and

Fig. 7 shows the generation of 180 ° offset trigger signals (trigger 2 ) for triggering current measurement processes in the multi-phase converter.

variants

The illustration of FIG. 1 is a multi-phase converter (U ₂ / U ₁ voltage transformers) with 4 added clocked half-bridge, and current measurement in the path transistor removed.

In the case of the multi-phase converter 1 shown in FIG. 1 is a voltage converter, whose pending at the input side voltage U 2 is transformed into the tapped off at the output side of the output voltage U 3 _{2 1.} Capacities 4 and 5 are provided both on the input side 2 of the voltage converter 1 as shown in FIG. 1 and on the output side 3 of the voltage converter. As shown in Fig. 1, the voltage converter 1 comprises four offset clocked half bridges 13, each with P1, P2, P3 and P4 are indicated. The individual half bridges 13 of the voltage converter 1 as shown in FIG. 1 are operated with offset clocking 6 , which is 180 °. The half-bridge 13 , P1 and the half-bridge 13 , which is denoted by P3, are operated in absolute terms, operated at 0 ° and 180 °, while the half-bridges 13 denoted by P2 and P4 operated in absolute terms with 90 ° and below 270 ° of phase angle become.

The individual half bridges 13 each include a transistor 8 on their high side 11 and their low side 12 , the transistor base 9 of which is controlled via a pulse width modulated signal, as will be shown below. A blocking diode 10 is connected in parallel with the respective transistor 8 on the high side 11 and the low side 12 of the half bridge 13 . The individual half bridges 13 , ie P1, P2, P3 and P4 are provided with decoupling inductors 7 .

Two of the half bridges 13 in the example shown in FIG. 1, the half bridges P1 and P3 and the half bridges P2 and P4 are connected together to form current detection units 15 . In the illustration according to FIG. 1, current and voltage measuring elements 14 are assigned to the respective current detection units 15 , each consisting of two half bridges 13 , which are clocked offset from one another. In the illustration of FIG. 1, the current and voltage measuring elements 14 lying on the low side of the respective half bridges 13. Alternatively, the current detection elements 14 lying on the low side 12 in FIG. 1 can also be arranged on the high side 11 of the respective half bridges. The decisive factor is that by means of the method proposed according to the invention with a current measuring element 14, the currents detected in two half-bridges 13 are evaluated and a controller (not shown in FIG. 1) can be provided as input variables.

The illustration according to FIG. 2 shows a multi-phase converter according to FIG. 1, but with 6 clocked half bridges.

The multiphase converter 2 , which can be a voltage converter analogously to the illustration according to FIG. 1, converts a voltage U ₁ present at the input side 2 into an output voltage U _{2 which can} be tapped at the output side 3 . Capacities 4 and 5 are recorded both on the input side 2 and on the output side 3 of the multiphase converter as shown in FIG. 2. In contrast to the Dar position shown in FIG. 1, the multi-phase converter shown in FIG. 2 comprises 6 half bridges 13 , which are characterized by P1, P2, P3, P4, P5 and P6. Each of the half bridges 13 comprises a capacitor 8 on the high side 11 , to which a blocking diode 10 is connected in parallel. This arrangement can also be found on the low side 12 of the respective half bridges 13 , designated P1 to P6, again. Analogously to the illustration according to FIG. 1, each half bridge 13 is assigned a decoupling inductance 7 .

Two of the half-bridges 13 , in the illustration according to FIG. 2, the half-bridge P1 and the half-bridge P4, or the half-bridge P2 and the half-bridge PS as well as the half-bridge P3 and the half-bridge P6, are connected together to form common current detection units 15 , which on the Low-side 12 of the respective half-bridges 13 is assigned a current or voltage measuring element 14 . In simple circuit arrangements, the current or voltage measuring element 14 can be designed as a shunt; the current or voltage measuring element can, however, just as well be designed as a compensation converter. The 6 half bridges provided in the illustration according to FIG. 2 on the multi-phase converter 1 can each be operated with an offset clocking 6 of 180 °. By assigning a current measuring element 14 in the form of a shunt or a compensation converter to a respective current detection unit 15 , the two currents I ₁ , I ₂ of each half-bridge 13 can be detected with a common current measuring element, evaluated and one in the representations according to FIG Enter 1 and 2 controllers, not shown, as input variables. On the one hand, this allows the number of components to be used to be reduced, and on the other hand, the outlay which has to be carried out with regard to a downstream circuit is considerably minimized. Current measuring amplifiers, analog / digital converters and monitoring circuits can subsequently be reduced, thus reducing the potential for errors.

The representation of FIG. 3 is a complete loop with display of two offset by 180 ° are arranged half-bridges removed.

Representing a current detection unit 15 according to one of FIGS . 1 or 2, the low-side regions 12 of two half-bridges 13 are shown in the illustration according to FIG. 3, in each of which a transistor 8 with an associated transistor base 9 is accommodated. Blocking diodes 10 are connected in parallel to the transistors 8 in each of the half bridges 13 . The transistor base 9 is controlled in each case by a PWM signal 2 , reference numeral 39 or by a PWM 1 signal 38 , the two PWM signals 38 and 39 being generated by a PWM controller 35 .

The currents I ₁ and I ₂ in the unit of two half-bridges 13, the common current detection 15 are connected via a current detection unit 15 assigned to current or voltage clamping element 14 is determined. The current measurement 16 takes place by means of resistors 17 and egg nes the operational amplifier 16 associated operational amplifier. A current monitoring unit 20 is arranged downstream of the current measuring unit 16 in the illustration according to FIG. 3, by means of which overcurrents which occur can be detected and appropriate safety measures can be initiated. The monitoring unit 20 comprises an operational amplifier 22 , on the input side of which a maximum permissible current value 21 can be entered. By FIG. Monitoring unit 20 shown 3, an error signal 23 generated Center, which triggers the initiation of turn-off operations and the like can.

A sample and hold module 27 is arranged downstream of the tap point 24 at which the output-side currents of the current measuring unit 16 are transmitted to the monitoring unit 20 . This includes an opening or closing switch 26 , which is followed by a capacitance 25 . The sample and hold module 27 also includes an operational amplifier 22 ; the sample and hold module 27 is followed by an A / D converter 28 , which in turn is followed by a switch 29 via which either the measurement of the current I ₁ , reference symbol 30 , or of the current I ₂ , reference symbol 31 , is triggered can.

The measured values for the currents I ₁ , reference symbol 30 , and I ₂ , reference symbol 31 are fed to a controller 32 of the multi-phase converter 1 , which can be configured, for example, as a microprocessor. On the output side, controller 32 generates a 1st PWM control variable 34 and a 2nd PWM control variable 33 , which are each input to the PWM controller 35 . In the PWM controller 35 , which is connected downstream of the controller 32 of the multiphase converter 1 , a PWM 1 signal 38 and a PWM 2 signal 39 are probably generated on the output side. On the output side, who also generates a 1st trigger signal 36 or a 2nd trigger signal 37 in the PWM controller 35 . The two trigger signals 36 and 37 are both at the switch 29 , with which in the current measurement for I ₁ , reference symbol 30 , as well as in the current measurement for I ₂ , reference symbol 31 , can be branched, as well as on the A / D converter 28 , which is arranged downstream of the sample and hold module 27 . The 1st trigger signal 36 and the 2nd trigger signal 37 are also given an "OR" operation 40 , the output value of the "OR" operation 40 both the switch 26 of the sample and hold module 27 and the one downstream of it A / D converter 28 is supplied.

The PWM signals 1 and 2 , reference symbols 38 and 39 , generated on the output side at the PWM controller 35 are available as center-aligned PWM signals 59 and control the corresponding bases 9 of the transistors 8 , which are located in the two half bridges 13 , from which a current detection unit 15 is formed, are arranged.

The representations according to FIGS. 4 and 5 is the generation of 180 ° offset Cen ter-Aligned PWM signals can be seen.

Fig. 4 shows the generation of center-aligned PWM signals 59 based shows a lying at a constant voltage level 56 the control voltage 50 and a reference voltage based 51st The reference voltage 51 can be characterized by falling edges 52 or rising edges 53 . At the intersections 54 of the falling edges 52 and the rising 53 of the reference voltage 51 with the essentially constant ver current control voltage 50 , switching points arise which define the pulse breaks 58 of the center-aligned pulse width signal 59 and its pulse duration 61 .

The center-aligned PWM signal as shown in FIG. 4, reference numeral 59 is generated by a digital switch 55 , on the positive input side of which the reference voltage 51 and on the negative input of which the control voltage 50 is present at constant level 56 .

In contrast, the representation may be shown in FIG. 5 a shifted center-aligned PWM signal found. In contrast to the illustration of FIG. 5, the STEU extends erspannung 50 in the upper diagram of Fig. 5 on a second control voltage level 57 which is below the voltage level 56 of the control voltage 50, as shown in Fig. 4. This results in shifted switching points 54 when the reference voltage 51 is applied analogously at the digital switch 55 , at which the reference voltage curve 51 with its falling edges 52 or its rising edges 53 intersects the control voltage 50 , which runs essentially constant, to the second control voltage level 57 thereof. The pulse durations 61 or pulse pauses 58 given by the switching points of the falling edges 52 or the rising edges 53 are shifted relative to the PWM signal 59 by the offset 60 as shown in FIG. 4.

With the center-aligned PWM signals 59 generated in FIG. 4 and FIG. 5, the respective transistor bases 9 in the low-side region 12 of the two half-bridges 13 of the current detection unit 15 are applied as shown in FIG. 3. Characterized the designated in Fig. 1 and Fig. 2 by double arrows respective offset clocking 6 can be realized.

The illustration of FIG. 6 is the generation of trigger signals (trigger 1) ent nehmbar.

For this purpose, both a reference voltage 51 and a trigger voltage 70 are applied to a digital switch 55 . The trigger signal 36 has the form of a center-aligned PWM signal, which however differs from this by a shorter pulse duration 74 and a longer pulse pause 73 .

The trigger voltage 70 U _trigger runs as shown in FIG. 6 in the upper diagram at an essentially constant level, designated by reference numeral 71 . The reference voltage 51 assumes the sawtooth-shaped course already described in connection with FIGS. 4 and 5 and is essentially characterized by rising flanks 53 and falling flanks 52 . At the switching points 54, the rising edges 53 and the falling edges 52 of the reference voltage 51 cut the trigger voltage, as a result of which a trigger signal 1 , reference numeral 36 , is generated. Depending on the level of the trigger voltage, the pulse durations 74 of the trigger signals 36 or 37 can be set and relatively shifted relative to one another. It can be seen from the course of the trigger signal 1 , reference number 36 , shown in FIG. 6 that the trigger pulse pauses 73 which occur are longer than the pulse pauses 58 of the PWM signals according to the representations in FIGS. 4 and 5, and that the duration of the trigger signal 1 , 36 , designated by reference numeral 74 , is shorter than the pulse duration 61 of a PWM signal 38 or 39 (center-aligned PWM signal 59 ).

Fig. 7 shows the generation of 180 ° offset trigger signals (trigger 2 ) to trigger current measurement processes in the multi-phase converter.

The representation according to Fig. 7 can be taken that the trigger voltage (U _trigger) runs on a second trigger voltage level 72 70, which lower is as the trigger clamping voltage level 71, as shown in Fig. 6. As a result, shifted switching points 54 set at which the rising signal edge 53 or the falling signal edge 52 intersect the trigger voltage 70 U _trigger , which runs essentially at a constant voltage level 72 . By the selected 2nd voltage level 72 of the trigger voltage 70 , a displacement of the trigger signals 36 and 37, identified by reference numeral 60 , can be realized. Shown in Fig. 6 and 7 respectively in the lower slide of the curves of the 1st and the 2nd trigger signal given program. 36 and 37 each have common trigger signal intervals 73 and common trigger signal pulse durations 74, but are shifted from each other by the offset 60th

From the generation of offset PWM signals 38 and 39 as center-aligned PWM signal 59 and the generation of offset trigger signals 1 and 2 , reference symbols 36 and 37 , on the PWM controller 35 , the measurement of the currents 30 and 31, respectively I ₁ , I ₂ in the current detection unit 15 via a common current measuring element 14 , be it a shunt or be it a compensation converter. The pulse pauses 58 of the PWM signals 38 and 39 as center-aligned PWM signals 59 are dimensioned such that the other current can be measured in the pulse pauses of a current of the currents I ₁ and I ₂ and vice versa. For this purpose, the PWM range from 5% to 95% is set on the PWM controller 35 , which is assigned to the controller 32 of the multiphase converter 1 . The switch 29, which triggers the respective current measurement of current I ₁ or I ₂ in the illustration according to FIG. 3, is acted upon via the trigger signals 36 or 37 present on the output side of the PWM controller 35 . Synchronized to this control of the switch 29 , an "OR" logic element 40 acted upon by the trigger signals 36 or 37 is used to select one of the trigger signals at the sample and hold module 27 or at the A / D converter 28 arranged after it , As a result, the current measurement 16 on the current measuring element 14 of a current detection unit 15 is continuously between a half bridge 13 (P1) in coordination with the pulse pause lengths 58 of the PWM signals 38 and 39 , which are generated as center-aligned PWM signals 59 by the controller 35. switched to the half-bridge P3 operated in offset clocking 6 or in accordance with FIG. 2 from the half-bridge P1 to the half-bridge P4 etc.

For several phases than the four or six phases shown in FIG. 1 or FIG. 2, ie half bridges 13 in the multi-phase converter, the controller 32 assigned to the multi-phase converter 1 is to be designed with a correspondingly larger number of controller inputs and outputs. The circuit elements which increase the costs in such circuit arrangements, for example a current measuring element, A / D converter and evaluation circuit, are reduced by half by means of the method proposed according to the invention.

LIST OF REFERENCE NUMBERS

1

Multiphase converter

2

Input side (U ₁

)

3

Output side (U ₂

)

4

input capacitance

5

output capacity

6

offset clocking

7

Decoupling
P1 phase
P2 phase
P3 phase
P4 phase
P5 phase
P6 phase

8th

transistor

9

transistor base

10

blocking diode

11

High Side

12

Low Side

13

half bridge

14

current sensing

15

Current detection unit

16

current measurement

17

resistance

20

monitoring module

21

Maximum value input

22

operational amplifiers

23

error signal

24

tapping

25

capacity

26

switch

27

Sample & Hold module

28

A / D converter

29

switch

30

Current I ₁

31

Current I ₂

32

Controller (µP)

33

1

, PWM control Size

34

2

, PWM control Size

35

PWM controller

36

1

, trigger signal

37

2

, trigger signal

38

PWM 1 signal

39

PWM 2 signal

40

"Or link

50

Control voltage U _St

51

Reference voltage U _Ref

52

falling edge

53

rising edge

54

switching point

55

digital switch

56

1

, Control voltage level
57th

2

, Control voltage level

58

pulse pause

59

Center-aligned PWM signal

60

transfer

61

pulse duration

70

Trigger voltage U _trigger

71

1

, Trigger voltage level

72

2

, Trigger voltage level

73

Trigger signal pause

74

Trigger signal duration

Claims (13)

1. A method for measuring currents and voltages on multiphase converters ( 1 ) which are provided with a controller ( 32 ), which currents ( 30 , 31 ) or voltages are given as input variables for calculating controller output variables ( 33 , 34 ) and the half bridges ( 13 ) which can be operated with an even number in offset clocking ( 6 ), characterized in that the current or voltage measurement ( 16 ) is carried out on two half bridges ( 13 ) combined to form a current detection unit ( 15 ). 2. The method according to claim 1, characterized in that the current or voltage measurement ( 16 ) in the current detection unit ( 15 ) either on the high side ( 11 ) or on the low side ( 12 ) side of the respective half-bridges ( 13 ) takes place. 3. The method according to claim 1, characterized in that the controller output variables ( 33 , 34 ) are fed to a PWM controller ( 35 ) which generates center-aligned PWM signals ( 59 ). 4. The method according to claim 3, characterized in that the PWM controller ( 35 ) on the output side generates both a PWM 1 signal ( 38 ) and a PWM 2 signal ( 39 ) and trigger signals ( 36 , 37 ). 5. The method according to claim 3, characterized in that the modulation range for the center-aligned PWM signals ( 59 ) is between 5% and 95%. 6. The method according to claim 3, characterized in that the offset ( 60 ) of the PWM 1 signal ( 38 ) to the PWM 2 signal ( 39 ) corresponds to the offset timing ( 6 ) of the two half bridges ( 13 ) of the current detection unit ( 15 ) , 7. The method according to claim 4, characterized in that the pulse duration ( 61 ) of the PWM 1 and the PWM 2 signal ( 38 , 39 ) exceeds the pulse duration ( 74 ) of the trigger signals ( 36 , 37 ). 8. The method according to claim 1, characterized in that the half bridges ( 13 ) of the current detection unit ( 15 ) in an offset timing ( 6 ) of 180 ° operated who. 9. The method according to claim 4, characterized in that the trigger signals ( 36 , 37 ) and the PWM 1 or PWM 2 signals ( 38 , 39 ) are synchronized such that in the pulse pauses ( 58 ) of the PWM 1 signal ( 38 ) the current I ₂ ( 31 ) and in the pulse pauses ( 58 ) of the PWM 2 signal ( 39 ) the current I ₁ ( 30 ) is determined. 10. The method according to claim 4, characterized in that the current or voltage measurement ( 16 ) in the current detection units ( 15 ) by means of measuring elements ( 14 ) such as shunts. 11. The method according to claim 4, characterized in that the current or voltage measurement ( 16 ) in the current detection units ( 15 ) via measuring elements ( 14 ) serving as compensation transducers. 12. The method according to claim 4, characterized in that the trigger signals ( 36 , 37 ) of the PWM controller ( 35 ) has a switching element ( 29 ) for selecting currents I ₁ , I ₂ ( 30 , 31 ) with the interposition of a " OR "link ( 40 ) to a sample and hold module ( 27 ) and an A / D converter ( 28 ). 13. The method according to claim 4, characterized in that the current / voltage measurement ( 16 ) an overcurrent / overvoltage monitoring ( 20 ) is assigned.