DD294831A5 - ARRANGEMENT FOR OBJECT IDENTIFICATION - Google Patents

Abstract

The invention relates to an arrangement for object identification, which can preferably be used in automated goods recognition, control or identification of objects in the Produktionsprozesz, in transport processes, but also as an electronic locking device in security technology or for personal identification or control. It solves the task to develop such an arrangement, the energy required for operation of the data carriers used is provided wirelessly by a used interrogator, the data transfer from the data carriers to the interrogator with high interference security and all functional elements of the data carriers can be realized with minimal volume requirements , Data carriers, which are each assigned to objects to be identified, are transmitted inductively by an interrogator in the form of pulse-modulated high-frequency waves. The data carriers are used to generate an operating voltage and to demodulate reset and synchronizing pulses. The data carriers also contain memories programmed with the identification data, which are read out on initialization. Depending on the memory occupancy corresponding to the received sync pulses light pulses via an infrared transmitter to the interrogator, in which the identification data are decoded and provided for evaluation output. Fig. 1 {object identification; Interrogator; Datentraeger; Code card; RF transmitter; high-frequency waves, pulse-modulated; Loop antenna; Sync pulse; Infrared transmitter}

Description

For this 4 pages drawings

Field of application of the invention

The invention relates to an arrangement for object identification, consisting of an interrogator and possibly more data carriers, which are conveniently designed as a flat code card (in check card format) and attached respectively to or in the surface of the objects to be identified and by the interrogator at possible relative distances can be read from a few centimeters to decimeters, the arrangement preferably in automated goods identification, control or identification of objects in the production process, in particular in the context of computer-aided manufacturing (CIM), in transport processes, but also as electronic locking device in the security technology or Person identification or control can be used.

Cha akterletik the known prior art

Arrangements and methods for object identification using additional data carriers are known in great variety and for a very wide variety of applications. In their basic configuration, they always consist of an interrogation device and the data carriers assigned to objects to be identified.

Simplest solutions use markers in a specific code on the objects to be identified

be applied. Bar codes are generally widespread, especially in goods recognition

Application experienced. Corresponding systems are u. a. in DE-OS 28 22 573 and in the W0-Anm. 88/05675. Such barcodes are read by special readers, so-called scanners. The scanners must be in the lowest possible Distance and relatively accurate positioning led over the code or it must be consuming and expensive laser or CCD scanners are used. The slightest dirt or damage can barcodes already

become unidentifiable. To change the coded data, the old barcode marks must be removed and

new ones are applied. '

Convenient systems where data from objects with high immunity to interference can be read and the one Programmability of the data to some extent provide, therefore, use disk, which in you

stored information Actively output carrier media.

In such systems, however, it is necessary to power the data carriers. For this purpose, an arrangement for automatic identification of objects is described in DD-WP 277141, in which the Data carriers which are in the form of induction loops with special geometry, as which the identification data are encoded,

be inductively powered by a transmitting coil.

To identify itself, the inductive loops are sampled and from the phase comparison between the emitted

and the induced voltage recovered the data.

However, a very close coupling between the interrogator and the induction loops is required. Let it

If very little information is transmitted in this way, problems with regard to noise immunity also arise.

To avoid the latter disadvantages is in the arrangement according to WO-Anm. 86/01058 an electronically active Disk used. In this case, an evaluation device designed as a fixed station and the data carrier each contain one Oscillation circuit using ferrite antennas. For identification, both oscillating circuits are inductively coupled. The data carrier is used for this purpose

required energy is transmitted via an RF signal frequency-modulated with synchronization signals, the data output to the base station takes place by means of an amplitude-modulated RF signal.

In addition to the required close coupling between the resonant circuits is disadvantageous that the realization of the Ferrite antenna a larger (volume) effort of the disk appears or more powerful RF transmitter and sensitive Receiver in the base station are required. The principle described above finds general application in electronic locks, cf. DE-OS 3149789 and DE-OS 3813492, where the close coupling between the lock and electronic key is given a priori ι. A convenient, electronic goods accompanying card "for use in the technological process of production of Semiconductor chips is in the font "SMART Traveler System. Integrated Solution for Material Control Automation "; ASYST Technologies; Oct. Described in 1987. It is between the data carriers and evaluation a bidirectional connection via infrared LEDs and

Phototransistors designed. The data carriers can be read out and described with new data. In addition, it is still possible to output selected data via an LCD display on the data medium.

To power the disk, however, makes a permanent autonomous power supply, d. H. the use of Fuel elements, usually lithium cells, are required because of the power consumption of the data carrier through their Free programmability and the use value increasing measures but considerable or no longer failure

the power supply is allowed.

The need for fuel assemblies, as well as the maintenance required for them, the cyclic replacement of used elements,

as well as the greater circuit complexity and thus higher costs represent the serious disadvantages of this system.

In addition, the majority of object identification system applications do not have unrestricted use Free programmability of the media and an additional visual data output on the disk itself required. Object of the invention

The object of the invention is an arrangement for object identification, which is feasible with minimal effort and allows the transmission of a larger number of information about variable distances in the centimeter to decimeter range, without the data carriers to be identified have an autonomous interno power supply.

Explanation of the essence of the invention

The invention has for its object to develop an arrangement for object identification, bsi of the disks used the energy required for operation is provided wirelessly by a used interrogator, the data transfer from the data carriers to the interrogator with high noise immunity and all functional elements of the disk least Volume requirement (in check card format) can be realized. To solve the problem, an arrangement for object identification is proposed which bosteht from at least one interrogator and at least one disk, which is assigned to be identified each Objokten. In this case, the interrogator includes a pulse-modulated radio frequency transmitter and is further equipped with a receiver which is connected to an evaluation device for determining identification data to the objects. The data carrier is provided with an antenna which receives it for energy supply from the interrogation device and which receives the radio frequency energy.

According to the invention, an operating voltage of the data carrier providing power supply circuit is connected to the receiving antenna, whose outputs are connected to an energy storage. At the receiving antenna, a sync pulse filter is further connected, which is provided with a sync pulses and output with a reset pulses output. The pulses mentioned are related to the inputs of a

Adreßgenerators performed. Outputs of this address generator are connected to address inputs of a memory in which the Identification data are stored connected. The data outputs of this memory are related to the inputs of a parallel-serial Converter. Its output is connected to an input of a gate circuit, on the second input of which Synchronous pulses are performed. The output of the gate circuit is connected to the input of a monoflop at deesem Output a transmitter for light pulses is connected. The transmitter is the recipient of the photosenscr in the Associated with the interrogator. Furthermore, the evaluation device with a modulation of the high-frequency transmitter

controlling synchronous pulse generator connected.

The interrogator transmits continuously or cyclically modulated high-frequency waves with control pulses. Is through

Given spatial proximity an inductive coupling to a disk, so this is via its receiving antenna the

Transmit RF energy. In the power supply circuit it is about rectification and stabilization the Operating voltage of the data carrier won. The connected energy storage realized a storage for a Output of powerful light pulses via the transmitter. You me the synchronous filter is the demodulation of the HF carrier wave modulated pulses. These will be after yours Parameters are distinguished so that synchronous and reset pulses can be derived. At the first received reset pulse, the address generator is reset and then generates, with each

progressing synchronous pulse, successively each address assignment of the memory. The memory is read out accordingly, the identification data are read out serially, the identification data are converted serially and the monoflop controlled by the synchronizing pulses is triggered. Depending on the memory occupancy, this corresponds to the

Synchronimpuisen the transmitter for light pulses driven and there is the output or suppression of the Sync pulse to be assigned light pulse. The light pulses are absorbed by the photosensor of the interrogator and after appropriate formation and Transfer gain to the evaluation. In the evaluation are by comparing the sync pulses

decoded with the received light pulses stored in the data carrier identification data and further

Evaluation provided. By combining high-frequency energy transfer with simultaneous transmission of synchronization pulses

by modulation of the energy carrier and the transmission of the identification data by means of the infrared connection between

Disk and interrogator is a very secure data transmission even in wide limits (centimeter to Decimeter range as technically meaningful) variable position of data carrier and radio frequency transmitter / interrogator

possible.

The circuit complexity for the realization of particular the disk is low. To make the volumes also for the immediate user, i. in use, to have programmable; is in a first Embodiment of the solution according to the invention, the function of the memory and the function of the identification data

converting parallel-to-serial converter also advantageously by a single programmable and erasable in further refinement logic device based on nonvolatile memory elements.

In this arrangement, the data carrier with led out as inputs for external programming data inputs of To provide memory. The synchronizing pulse filter of the data carrier can be used in a further embodiment of the invention for pulse shaping Reclamation be preceded by sieve chain. In a preferred embodiment of the invention, the receiving antenna is tuned to the radio frequency transmitter or

executed coordinated. Thus, the noise immunity can be further increased, at the same time there is a reduction in the required transmission power for the high-frequency transmitter.

As a further embodiment variant, the receiving antenna is one in the conductor material of a printed circuit board of the data carrier

integrated loop antenna realized.

About the described integration of the loop antenna in the layout of the circuit board of the disk and using SMD components irt in a further advantageous embodiment of the inventive arrangement of the disk as a flat,

on the card (code card) to be attached to the object to be identified.

embodiment The invention is explained below with reference to an embodiment and four drawings. Show Fig. 1: the block diagram of the arrangement according to the invention 2 shows the circuit diagram of a data carrier 3 shows the circuit diagram of an interrogator 4a shows a pulse diagram of the demodulated RF voltage in the data carrier 4b: a timing diagram of the control pulses for the transmitter for light pulses. As shown in Fig. 1, the inventive arrangement uses an interrogator 1 and to be identified Object associated with, run as a code card disk 2, one of which is shown. The interrogator 1 contains a high-frequency generator 3.1, which via a modulator 3.2 a high-frequency amplifier 3.3

controls, is connected to a running as ferrite antenna transmitting antenna 3.4.

The thus configured radio frequency transmitter 3 transmits inductively to the code card 2 required for their power supply Energy. The RF energy control pulses are modulated in the form of reset and synchronizing pulses. This is the Modulator 3.2 controlled by a Synchronimpulsgenerator4. Furthermore, dio interrogator 1 includes a photosensor 5 for receiving the sent from the code card 2 Information. It is followed by an amplifier 6, the outputs of which are connected to an evaluation device 7. The evaluation device 7 need not be part of the interrogator 1, it may e.g. a separate calculator or

a process computer of the system using the object identification system is used, which recorded the

Information processed and outputs corresponding identification data or provides for further processing. The Evaluation device 7 furthermore controls the synchronization pulse generator 4. A code card 2 contains, integrated into its board, a printed loop antenna 8 which is connected to the radio-frequency transmitter 3

is tuned. The loop antenna 8 is connected in parallel with a capacitor 9, so that a parallel resonant circuit is formed.

On the loop antenna 8 is the operating voltage Ub of the code card 2 providing power supply circuit 10th

connected, whose outputs are connected to an energy storage 11.

Furthermore, the loop antenna 8 is impressed with a sync pulse filter 12 for demodulation of the RF energy Rear seat and synchronizing pulses connected. It accordingly has a reset pulses RESET and a Sync pulses SYN output. These pulses are in turn applied to the inputs of an address generator 13, the outputs of which address lines of a Memory 14, in which the identification data are programmed, are connected. Generated on appropriate initialization

the Adreß'generator 13 successively successively the address assignments of the memory 14 so that it is read.

At the data outputs of the memory 14, a parallel-to-serial converter 15 is connected, the parallel augelesenen Issues identification data serially. The output of the parallel-to-serial converter 15 is connected to an input of a gate circuit 16

connected, at whose second input the sync pulses SYN abut. The output of the gate circuit 1 β controls

Monoflop 17, so that the monoflop 17 is driven by synchronized with the identification data synchronizing pulses. The output of the monoflop 17 controls a transmitter 18 for light pulses via which the identifier data is sent to the Interrogator 1 will be handed over. In this case, the transmitter 18 from an electronic switch 18.1 and that of him

switched actual transmitter, a light source 18.2, constructed .. The light source 18.2 is the output of powerful

Transmit pulses from the energy storage 11 fed. FIG. 2 shows a concrete embodiment for a code card 2. The loop antenna L1 forms with the capacitor C1 in the manner already described an input or Receiving resonant circuit. One node of the resonant circuit is grounded, at the other node are two diodes VD1; VD2

connected on the anode side.

The cathode terminal of the diode VD 2 is connected to one terminal of an electrolytic capacitor C 2, the cathode of a Zener diode VD3 and

one terminal of a capacitor C4 whose other terminals are grounded. The elements VD 2;

C 2; VD3; C4, the power supply circuit 10; at the node at the anode of the zener diode VD3 is the by rectification with

following operating voltage Ub obtained from code card 2.

This node is furthermore connected via a resistor R4 with an electrolytic capacitor C 5 functioning as an energy store 11,

whose second terminal is grounded connected. The capacitor C5 realizes a storage dor energy for the high-power transmission pulse of the transmitter 18th

The cathode terminal of the diode VDI is connected to the input of a trigger negator D 1.1 and via a resistor RI to ground

guided.

The output of the inverter D1.1 is initially connected to the clock input of an RS-D flip-flop D 2. It lies the Set input of the flip-flop D2 to ground and the data input to the operating voltage Ub. The data output is via a Resistor R3 to the reset input of the flip-flop D2 and above a capacitor C3 to ground. That's it Flip-flop D2 connected as a monostable, wherein the elements R3; C3 form the timer, so that a time constant tau the Monoflops to tau = R3 * C3 yields. Furthermore, the output of the inverter D1.1 is connected to an input via a resistor R2

a Trlgger NAND gate D 1.2 out whose second input is connected to the negated output of the flip-flop D2.

The elements VD1, D1.1, R1, D2, R3C3, R2, D1.2 form the synchronizing pulse filter 12. The output of the NAN D-gate D1.2 is connected to the reset input of a four-digit via another trigger-inverter D1.3 Binary counter D3 is set, whose clock input is connected to the output of the gate D2. The binary counter D3 works as Address generator 13. The three least significant of the four outputs of the binary counter D3 are respectively to the three address inputs of a first and

second 8-channel Murtiplexers D4; D5 and the most significant output of the binary counter D3 is fed to the negated selection input of the first multiplexer D4 and negated to the negated selection input of the second multiplexer D5. The two

Multiplexer D4; D 5 represent the parallel-to-serial converter 15. The least significant data input of the first multiplexer D4 Is with the operating voltage Ub, all other data inputs of Multiplexer D4; D5 are connected to associated data outputs of a memory / programming circuit P in which the Programming the identification data is made. This is not specified. In the simplest way, how

As shown, it is implemented as a matrix of wire bridges, via which their outputs are connected to the operating voltage.

If there is a bridge for an output, the operating voltage at the associated input is one of the Multiplexer D4; D5. In the memory / programming circuit P, 15 bit positions are available for programming, so that 2 (exp15) »32,768 States coded can be stored. The data outputs of the multiplexers D4, D5 are interconnected to the data input of another RS-D pad D1

led, whose set input ai. Ground and whose clock input is connected to the output of the inverter D1.1. The

Data input is still grounded via resistor R9. The output of the flip-flop Dθ is via a Resistor R β to the reset input of the flip-flop D6 and connected via a capacitor C6 to ground. In order to

Flip-flop D6 also operates as a monoflop, i. it represents the monoflop 17, wherein the elements R6; C6 the timer with the

Tent constant tau '= R6 »C6 and the monoflop over the output data of the multiplexer D4; D5 at his data input

getortwird.

The negated output of the flip-flop D6 is fed via a resistor R8 to the base terminal of a pnp transistor VT1,

whose Emltter & connection is connected via a resistor R7 to the operating voltage terminal of the capacitor C5 and in whose collector circuit, an infrared LED BD1 is connected to ground. In this case, the elements R7 mentioned form; R8;

VT1; BD1 the transmitter 18. A concrete embodiment for an interrogator 1 is shown in FIG. This contains as a high-frequency generator 3.1 a quartz crystal Q, whose one output via an inverter D7.1 and a

second inverter D7.2 is connected to its second output, which is the output of the RF generator 3.1. At the same time, the first output of the quartz crystal Q is connected via a resistor R10 to the input of the second inverter D7.2.

The output of the HF generator 3.1 is fed to an input of a NAND gate D7.3, whose second input via a Resistor R11 at an output of a working as a Auewerteeinrichtung 7 and the function of Synchronous pulse generator with accepting single-chip microcomputer EMR, via which the reset and synchronizing pulses

be output, is connected. The output of NAND gate D7.3 is via a negator D7.4 and a

Resistor R12 placed on the base terminal of a npn-Translstors VT2. The elements R11; D7.3; D7.4; R12 provide the Modulator 3.2. Transistor VT2 represents the RF output stage 3.3 and drives in its collector circuit against the operating voltage Ub 'the Interrogator 1, the transmission antenna designed as a ferrite antenna L2 3.4, a capacitor C7 to a Parallel Schwingkrele is connected in parallel. Weiterhrirr contains the interrogator 1 serving as a photo sensor 5 infrared receiver. This one is strong

simplified version of a photodiode VT3, the katodonseitig ground and whose anode terminal with dom

Input of a fed back via a resistor R13 operational amplifier A1 is connected. Its output is on

connected to a single-chip microcomputer EMR.

The single-chip microcomputer has communication options via an RTTY interface, which is managed via drivers ET or ST Input ports ED and output ports SD are provided. Furthermore, the visual output of the received and

processing identification data in the interrogator 1, a display unit BD2 implemented via decoder /

Driver D8 are connected to another output port of the single-chip microcomputer EMR. The function of the arrangement according to the invention in the complex is explained below: From the RF generator 3 of the interrogator 1 via the ferrite antenna L 2 continuously or cyclically high-frequency

emitted electromagnetic worlds. The frequency used is relatively high and should be given as 13,660 MHz in the example.

In this case, the RF oscillations, controlled by the single-chip microcomputer EMR, via the modulator 3.2 by pulses

modulated different width. In the example, pulses of a width A are used as reset pulses and pulses with a width B which is much smaller than A are used as synchronizing pulses.

In a resting state, d. H. if no inductive coupling between the transmitting antenna 3.4 of the interrogator 1 and the Receiving antenna 8 is given one of the code cards 2 and the interrogator 1 receives no light pulses, the

emitted RF energy is modulated only with return pulses.

If the interrogator 1 addresses one of the code cards 2, then the phase of the exclusive modulation of the RF energy

with reset pulses used to test a secure data transfer between the code card 2 and the interrogator 1.

During the identification process, the RF generator 3 of the interrogator 1 becomes inductive via the ferrite antenna L2 Transfer energy to the code card 2 printed loop antenna L1. The induced RF voltage is applied to the diode VD2 for deriving the operating voltage Ub, which has already been described

was, and at the diode VD1.

Via the diode VD1, transistor R1 and the input capacitance (not shown) of the inverter D1.1, the demodulation takes place

the impressed pulses; these are then available as reset RESET and sync pulses SYN low active at resistor R1.

4a shows the associated timing diagram. The pulse width of the reset pulses RESET used is greater than the selected time constant tau = R3 ♦ C3 of the first Monoflop switched flip flops D2. This monoflop now works in conjunction with the trigger negatives D 1.2; D 1.3 as pulse width discriminator. The first reset pulse RESET received at the beginning of an identification operation switches the NAND gate D 1.2 to low,

so that the reset input of the binary counter D3 is activated via the negator D 1.3 and the binary counter D3 is reset. Of the multiplexers D4; D 5 is addressed so that the multiplexer D4 with its least significant address. At his

Output is in this state because of the lowest-valued data input firmly applied operating voltage Ub

generated logical high level. This is connected to the data input of the flip-flop D6.

With the leading edge of the next reset pulse. RESET the flip-flop D6 connected as the second monostable is started. Its time constant tau 'determines the width of the light impulse emitted by the inf rorat LED BD1. His intensity can

can be adjusted via the resistor R7.

As soon as these pulses were received safely and unambiguously by the interrogator 1 via the photodiode VT3

the RF energy impressed the narrower sync pulses SYN. Because their pulse width is smaller than the time constant tau, no HOdwetzimputee get because of the now-locked NAND gate D1.2 and the time from the input capacitance of the NAND gate D1.2 (not shown) and the resistor R2 formed time delay element RESET more about

Binary counter D3. As a result, by each synchronizing pulse SYN, the count ü is increased by one. The multiplexers D4; D5 will switch on the according to the counter Zusiandos, i. the adjacent address, selected Input state, which is taken from the memory / programming circuit P, the data input of the Flip-flops D6 through. The resistor R9 realized with open multiplexer input low level at the data input of the flip-flop De,

when the jumper is closed, the data input is high (Ub).

Only when high level is present at the data input, with the leading edge of the sync pulse SYN is a light pulse

sent out. In the case of a low level at the data input, the light pulse corresponding to the respective synchronizing pulse SYN is missing.

4b shows a pulse diagram of the control pulses for the infrared LED BD1. In Einchipmikrorechner EMR as evaluation 9 are from the correspondence or dswi failure of the light pulses

to the sync pulses SYN the identification data decoded.

Thus, the interrogator 1 needs only a very small one, taking account of time delays Time window after sending out the sync pulse SYN to activate the photo sensor to the presence of To detect response pulses. This is an extremely interference-free transmission erreicnt.

Claims (8)

1. Arrangement for object identification, consisting of at least one interrogator and at least one data carrier, which is assigned to be identified objects, wherein the interrogator includes a pulse-modulated radio frequency transmitter and is further equipped with a receiver with an evaluation device for determining identification data to the Objects is provided, and wherein the data carrier is provided with an antenna receiving it for energy supply from the interrogator high frequency energy receiving antenna, characterized in that at the receiving antenna (8) the operating voltage (Ub) of the data carrier (2) providing power supply circuit (10) is connected, the outputs of which are connected to an energy store (11), that also at the receiving antenna (8) a sync pulse filter (12) is connected, which with a sync pulses (SYN) and with a reset pulses (RESET ) output, and these pulses (SYN; RESET) to the associated inputs of an address generator (13) are guided, that outputs of the address generator (13) with address inputs of a memory (14) in which the identification data are stored, and data outputs of the memory (14) to inputs of a parallel series Converter (15) to an input of a gate circuit (16) is connected to the second input, the sync pulses (SYN) are guided, that the output of the gate circuit (16) is connected to the input of a Monofiops (17), at whose output a transmitter for light pulses (18) is connected, which is associated with the configured as a photosensor (5) receiver in the interrogator (1), and in that the evaluation device (7) with a modulation of the high frequency transmitter (3) controlling synchronous pulse generator (4) is. 2. Arrangement according to claim 1, characterized in that the memory (14) and the parallel-to-serial converter (15) are realized in a single programmable logic device based on nonvolatile memory elements, 3. Arrangement according to claim 2, characterized in that the logic module is executed erasable. 4. Arrangement according to one of the preceding claims, characterized in that the data carrier (2) is provided with as inputs for external programming led out data inputs of the memory (14). 5. Arrangement according to one of the preceding claims, characterized in that the synchronizing pulse filter (12) of the data carrier (2) is preceded by a rectifier circuit with screen chain. 6. Arrangement according to one of the preceding claims, characterized in that the receiving antenna (8) on the high-frequency transmitter (3) is designed to be tunable. 7. Arrangement according to one of the preceding claims, characterized in that the receiving antenna (8) is designed as a in the conductor material of a printed circuit board of the data carrier (2) integrated loop antenna (L 1). 8. Arrangement according to claim 7, characterized in that the data carrier (2) is designed as a flat, to be attached to the object to be attached card.