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CN220510773U - Protection circuit for circuit breaker control unit, circuit breaker control unit and circuit breaker - Google Patents

Protection circuit for circuit breaker control unit, circuit breaker control unit and circuit breaker Download PDF

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Publication number
CN220510773U
CN220510773U CN202322071370.1U CN202322071370U CN220510773U CN 220510773 U CN220510773 U CN 220510773U CN 202322071370 U CN202322071370 U CN 202322071370U CN 220510773 U CN220510773 U CN 220510773U
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circuit
resistor
current limiting
current
input
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CN202322071370.1U
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阮晓波
程颖
沈佳丽
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Schneider Electric Industries SAS
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Schneider Electric Industries SAS
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Abstract

Embodiments of the present disclosure provide a protection circuit for a circuit breaker control unit, and a circuit breaker. The protection circuit includes: an input circuit connected to a power supply circuit of the circuit breaker control unit; a current limiting circuit connected to the input circuit and capable of limiting the power input in a first current limiting mode and a second current limiting mode to provide a current-limited power input, the current limiting circuit being in the first current limiting mode if the voltage magnitude of the current-limited power input is less than a predetermined voltage threshold, the current limiting circuit entering the second current limiting mode if the voltage magnitude of the current-limited power input is greater than or equal to the predetermined voltage threshold, the current limiting circuit being capable of reducing the current of the power input in the first current limiting mode until the current of the power input is equal to the first predetermined current limiting threshold and being capable of reducing the current of the power input in the second current limiting mode until the current of the power input is equal to the second predetermined current limiting threshold; and an output circuit connected to the current limiting circuit to provide the current-limited power input to the load circuit.

Description

Protection circuit for circuit breaker control unit, circuit breaker control unit and circuit breaker
Technical Field
Embodiments of the present disclosure relate to the field of electrical devices, and more particularly, to a protection circuit for a circuit breaker control unit, and a circuit breaker.
Background
In industrial applications, the control unit provided on the circuit breaker enables the circuit breaker to implement various digital functions. One conventional way to power the control unit of a circuit breaker is to use a USB port to power the control unit. Along with the continuous trend of diversification of the digitalized functions of the circuit breaker, the application requirements for the USB port are also increased, for example, the USB port is utilized to realize interconnection between the control unit and intelligent devices such as a computer, and the USB port is used as an auxiliary power supply of other functional modules of the circuit breaker.
The maximum current at which the USB port is powered cannot exceed a predetermined limit, and therefore current limiting protection and short circuit protection are required for the load circuit of the circuit breaker control unit. When the power supply circuit of the circuit breaker control unit starts to supply power, devices such as a load capacitor in the load circuit need to be charged, so that a larger impact current is needed in a starting stage of the load circuit, and a smaller working current is needed in a normal working stage of the load circuit to reduce power consumption, and the traditional current limiting protection circuit cannot meet the current limiting requirement of the load circuit.
Disclosure of Invention
An object of the present disclosure is to provide a protection circuit for a circuit breaker control unit, a circuit breaker control unit and a circuit breaker to at least partially solve the above-mentioned problems.
In a first aspect of the present disclosure, there is provided a protection circuit for a circuit breaker control unit, comprising: an input circuit connected to a power supply circuit of the circuit breaker control unit to receive a power input from the power supply circuit; a current limiting circuit connected to the input circuit and capable of limiting the power input in a first current limiting mode and a second current limiting mode to provide a current-limited power input, wherein the current limiting circuit is in the first current limiting mode if the voltage magnitude of the current-limited power input is less than a predetermined voltage threshold, the current limiting circuit is entered into the second current limiting mode by the first current limiting mode if the voltage magnitude of the current-limited power input is greater than or equal to the predetermined voltage threshold, the current limiting circuit is capable of reducing the current of the power input until equal to a first predetermined current limiting threshold in the first current limiting mode, the current limiting circuit is capable of reducing the current of the power input until equal to a second predetermined current limiting threshold in the second current limiting mode; and an output circuit connected to the current limiting circuit to provide the current limited power input to a load circuit of the circuit breaker control unit.
In the embodiment according to the disclosure, the current limiting circuit with the first current limiting mode and the second current limiting mode is adopted to limit the current of the power supply input, so that the requirement of a load circuit for a larger impact current in a starting stage can be met, and the requirement of a load circuit for a smaller working current in a normal working stage can be met.
In some embodiments, the input circuit includes a first capacitor that receives the power input to filter the power input. In such an embodiment, the voltage of the power supply input can be made more stable by adopting capacitive filtering.
In some embodiments, the current limiting circuit comprises: a first resistor group connected to the input circuit; a first triode having its base connected to the first resistor group and its emitter connected to the input circuit; the grid electrode of the PMOS tube is connected to the collector electrode of the first triode; a second triode having its collector connected to the first resistor group and its emitter connected to the input circuit; a second resistor group connected to the output circuit; and the grid electrode of the NMOS tube is connected to the second resistor group, and the drain electrode of the NMOS tube is connected to the base electrode of the second triode so as to enable the second triode to be conducted when the NMOS tube is conducted. In such an embodiment, the current input by the power supply can be precisely limited within the predetermined interval by utilizing the characteristic that the PMOS transistor can limit the current.
In some embodiments, the current limiting circuit further comprises a voltage regulator connected to the second resistor group, the source of the NMOS and ground to output a voltage having a voltage magnitude equal to a predetermined turn-on threshold of the NMOS to the source of the NMOS. In such an embodiment, the NMOS transistor can be reliably turned on by setting the output voltage of the regulator.
In some embodiments, the first resistor group includes a first resistor, a second resistor, and a third resistor, the first resistor, the second resistor, and the third resistor are connected in series, wherein the first resistor and the third resistor are connected to the input circuit, a node between the first resistor and the second resistor is connected to a base of the first triode, and a node between the second resistor and the third resistor is connected to an emitter of the second triode. In such an embodiment, the first resistor group is matched with the first triode and the second triode, so that power supplies with different voltage amplitudes can be transmitted to the grid electrode of the PMOS tube, and the current of the power supply input can be reliably limited.
In some embodiments, the second resistor group includes a fourth resistor, a fifth resistor, and a sixth resistor, the fourth resistor, the fifth resistor, and the sixth resistor being connected in series, wherein the fourth resistor is connected to the output circuit, the sixth resistor is connected to the source of the NMOS transistor, and a node between the fifth resistor and the sixth resistor is connected to the gate of the NMOS transistor. In such an embodiment, the NMOS transistor can be made to be stably turned on by employing the second resistor group connected to the NMOS transistor.
In some embodiments, the protection circuit further comprises a short-circuit protection circuit connected to the current limiting circuit and capable of switching off the current of the current-limited power supply input in case of a short circuit of the load circuit. In such embodiments, the current of the limited power input can be reliably turned off by employing a short-circuit protection circuit in the event of a short-circuit of the load circuit.
In some embodiments, the output circuit includes a diode connected to the current limiting circuit and a second capacitance connected to ground. In such embodiments, the second capacitor can make the voltage of the current-limited power supply input in the output circuit more stable by employing a diode to reliably reverse isolate the output circuit from the current-limited circuit.
In a second aspect of the present disclosure, there is provided a control unit of a circuit breaker, the control unit comprising the protection circuit of the first aspect of the present disclosure.
In a third aspect of the present disclosure, a circuit breaker is provided, the circuit breaker comprising the control unit of the second aspect of the present disclosure.
It should be understood that what is described in this section of content is not intended to limit key features or essential features of the embodiments of the present disclosure nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description.
Drawings
The above and other features, advantages and aspects of embodiments of the present disclosure will become more apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings. In the drawings, wherein like or similar reference numerals denote like or similar elements, in which:
fig. 1 shows a circuit diagram of a protection circuit according to one embodiment of the present disclosure;
FIG. 2 illustrates a signal variation waveform diagram of a plurality of nodes in a protection circuit under current limiting protection according to one embodiment of the present disclosure; and
fig. 3 illustrates a signal variation waveform diagram of a plurality of nodes in a protection circuit under short-circuit protection according to one embodiment of the present disclosure.
Detailed Description
Preferred embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While the preferred embodiments of the present disclosure are illustrated in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
The term "comprising" and variations thereof as used herein means open ended, i.e., "including but not limited to. The term "or" means "and/or" unless specifically stated otherwise. The term "based on" means "based at least in part on". The terms "one example embodiment" and "one embodiment" mean "at least one example embodiment. The term "another embodiment" means "at least one additional embodiment". The terms "first," "second," and the like, may refer to different or the same object.
As described hereinabove, the load circuit of the circuit breaker control unit requires a large rush current during the start-up phase, and a small operating current during the normal operation phase to reduce power consumption, and the conventional current limiting protection circuit cannot meet the current limiting requirement of such load circuit. The embodiment of the disclosure provides a protection circuit, which is used for limiting current to power input by adopting a current limiting circuit with a first current limiting mode and a second current limiting mode, so that the requirement of a load circuit for a larger impact current in a starting stage can be met, and the requirement of a load circuit for a smaller working current in a normal working stage can be met. Hereinafter, the principles of the present disclosure will be described with reference to fig. 1 to 3.
Fig. 1 shows a circuit diagram of a protection circuit 1 according to one embodiment of the present disclosure. As shown in fig. 1, the protection circuit 1 generally includes an input circuit 11, a current limiting circuit 12, an output circuit 13, and a short-circuit protection circuit 14. The input circuit 11 is connected to a power supply circuit of the circuit breaker control unit to receive a power supply input from the power supply circuit. The current limiting circuit 12 is connected to the input circuit 11 and is capable of limiting the power input in a first current limiting mode and a second current limiting mode to provide a current limited power input. The output circuit 13 is connected to the current limiting circuit 12 to provide a current limited power input to the load circuit of the circuit breaker control unit. The short-circuit protection circuit 14 is connected to the current limiting circuit 12 and is capable of turning off the current of the current-limited power supply input in case of a short-circuit of the load circuit.
In one embodiment, as shown in fig. 1, the input circuit 11 includes a first capacitor 111, the first capacitor 111 being connected to ground and capable of receiving a power input to filter the power input, thereby making the voltage of the power input more stable. It should be appreciated that other devices that would occur to one of ordinary skill in the art based on the teachings presented in this disclosure implement the filtering and voltage stabilizing functions described above, and such implementations fall within the scope of this disclosure.
In one embodiment, as shown in fig. 1, the current limiting circuit 12 includes a first resistor group 121, a first triode 123, a PMOS transistor 125, a second resistor group 122, and an NMOS transistor 126. The first resistor group 121 is connected to the input circuit 11. The base of the first transistor 123 is connected to the first resistor group 121 and the emitter is connected to the input circuit 11. The gate of PMOS transistor 125 is connected to the collector of first transistor 123. The collector of the second transistor 124 is connected to the first resistor group 121 and the emitter is connected to the input circuit 11. The second resistor group 122 is connected to the output circuit 13. The gate of the NMOS transistor 126 is connected to the second resistor set 122 and the drain is connected to the base of the second triode 124.
In one embodiment, as shown in fig. 1, the first resistor group 121 includes a first resistor 1211, a second resistor 1212, and a third resistor 1213, the first resistor 1211, the second resistor 1212, and the third resistor 1213 are connected in series, wherein the first resistor 1211 and the third resistor 1213 are connected to the input circuit 11, a node between the first resistor 1211 and the second resistor 1212 is connected to a base of the first transistor 123, and a node between the second resistor 1212 and the third resistor 1213 is connected to an emitter of the second transistor 124. The second resistor group 122 includes a fourth resistor 1221, a fifth resistor 1222, and a sixth resistor 1223, where the fourth resistor 1221, the fifth resistor 1222, and the sixth resistor 1223 are connected in series, the fourth resistor 1221 is connected to the output circuit 13, the sixth resistor 1223 is connected to the source of the NMOS transistor 126, and a node between the fifth resistor 1222 and the sixth resistor 1223 is connected to the gate of the NMOS transistor 126.
In one embodiment, as shown in fig. 1, the short-circuit protection circuit 14 includes a third triode 141, wherein an emitter of the third triode 141 is connected to a base thereof and to ground, a collector thereof is connected to a gate and a source of the PMOS transistor 125, and a node between the base and the emitter thereof is connected to the source of the PMOS transistor 125.
In one embodiment, as shown in fig. 1, when the protection circuit 1 starts to receive a power input from the power supply circuit, the protection circuit 1 is started, and the power input enters the current limiting circuit 12 from the input circuit 11 after being filtered by the first capacitor 111. The power input passes through the first resistor 1211, the second resistor 1212 and the third resistor 1213 on the loop and the voltage amplitude is raised, the power input voltage with the raised voltage amplitude is supplied to the base of the first triode 123, and the power input can pass through the branch of the loop and the power input voltage is directly supplied to the emitter of the first triode 123, so that a voltage difference is generated between the base and the emitter of the first triode 123, and the first triode 123 is turned on. The power input can also reach the source and the drain of the PMOS transistor 125 through another branch and be turned on, and at this time, the power input is respectively supplied from the circuit connected to the source and the circuit connected to the drain of the PMOS transistor 125 to the collector and the base of the third triode 141, so that the third triode 141 is turned on. The voltage at the collector of the first transistor 123 is applied to the gate of the PMOS transistor 125 after being turned on, so that the current of the power input conducted between the source and the drain of the PMOS transistor becomes small, so as to obtain a current-limited power input, and the current-limiting circuit 12 enters the first current-limiting mode.
Fig. 2 illustrates a signal variation waveform diagram of a plurality of nodes in the protection circuit 1 under current limiting protection according to an embodiment of the present disclosure, wherein a graph 101 illustrates a voltage amplitude variation diagram of a voltage of a load circuit under current limiting protection according to an embodiment of the present disclosure, a graph 102 illustrates a current variation diagram of a current-limited power supply input of the protection circuit 1 under current limiting protection according to an embodiment of the present disclosure, a graph 103 illustrates a voltage amplitude variation diagram of a gate voltage of the PMOS transistor 125 under current limiting protection according to an embodiment of the present disclosure, a graph 104 illustrates a voltage amplitude variation diagram of a drain voltage of the NMOS transistor 126 under current limiting protection according to an embodiment of the present disclosure, a graph 105 illustrates a voltage amplitude variation diagram of a base voltage of the second transistor 124 under current limiting protection according to an embodiment of the present disclosure, and a graph 106 illustrates a voltage amplitude variation diagram of a base voltage of the first transistor 123 under current limiting protection according to an embodiment of the present disclosure.
In one embodiment, as shown in graph 102 of fig. 2, the current limiting circuit 12 in the first current limiting mode is capable of reliably reducing the current of the power supply input until it is equal to the first predetermined current limiting threshold.
In one embodiment, as shown in fig. 1, the current limiting circuit 12 further includes a regulator 127, where the regulator 127 is connected to a node between the third resistor 1223 and the source of the NMOS transistor 126 and to ground. In one embodiment, as shown in fig. 1, the output circuit 13 is connected to the current limiting circuit 12 to provide a current limited power input to the load circuit of the circuit breaker control unit, during which the voltage of the load circuit will rise continuously, as shown in graph 101 in fig. 2. The voltage of the load circuit can be supplied to the current limiting circuit 12 through the branch of the output circuit 13, the voltage of the load circuit is supplied to the gate of the NMOS tube 126 through the third resistor 1221 and the fourth resistor 1222 on the branch, and the voltage of the load circuit after the voltage amplitude is raised is supplied to the source of the NMOS tube 126 and the regulator tube 127 through the branch of the branch and through the sixth resistor 1223 to further raise the voltage amplitude. The regulator 127 is turned on when the voltage of the load circuit, the voltage amplitude of which is further raised, is equal to the predetermined on threshold of the NMOS transistor 126 and is capable of outputting a voltage, the voltage amplitude of which is equal to the predetermined on threshold of the NMOS transistor 126, to the source of the NMOS transistor 126, thereby making the NMOS transistor 126 conductive.
In one embodiment, after the NOMS tube 126 is turned on, the voltage at the base of the second triode 124 connected to the drain of the NMOS tube 126 decreases in magnitude (as shown in the graph 105 of FIG. 2), thereby turning on the second triode 124.
In one embodiment, after the second triode 124 is turned on, the voltage amplitude of the drain voltage of the NMOS tube 126 decreases (as shown in graph 104 in fig. 2), the third resistor 1213 is shorted, the voltage amplitude of the voltage at the base of the first triode 123 decreases (as shown in graph 106 in fig. 2), and then the voltage amplitude of the voltage at the collector of the first triode 123 to the gate of the PMOS tube 125 increases (as shown in graph 103 in fig. 2), so that the current input to the power supply conducted between the source and the drain of the PMOS tube further decreases, and the current limiting circuit 12 enters the second current limiting mode. In one embodiment, as shown in graph 102 of fig. 2, the current limiting circuit 12 in the second current limiting mode is capable of reliably reducing the current of the power supply input until it is equal to the second predetermined current limiting threshold.
Fig. 3 illustrates a signal variation waveform diagram of a plurality of nodes in a protection circuit under short-circuit protection according to one embodiment of the present disclosure. Graph 201 in fig. 3 shows a current variation graph of a current limited power supply input under short-circuit protection according to one embodiment of the present disclosure, graph 202 in fig. 3 shows a voltage magnitude variation graph of a gate voltage of PMOS transistor 125 under short-circuit protection according to one embodiment of the present disclosure, graph 203 in fig. 3 shows a voltage magnitude variation graph of a collector voltage of third transistor 141 under short-circuit protection according to one embodiment of the present disclosure, graph 204 in fig. 3 shows a voltage magnitude variation graph of a voltage of a load circuit under short-circuit protection according to one embodiment of the present disclosure, and graph 205 in fig. 3 shows a voltage magnitude variation graph of a base voltage of third transistor 141 under short-circuit protection according to one embodiment of the present disclosure.
In one embodiment, as shown in fig. 1, when the load circuit is shorted, the voltage amplitude of the voltage of the load circuit is reduced (as shown in a graph 204 of fig. 3), so that the voltage amplitude of the voltage of the output circuit 13 connected to the load circuit is reduced, and the first transistor 123 is further turned on, so that the voltage amplitude of the gate voltage of the PMOS transistor 125 is increased (as shown in a graph 202 of fig. 3). When the voltage amplitude of the voltage of the output circuit 13 is reduced, and at the same time, the voltage amplitude of the node voltage between the current limiting circuit 12 and the output circuit 13 is reduced, the node between the current limiting circuit 12 and the output circuit 13 is connected to the collector and the base of the third triode 141, as shown in the graph 203 and the graph 205 of fig. 3, when the voltage amplitude of the voltage received by the third triode 141 is smaller than the predetermined on threshold of the third triode 141, the third triode 141 is turned off, and then the voltage amplitudes of the gate voltage and the source voltage of the PMOS transistor 125 are made equal, so that the PMOS transistor 125 is turned off to turn off the current limiting circuit 12 (as shown in the graph 201 of fig. 3), thereby reliably achieving the purpose of the protection circuit 1 to turn off the short-circuit current of the load circuit.
In one embodiment, as shown in fig. 1, the output circuit 13 includes a diode 131 and a second capacitor 132, the diode 131 being connected to the current limiting circuit 12, the second capacitor 132 being connected to ground. The diode can reliably reversely isolate the output circuit from the current limiting circuit, and the second capacitor can enable the voltage input by the current-limiting power supply in the output circuit to be more stable. It should be understood that other types of electrical components that would occur to one of ordinary skill in the art based on the teachings presented in this disclosure would accomplish the above functions, and such implementations fall within the scope of this disclosure.
The foregoing description of the embodiments of the present disclosure has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the technical improvement in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

Claims (11)

1. A protection circuit (1) for a circuit breaker control unit, characterized by comprising:
an input circuit (11) connected to a power supply circuit of the circuit breaker control unit to receive a power supply input from the power supply circuit;
-a current limiting circuit (12) connected to the input circuit (11) and being capable of limiting the power supply input in a first current limiting mode in which the current limiting circuit (12) is in the first current limiting mode if the voltage amplitude of the current limited power supply input is less than a predetermined voltage threshold and in a second current limiting mode in which the current limiting circuit (12) is capable of reducing the current of the power supply input until equal to a first predetermined current limiting threshold, the current limiting circuit (12) being capable of reducing the current of the power supply input in the second current limiting mode until equal to a second predetermined current limiting threshold if the voltage amplitude of the current limited power supply input is greater than or equal to the predetermined voltage threshold; and
an output circuit (13) connected to the current limiting circuit (12) to provide the current limited power input to a load circuit of the circuit breaker control unit.
2. The protection circuit (1) according to claim 1, wherein the input circuit (11) comprises a first capacitor (111), the first capacitor (111) receiving the power input for filtering the power input.
3. Protection circuit (1) according to claim 1, characterized in that said current limiting circuit (12) comprises:
-a first resistor group (121) connected to said input circuit (11);
-a first transistor (123) having its base connected to said first resistor group (121) and its emitter connected to said input circuit (11);
a PMOS transistor (125) having a gate connected to the collector of the first transistor (123);
-a second transistor (124) with its collector connected to said first resistor group (121) and its emitter connected to said input circuit (11);
-a second resistor group (122) connected to said output circuit (13); and
and an NMOS tube (126) with a gate connected to the second resistor group (122) and a drain connected to the base of the second triode (124) to turn on the second triode (124) when the NMOS tube (126) is turned on.
4. A protection circuit (1) according to claim 3, wherein the current limiting circuit (12) further comprises a regulator tube (127), the regulator tube (127) being connected to the second resistor group (122), the source of the NMOS tube (126) and ground to output a voltage having a voltage magnitude equal to a predetermined turn-on threshold of the NMOS tube (126) to the source of the NMOS tube (126).
5. A protection circuit (1) according to claim 3, characterized in that the first resistor group (121) comprises a first resistor (1211), a second resistor (1212) and a third resistor (1213), the first resistor (1211), the second resistor (1212) and the third resistor (1213) being connected in series, wherein the first resistor (1211) and the third resistor (1213) are connected to the input circuit (11), a node between the first resistor (1211) and the second resistor (1212) being connected to the base of the first triode (123), and a node between the second resistor (1212) and the third resistor (1213) being connected to the emitter of the second triode (124).
6. A protection circuit (1) according to claim 3, characterized in that the second resistor group (122) comprises a fourth resistor (1221), a fifth resistor (1222) and a sixth resistor (1223), the fourth resistor (1221), the fifth resistor (1222) and the sixth resistor (1223) being connected in series, wherein the fourth resistor (1221) is connected to the output circuit (13), the sixth resistor (1223) is connected to the source of the NMOS tube (126), and a node between the fifth resistor (1222) and the sixth resistor (1223) is connected to the gate of the NMOS tube (126).
7. Protection circuit (1) according to claim 1, characterized in that the protection circuit (1) further comprises a short-circuit protection circuit (14), the short-circuit protection circuit (14) being connected to the current limiting circuit (12) and being capable of switching off the current of the current-limited power supply input in case of a short-circuit of the load circuit.
8. Protection circuit (1) according to claim 7, characterized in that the short-circuit protection circuit (14) comprises a third transistor (141), the emitter of the third transistor (141) being connected to its base and to ground, the collector of the third transistor being connected to the current limiting circuit (12), the node between its base and its emitter being connected to the current limiting circuit (12), the third transistor (141) being turned off and being able to turn off the current limiting circuit (12) in case of a short circuit of the load circuit.
9. Protection circuit (1) according to claim 1, characterized in that the output circuit (13) comprises a diode (131) and a second capacitor (132), the diode (131) being connected to the current limiting circuit (12), the second capacitor (132) being connected to ground.
10. Control unit of a circuit breaker, characterized in that it comprises a protection circuit (1) according to any one of claims 1 to 9.
11. A circuit breaker, characterized in that it comprises a control unit according to claim 10.
CN202322071370.1U 2023-08-02 2023-08-02 Protection circuit for circuit breaker control unit, circuit breaker control unit and circuit breaker Active CN220510773U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202322071370.1U CN220510773U (en) 2023-08-02 2023-08-02 Protection circuit for circuit breaker control unit, circuit breaker control unit and circuit breaker

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202322071370.1U CN220510773U (en) 2023-08-02 2023-08-02 Protection circuit for circuit breaker control unit, circuit breaker control unit and circuit breaker

Publications (1)

Publication Number Publication Date
CN220510773U true CN220510773U (en) 2024-02-20

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CN202322071370.1U Active CN220510773U (en) 2023-08-02 2023-08-02 Protection circuit for circuit breaker control unit, circuit breaker control unit and circuit breaker

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