CN220189658U - Silicon carbide Schottky diode structure - Google Patents
Silicon carbide Schottky diode structure Download PDFInfo
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- CN220189658U CN220189658U CN202320465764.2U CN202320465764U CN220189658U CN 220189658 U CN220189658 U CN 220189658U CN 202320465764 U CN202320465764 U CN 202320465764U CN 220189658 U CN220189658 U CN 220189658U
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 71
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 70
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 230000000737 periodic effect Effects 0.000 claims abstract description 3
- 230000005684 electric field Effects 0.000 abstract description 5
- 238000000034 method Methods 0.000 description 11
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 9
- 239000008367 deionised water Substances 0.000 description 9
- 229910021641 deionized water Inorganic materials 0.000 description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 9
- 239000002184 metal Substances 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 238000001259 photo etching Methods 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 4
- 238000002513 implantation Methods 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000004088 simulation Methods 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
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- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 235000011114 ammonium hydroxide Nutrition 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- 238000001017 electron-beam sputter deposition Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
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- QAOWNCQODCNURD-UHFFFAOYSA-N sulfuric acid Substances OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 238000007736 thin film deposition technique Methods 0.000 description 2
- 229910017150 AlTi Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
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- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Abstract
The utility model discloses a silicon carbide Schottky diode structure, which comprises a silicon carbide substrate, a first drift layer, a second drift layer, a P-type buried layer, an ohmic contact layer and a Schottky contact layer, wherein the first drift layer is arranged on the first surface of the silicon carbide substrate, and the second drift layer is arranged on the first drift layer and is provided with a groove structure; the P-type buried layer is arranged in the first drift layer in a periodic manner, is in contact with the second drift layer around the groove structure, covers the surface of the second drift layer, and is arranged on the second surface of the silicon carbide substrate. Through combining trench structure and buried layer structure, utilize trench structure's advantage to improve the forward conduction ability of device, utilize buried layer structure advantage to reduce the reverse leakage current of device, modulate the electric field through using the higher N type second drift layer of doping concentration in buried layer top at last, make its withstand voltage performance and traditional planar structure not differ much, the device of overall performance superior to traditional planar structure.
Description
Technical Field
The utility model relates to the field of semiconductor devices, in particular to a silicon carbide Schottky diode structure.
Background
Third generation semiconductor silicon carbide (SiC) materials have superior physical and electrical properties to conventional silicon (Si) materials. For example, siC has the characteristics of bandwidth inhibition, high heat conductivity, high breakdown field strength, high saturated electron drift rate and the like, and simultaneously has excellent physical and chemical stability, extremely strong irradiation resistance, mechanical strength and the like. Therefore, the electronic device based on the wide forbidden band SiC material can be used in the power electronic fields of high temperature, high power, high frequency, high radiation and the like.
The junction barrier type Schottky diode (JBS) integrates PN junctions in the Schottky structure, can effectively ensure excellent forward conduction characteristics of low Schottky barriers, and can limit the maximum electric field to a PN junction region during reverse blocking, so that the electric field at the surface Schottky contact is reduced, and the reverse leakage current is greatly reduced relative to the pure Schottky type.
There are many contradictions existing in the design of the current SiC schottky device blocking voltage and forward conduction characteristic compromise, such as drift region resistance R drift The forward conduction characteristic is improved when it is lowered, but the device withstand voltage is lowered. Or the larger the spacing between P+ the R JFET The smaller the resistance, the improved forward conduction characteristics of the device, but at the same time, the increased reverse leakage current results. Considering these factors, a new structure needs to be sought so that SiC schottky devices have low on-voltage drop while reverse characteristics are not degraded.
Disclosure of Invention
The utility model aims to overcome the defects in the prior art and provides a silicon carbide Schottky diode structure.
In order to achieve the above object, the technical scheme of the present utility model is as follows:
the silicon carbide Schottky diode structure comprises a silicon carbide substrate, a first drift layer, a second drift layer, a P-type buried layer and a Schottky contact layer, wherein the first drift layer is arranged on the first surface of the silicon carbide substrate, and the second drift layer is arranged on the first drift layer and is provided with a groove structure; the P-type buried layer is buried in the first drift layer in a periodic arrangement mode and is in contact with the second drift layer around the groove structure, and the Schottky contact layer covers the surface of the second drift layer.
Preferably, the second drift layer covers the P-type buried layer, and the projection area of the second drift layer on the silicon carbide substrate is greater than or equal to the projection area of the underlying P-type buried layer on the silicon carbide substrate.
Preferably, the side wall of the groove structure is at least 0-0.5 μm away from the side edge of the P-type buried layer.
Preferably, a bottom surface of the trench structure exposes the first drift layer.
Preferably, the schottky contact layer further covers the exposed surface of the first drift layer and the sidewalls of the trench structure.
Preferably, the thickness of the second drift layer and the depth of the trench structure are the same, and each is 0.3 to 1 μm.
Preferably, the P-type buried layer extends from the surface of the first drift layer toward the silicon carbide substrate by 0.3 to 0.8 μm.
Preferably, the first drift layer and the second drift layer are both N-type silicon carbide, and the second drift layer has a doping concentration greater than that of the first drift layer.
Preferably, the second drift layers are arranged periodically, and the period of the second drift layers is the same as that of the P-type buried layer.
Preferably, the semiconductor device further comprises an ohmic contact layer, wherein the ohmic contact layer is arranged on the second surface of the silicon carbide substrate.
Compared with the prior art, the utility model has the following beneficial effects:
(1) The silicon carbide Schottky diode structure provided by the utility model can solve the design contradiction problem of the on-resistance and the reverse leakage of the SiC Schottky device.
(2) The silicon carbide Schottky diode structure combines the trench structure and the buried layer structure, improves the forward conduction capacity of the device by utilizing the advantages of the trench structure, reduces the reverse leakage current of the device by utilizing the advantages of the buried layer structure, modulates the electric field by adopting the second drift layer with larger doping concentration above the P-type buried layer, and ensures that the withstand voltage of the diode is not up and down compared with that of the planar structure, and the overall performance of the diode is superior to that of the device with the traditional planar structure.
(3) The silicon carbide Schottky diode structure provided by the utility model has the advantages of simpler and more convenient manufacturing process and low cost.
Drawings
The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments and together with the description serve to explain the principles of the utility model. Many of the intended advantages of other embodiments and embodiments will be readily appreciated as they become better understood by reference to the following detailed description.
Fig. 1 is a schematic cross-sectional view of a silicon carbide schottky diode structure according to an embodiment of the present utility model;
FIGS. 2-5 are process flow diagrams of a method of fabricating a silicon carbide Schottky diode in accordance with an embodiment of the present utility model;
fig. 6 is a diagram showing a comparison of a silicon carbide schottky diode structure according to an embodiment of the present utility model with a conventional structure;
fig. 7 is a graph comparing the results of forward VFIF simulation performance of a silicon carbide schottky diode structure according to an embodiment of the present utility model with that of a conventional structure;
FIG. 8 is a graph comparing reverse VRIR simulation performance results of a silicon carbide Schottky diode structure of an embodiment of the present utility model with a conventional structure;
reference numerals: 101. a silicon carbide substrate; 102. a first drift layer; 103. a P-type buried layer; 104. a second drift layer; 105. a trench structure; 106. an ohmic contact layer; 107. a schottky contact layer.
Detailed Description
The utility model is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the utility model and are not limiting of the utility model. It should be noted that, for convenience of description, only the portions related to the present utility model are shown in the drawings.
It should be noted that, without conflict, the embodiments of the present utility model and features of the embodiments may be combined with each other. The utility model will be described in detail below with reference to the drawings in connection with embodiments.
Referring to fig. 1, in an embodiment of the present utility model, a silicon carbide schottky diode structure is provided, which includes a silicon carbide substrate 101, a first drift layer 102, a second drift layer 104, a P-type buried layer 103, an ohmic contact layer 106, and a schottky contact layer 107, where the first drift layer 102 is disposed on a first surface of the silicon carbide substrate 101, the second drift layer 104 is disposed on the first drift layer 102 and has a trench structure 105, the P-type buried layer 103 is periodically buried in the first drift layer 102 and contacts the second drift layer 104 around the trench structure 105, specifically, the P-type buried layer 103 extends from the surface of the first drift layer 102 toward the direction of the silicon carbide substrate 101 by 0.3-0.8 μm, and the P-type buried layer 103 may be formed in the first drift layer 102 by using a doping method such as ion implantation. In a preferred example, the P-type buried layer 103 extends 0.6 μm from the surface of the first drift layer 102 toward the silicon carbide substrate 101, and the doping concentration of the P-type buried layer 103 is 1e18 cm-3. The schottky contact layer 107 covers the surface of the second drift layer 104. The ohmic contact layer 106 is provided on the second surface of the silicon carbide substrate 101. The silicon carbide Schottky diode structure provided by the embodiment of the utility model combines the trench structure 105 and the buried layer structure, improves the forward conduction capacity of the device by utilizing the advantages of the trench structure 105, and reduces the reverse leakage current of the device by utilizing the advantages of the buried layer structure.
In a specific embodiment, the second drift layer 104 covers the P-type buried layer 103, and the projected area of the second drift layer 104 on the silicon carbide substrate 101 is greater than or equal to the projected area of the underlying P-type buried layer 103 on the silicon carbide substrate 101. A trench structure 105 is etched in the other drift layer above the first drift layer 102, the trench structure 105 divides the trench structure into a plurality of second drift layers 104 arranged at intervals, a P-type buried layer 103 is correspondingly covered below each second drift layer 104, and specifically, the side wall of the trench structure 105 is at least 0-0.5 μm away from the side edge of the P-type buried layer 103.
In a specific embodiment, the bottom surface of the trench structure 105 exposes the first drift layer 102. The schottky contact layer 107 also covers the exposed surface of the first drift layer 102 and the sidewalls of the trench structure 105. That is, the thickness of the second drift layer 104 and the depth of the trench structure 105 are the same, and are each 0.3 to 1 μm. The second drift layer 104 is arranged periodically and has the same period as the P-type buried layer 103, i.e., at least one P-type buried layer 103 is covered under the second drift layer 104.
Specifically, the first drift layer 102 and the second drift layer 104 are both N-type silicon carbide, and the doping concentration of the second drift layer 104 is greater than that of the first drift layer 102. In a preferred embodiment, the thickness of the first drift layer 102 is 9.5 μm and the doping concentration is 8e15 cm-3; the thickness of the second drift layer 104 was 0.5 μm, and the doping concentration was 8e16 cm -3 。
Referring to fig. 1-5, the embodiment of the utility model further provides a method for manufacturing a silicon carbide schottky diode, which comprises the following steps:
s1: cleaning a silicon carbide substrate 101, wherein the silicon carbide substrate 101 is an n-type silicon carbide substrate, and performing standard cleaning on the substrate, specifically:
a. the silicon carbide substrate 101 was sequentially ultrasonically cleaned three times with acetone and ethanol, and then rinsed with deionized water.
b. The silicon carbide substrate 101 rinsed by deionized water is put into concentrated sulfuric acid and hydrogen peroxide solution to be boiled for at least 10min.
c. The silicon carbide substrate 101 boiled with the concentrated sulfuric acid is boiled for 15min by the first liquid and the second liquid in sequence, and is washed clean by deionized water and then dried by nitrogen for standby. The first liquid is a mixed liquid of ammonia water, hydrogen peroxide and deionized water, and the ammonia water is prepared according to the volume ratio: hydrogen peroxide: deionized water = 1:2: and 5, the second solution is a mixed solution of hydrochloric acid, hydrogen peroxide and deionized water, and the second solution is hydrochloric acid according to the volume ratio: hydrogen peroxide: deionized water = 1:2:5.
d. the rinsed silicon carbide substrate 101 was immersed in diluted hydrofluoric acid (hydrogen fluoride: deionized water=1:3 by volume) for 1min to remove the oxide on the surface, and was rinsed with deionized water and dried.
S2: the first drift layer 102 is grown as shown in fig. 2.The method comprises the following steps: growing a first drift layer 102 of homogeneous material on a silicon carbide substrate 101 by chemical vapor deposition or physical vapor deposition, wherein the growth source is SiH 4 And C 2 H 4 Or other Si source and C source gases, the doping source is NH 3 The growth temperature is 1500-1700 ℃. The thickness of the first drift layer 102 was 9.5 μm, and the doping concentration was 8e15 cm -3 。
S3: a P-type buried layer 103 is fabricated as shown in fig. 3. The P-type buried layer 103 is periodically arranged in the first drift layer 102, and the doping concentration of the P-type buried layer 103 is 1e18 cm -3 The depth in the first drift layer 102 is 0.6 μm. The method comprises the following steps: depositing an implantation mask layer on the N-first drift layer 102 by chemical vapor deposition or physical vapor deposition, wherein the implantation mask layer may be SiO 2 、Si 3 N 4 Polysilicon or metal substances, forming an implantation mask layer by using a photoetching plate A and photoetching patterning, manufacturing a P-type buried layer 103 in the N-type first drift layer 102 by using doping methods such as ion implantation and the like, and finally removing the implantation mask layer.
S4: the second drift layer 104 is fabricated as shown in fig. 4. The method comprises the following steps: the homogeneous material is grown above the first drift layer 102 by chemical vapor deposition or physical vapor deposition, and the growth source is SiH 4 And C 2 H 4 Or other Si source and C source gases, the doping source is NH 3 The growth temperature is 1500-1700 ℃. The thickness of the N-second drift layer 104 was 0.5 μm and the concentration was 8e16 cm -3 。
S5: trench structure 105 is fabricated as shown in fig. 5. The method comprises the following steps: an etch mask layer is deposited on the N-second drift layer 104, the etch mask layer may be SiO 2 、Si 3 N 4 And (3) forming an etching mask layer by utilizing a photoetching plate B and photoetching and patterning, etching the groove structure 105 by utilizing methods such as dry etching and the like, wherein the depth of the groove structure 105 is 0.5 mu m, and finally removing the etching mask layer.
S6: ohmic contact layer 106 is fabricated as shown in fig. 1. The method specifically comprises the following steps:
a. the front surface of the silicon carbide substrate 101 is coated with photoresist for protection, the diluted HF is used for removing the oxide layer on the back surface of the n+ type silicon carbide substrate 101, a first metal layer is deposited on the back surface by a thin film deposition method such as electron beam evaporation or sputtering, the first metal layer can be AlTi, ni, tiW, alTi or the like, and the front surface photoresist is removed.
b. The first metal layer is annealed at a temperature ranging from 900 c to 1100 c under nitrogen or argon conditions to form the ohmic contact layer 106.
S7: a schottky contact layer 107 is formed as shown in fig. 1. The method specifically comprises the following steps:
a. the back surface of the silicon carbide substrate 101 is coated with photoresist for protection, a second metal layer is deposited on the front surface by using a thin film deposition method such as electron beam evaporation or sputtering, the second metal layer can be Ti, tiAl and other metals, and then the front surface photoresist is removed.
b. And annealing under nitrogen or argon at the temperature of 400-600 ℃ to finally form the Schottky contact layer 107, wherein the Schottky contact layer 107 is positioned on the upper surface of the N-second drift layer 104.
c. And photoetching and patterning to form a front-side bonding pad metal layer, thereby completing the preparation of the silicon carbide Schottky diode device.
The simulation results of the silicon carbide schottky diode with the conventional planar structure, which is used as a comparison example, are shown in fig. 6-8, and the forward characteristic is superior to the conventional structure in structural performance, and the reverse leakage current is equivalent to the conventional structure. The utility model modulates the electric field by adopting the N doped second drift layer 104 with larger concentration above the P type buried layer 103, so that the voltage resistance is not up and down compared with the plane structure. The device performance of the proposed structure of the embodiments of the present utility model will be superior to that of a conventional planar structure.
While the utility model has been described with reference to specific embodiments, the scope of the utility model is not limited thereto, and any changes or substitutions can be easily made by those skilled in the art within the scope of the utility model disclosed herein, and are intended to be covered by the scope of the utility model. Therefore, the protection scope of the present utility model shall be subject to the protection scope of the claims.
Claims (10)
1. The silicon carbide Schottky diode structure is characterized by comprising a silicon carbide substrate, a first drift layer, a second drift layer, a P-type buried layer and a Schottky contact layer, wherein the first drift layer is arranged on the first surface of the silicon carbide substrate, and the second drift layer is arranged on the first drift layer and is provided with a groove structure; the P-type buried layer is buried in the first drift layer in a periodic arrangement mode and is in contact with the second drift layer around the groove structure, and the Schottky contact layer covers the surface of the second drift layer.
2. The silicon carbide schottky diode structure of claim 1, wherein the second drift layer overlies the P-type buried layer and a projected area of the second drift layer on the silicon carbide substrate is greater than or equal to a projected area of the underlying P-type buried layer on the silicon carbide substrate.
3. The silicon carbide schottky diode structure of claim 2 wherein the sidewalls of the trench structure are at least 0-0.5 μm from the sides of the P-type buried layer.
4. The silicon carbide schottky diode structure of claim 1, wherein a bottom surface of the trench structure exposes the first drift layer.
5. The silicon carbide schottky diode structure of claim 4 wherein the schottky contact layer further overlies the exposed surface of the first drift layer and the sidewalls of the trench structure.
6. The silicon carbide schottky diode structure of claim 4 wherein the second drift layer has a thickness equal to the depth of the trench structure, both being 0.3-1 μm.
7. The silicon carbide schottky diode structure of claim 1, wherein the P-type buried layer extends from 0.3 to 0.8 μm from the surface of the first drift layer toward the silicon carbide substrate.
8. The silicon carbide schottky diode structure of claim 1 wherein the first and second drift layers are each N-type silicon carbide, the second drift layer having a doping concentration greater than the first drift layer.
9. The silicon carbide schottky diode structure of claim 1, wherein the second drift layer is periodically arranged and has the same period as the P-type buried layer.
10. The silicon carbide schottky diode structure of claim 1 further comprising an ohmic contact layer disposed on the second surface of the silicon carbide substrate.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202320465764.2U CN220189658U (en) | 2023-03-13 | 2023-03-13 | Silicon carbide Schottky diode structure |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202320465764.2U CN220189658U (en) | 2023-03-13 | 2023-03-13 | Silicon carbide Schottky diode structure |
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