CN220021100U - Semiconductor module - Google Patents

Abstract

The utility model provides a semiconductor module, which comprises at least two semiconductor components connected in series. The semiconductor module includes an anode bus, a cathode bus, a midpoint bus, and a substrate. The positive electrode bus and the negative electrode bus are respectively connected with two ends of the semiconductor assemblies connected in series, and the middle point bus is connected with the middle point of the semiconductor assemblies connected in series. The semiconductor modules are provided on both sides of the outer side in the stacking direction centering on the positive electrode bus line, the negative electrode bus line, and the midpoint bus line. The substrate is used for packaging the semiconductor component at the outer side of the stacking direction. The positive bus line is arranged opposite to the negative bus line and is laminated with the midpoint bus line. The semiconductor module of the utility model can form a semiconductor module with small parasitic inductance by designing the relative position inside the module. In addition, by sealing with resin in a state where the bus portions are arranged in a concentrated manner, the amount of resin used can be reduced.

Description

Semiconductor module

Technical Field

The present utility model relates to a semiconductor module.

Background

Two-in-one semiconductor modules having a switching function have been disclosed. In the structure of the two-in-one semiconductor module, the positive bus and the middle bus are connected to the high-side switching element, and the middle bus and the negative bus are connected to the low-side switching element, using buses (bus bars) to connect to electrodes formed on both sides of the semiconductor chip.

However, in research and development of the residence of vehicles, if the positional relationship between the positive and negative bus lines to which the dc voltage is applied is far, parasitic inductance increases, which increases surge voltage and loss at the time of switching. Accordingly, there is a need for improvements in semiconductor modules to overcome the foregoing problems.

Disclosure of Invention

The present utility model provides a semiconductor module which aims to achieve the purposes of small parasitic inductance, low loss and reduced packaging resin amount. And, in turn, contributes to improvement in energy efficiency.

A semiconductor module of the present utility model contains at least two semiconductor components connected in series. The semiconductor module includes an anode bus, a cathode bus, a midpoint bus, and a substrate. The positive electrode bus and the negative electrode bus are respectively connected with two ends of the semiconductor assemblies connected in series, and the middle point bus is connected with the middle point of the semiconductor assemblies connected in series. The semiconductor modules are provided on both sides of the outer side in the stacking direction centering on the positive electrode bus line, the negative electrode bus line, and the midpoint bus line. The substrate is used for packaging the semiconductor component at the outer side of the stacking direction. The positive bus line is arranged opposite to the negative bus line and is laminated with the midpoint bus line.

In an embodiment of the present utility model, the positive bus line, the negative bus line, and the midpoint bus line are sealed with a resin.

In an embodiment of the present utility model, the positive bus line or the negative bus line is connected to the substrate through a lead frame.

In an embodiment of the present utility model, the semiconductor module further includes a frame disposed at an outer periphery perpendicular to the stacking direction of the semiconductor module, and the semiconductor element is sealed by bonding the frame and the substrate.

In an embodiment of the present utility model, the semiconductor module described above may be cooled by immersion in a liquid.

In an embodiment of the present utility model, a space surrounded by the substrate, the frame, and the bus lines (positive electrode bus line, negative electrode bus line, and midpoint bus line) is filled with a gel material having a higher thermal conductivity than air.

In view of the above, since the semiconductor devices (e.g., semiconductor chips) are disposed on both sides of the positive and negative electrode buses in a state where the buses are disposed in opposition to each other in the module, the buses are sealed with an insulating resin. Thus, by designing the relative positions inside the module, a semiconductor module with small parasitic inductance can be constituted. In addition, by sealing with resin in a state where the bus portions are arranged in a concentrated manner, the amount of resin used can be reduced.

In order to make the above features and advantages of the present utility model more comprehensible, embodiments accompanied with figures are described in detail below.

Drawings

Fig. 1 is an exploded view of a semiconductor module according to an embodiment of the present utility model.

Fig. 2 is a perspective view of the semiconductor module of fig. 1.

Fig. 3 is a schematic cross-sectional view taken along line III-III' of fig. 2.

Fig. 4 is a schematic cross-sectional view of a semiconductor device package according to the present utility model.

Fig. 5 is a schematic cross-sectional view of another semiconductor device package according to the present utility model.

Fig. 6A is a schematic cross-sectional view of a current path from a positive terminal to a positive bus in the semiconductor module of fig. 1.

Fig. 6B is a schematic cross-sectional view of a current path from the positive bus to a substrate in the semiconductor module of fig. 1.

Fig. 6C is a schematic cross-sectional view of a current path from the substrate to a midpoint bus in the semiconductor module of fig. 1.

Fig. 6D is a schematic cross-sectional view of a current path from a neutral bus to another substrate in the semiconductor module of fig. 1.

Fig. 6E is a schematic cross-sectional view of a current path from the other substrate to the negative bus in the semiconductor module of fig. 1.

Fig. 6F is a schematic cross-sectional view of a current path from the negative bus to the negative terminal in the semiconductor module of fig. 1.

Fig. 7 to 8 are schematic views of the semiconductor module of fig. 2 mounted to a cooling structure.

Description of the reference numerals

10. 60: semiconductor module

20a, 20b, 30a, 30b: semiconductor assembly

102: resin composition

104. 106, 108: solder material

110: frame body

110a: metal part

300: colloidal material

400: adhesive agent

500: metal material

700: base seat

702. 704: connecting component

710: outer casing

720: cooling unit

CB: midpoint bus

CT: midpoint terminal

IN1, IN2: insulating board

LF1, LF2: lead frame

LQ: liquid

M1, M1', M2, M3', M4: metal layer

NB: negative bus

NT: negative electrode terminal

PB: positive bus

PT: positive electrode terminal

S1, S2: substrate board

SP: signal needle tip

Detailed Description

Fig. 1 is an exploded view of a semiconductor module according to an embodiment of the present utility model. Fig. 2 is a perspective view of the semiconductor module of fig. 1. Fig. 3 is a schematic view of a sectional structure along the line III-III' of fig. 2, and shows a partial structure after the section.

Referring to fig. 1 to 3, the semiconductor module 10 of the present embodiment includes at least two semiconductor devices 20a, 20b and semiconductor devices 30a, 30b connected in series. The semiconductor module 10 basically includes a positive bus PB, a negative bus NB, a midpoint bus CB, and substrates S1, S2. The positive bus PB and the negative bus NB are connected to both ends of the series-connected semiconductor devices 20a, 20b, 30a, 30b, respectively, and the midpoint bus CB is connected to the midpoint of the series-connected semiconductor devices 20a, 20b, 30a, 30b. In one embodiment, the substrates S1, S2 are copper clad ceramic board (DCB) substrates or suitable package substrates thereof. For example, the substrate S1 may include an insulating plate IN1 and metal layers M1, M2 on both sides thereof; the substrate S2 may include an insulating plate IN2 and metal layers M3, M4 on both sides thereof. In one embodiment, the semiconductor devices 20a, 20b, 30a, 30b are each independently a semiconductor device such as an Insulated Gate Bipolar Transistor (IGBT), a freewheeling diode (FWD), a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), or the like. In one embodiment, positive bus PB, negative bus NB, and midpoint bus CB are encapsulated by resin 102, and since bus portions (positive bus PB, negative bus NB, and midpoint bus CB) within semiconductor module 10 are centrally disposed, it is expected that the amount of resin 102 used can be reduced. In one embodiment, the negative bus NB may be connected to the substrate S1 through the lead frame LF 1; the positive bus PB may be connected to the substrate S2 through the lead frame LF 2. Semiconductor module 10 may generally include positive terminal PT, negative terminal NT, and midpoint terminal CT, and may be electrically connected to positive bus PB, negative bus NB, and midpoint bus CB, respectively. The semiconductor module 10 may further include a plurality of signal pins SP for coupling the semiconductor devices 20a, 20b and the semiconductor devices 30a, 30b. In addition, the junctions between the above components may be joined by solder, such as the semiconductor assemblies 20a, 20b being joined to other components by solder 104, the semiconductor assemblies 30a, 30b being joined to other components by solder 106, the midpoint bus CB being joined to the midpoint terminal CT by solder 108; and so on. However, the present utility model is not limited thereto.

Referring to fig. 3, the semiconductor devices 20a and 20b and the semiconductor devices 30a and 30b of the present embodiment are disposed on both sides of the outer side in the stacking direction, which is centered on the positive bus PB, the negative bus NB, and the midpoint bus CB. The substrates S1 and S2 are used to package the semiconductor devices 20a and 20b and the semiconductor devices 30a and 30b outside the stacking direction. The positive bus PB is arranged to face the negative bus NB and is laminated with the midpoint bus CB. Therefore, by designing the relative positions of the positive bus PB, the negative bus NB, and the midpoint bus CB inside the semiconductor module 10, the semiconductor module 10 with small parasitic inductance can be constituted. In the present embodiment, the semiconductor module 10 further includes a frame 110 disposed at an outer periphery perpendicular to the stacking direction of the semiconductor module 10, and the semiconductor devices 20a, 20b and the semiconductor devices 30a, 30b are sealed by bonding the frame 110 and the substrates S1, S2.

In fig. 3, a space surrounded by the substrate S1, the substrate S2, the frame 110, and the bus lines (e.g., the positive bus line PB, the negative bus line NB, and the midpoint bus line CB) is filled with a gel material 300 having a higher thermal conductivity than air; however, the present utility model is not limited thereto, and other packaging methods can be applied. Next, the packaging between the substrate S1, the substrate S2 and the frame 110 in fig. 3 may be achieved in different ways, please refer to fig. 4 and 5.

IN fig. 4, the insulating board IN1 of the substrate S1 or the insulating board IN2 of the substrate S2 may be encapsulated with the frame 110 by curing an adhesive 400, wherein the adhesive 400 is an epoxy-based adhesive or a hermetic package (glass).

In fig. 5, the metal layer M1 'on the inner side of the substrate S1 or the metal layer M3' on the inner side of the substrate S2 may be encapsulated between the metal portion 110a of the frame 110 by metal bonding, and the metal material 500 such as solder or silver sintered block is used.

Fig. 6A to 6F are schematic cross-sectional views of current paths in a semiconductor module according to another embodiment of the present utility model, wherein the same or similar structures are denoted by the same reference numerals as those of the previous embodiment, and the same or similar structure contents can refer to those of the previous embodiment, so that the description thereof is omitted.

Fig. 6A shows the current path from the positive terminal PT to the positive bus PB in the semiconductor module 60, wherein the current trend is indicated by a straight arrow. In fig. 6A, the positive bus PB is arranged to face the negative bus NB, and is stacked on the midpoint bus CB.

Fig. 6B shows a current path from the positive bus PB to the substrate S2 in the semiconductor module 60. In detail, the current flows from the positive bus PB to the metal layer M3 (or electrode) of the substrate S2 through the lead frame LF 2.

Fig. 6C shows a current path from the substrate S2 to the midpoint bus CB in the semiconductor module 60. In detail, the current flows from the metal layer M3 of the substrate S2 to the midpoint bus CB through the semiconductor devices 30a and 30b.

Fig. 6D shows a current path from the neutral bus CB to another substrate S1 in the semiconductor module 60. In detail, the current flows from the neutral bus CB through the lead frame LF1 to the metal layer M1 (or electrode) of the substrate S1.

Fig. 6E shows a current path from the substrate S2 to the negative bus NB in the semiconductor module 60. In detail, the current flows from the metal layer M1 of the substrate S1 to the negative bus NB through the semiconductor devices 20a and 20 b.

Fig. 6F shows a current path from the anode bus NB to the anode terminal NT in the semiconductor module 60.

Further, since the semiconductor module 10 of the present embodiment generates heat during operation, it can be cooled by immersion in a liquid. For example, fig. 7 to 8 are schematic views of the semiconductor module 10 of fig. 2 mounted to a cooling structure.

In fig. 7, the semiconductor module 10 is mounted on a base 700 of a cooling structure, and fig. 7 schematically illustrates only a partial structure of the semiconductor module 10. The negative bus NB, the negative terminal NT, and the midpoint bus CB of the semiconductor module 10 may be connected to the connection member 702, respectively, and the signal pin SP is connected to the connection member 704 on the other side. Note that fig. 7 does not show connection of all the wires, but only schematically shows a state in which the semiconductor module 10 is mounted on the base 700, and fig. 7 shows one semiconductor module 10, but it should be understood that a plurality of side-by-side semiconductor modules 10 may be mounted on the base 700 (in the accommodating space) of the cooling structure at the same time.

Then, in fig. 8, the case 710 of the cooling structure is bonded to the base 700, and a liquid LQ (as a refrigerant) is added thereto, so that the semiconductor module 10 is immersed in the liquid LQ. The cooling unit 720 is then coupled to the housing 710. The cooling unit 720 can exchange heat between the liquid LQ inside the housing 710 and air outside the housing 710 to dissipate heat from the semiconductor module 10 inside the housing 710.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present utility model, and not for limiting the same; although the utility model has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the utility model.

Claims (5)

1. A semiconductor module having at least two semiconductor components connected in series, the semiconductor module comprising:

the positive electrode bus and the negative electrode bus are respectively connected with two ends of the at least two semiconductor assemblies which are connected in series;

a midpoint bus connecting intermediate points of the at least two serially connected semiconductor assemblies;

the semiconductor modules are provided on both sides of the outer side in a stacking direction centered on the positive electrode bus line, the negative electrode bus line, and the midpoint bus line; and

a substrate for packaging the semiconductor assembly outside the stacking direction,

the positive bus line is arranged opposite to the negative bus line and is laminated with the midpoint bus line.

2. The semiconductor module of claim 1, wherein the positive bus and the negative bus and the midpoint bus are sealed by a resin.

3. The semiconductor module of claim 1, wherein the positive bus or the negative bus is connected to the substrate by a lead frame.

4. The semiconductor module according to claim 2, further comprising: and a frame body disposed on an outer periphery of the semiconductor module perpendicular to the stacking direction, wherein the semiconductor module is sealed by bonding the frame body and the substrate.

5. The semiconductor module according to claim 4, wherein a space surrounded by the substrate, the frame, the positive electrode bus line, the negative electrode bus line, and the midpoint bus line is filled with a gel-like material having a higher thermal conductivity than air.