CN210781076U

CN210781076U - Display device, electronic apparatus, and storage medium

Info

Publication number: CN210781076U
Application number: CN201921515845.9U
Authority: CN
Inventors: 王强
Original assignee: Hisense Visual Technology Co Ltd
Current assignee: Hisense Visual Technology Co Ltd
Priority date: 2019-09-12
Filing date: 2019-09-12
Publication date: 2020-06-16
Anticipated expiration: 2029-09-12

Abstract

The utility model provides a display device, electronic equipment and storage medium. The device includes: the power supply board is provided with a power supply circuit and a dummy load circuit, wherein the dummy load circuit comprises a logic control circuit, a dummy load switch circuit and a dummy load, a first output end of the power supply circuit is connected with the dummy load, a second output end of the power supply circuit is connected with the logic control circuit and provides power supply voltage for the logic control circuit, the dummy load switch circuit is respectively connected with the logic control circuit and the dummy load, and the dummy load switch circuit controls whether the dummy load is connected with the first output end of the power supply circuit or not according to a level signal output by the logic control circuit, so that the load of a dynamic loading power supply output end is realized, when the power supply output end is in no-load, the dummy load is added for the power supply output end, the damage of devices is avoided, and the efficiency and the reliability of the power supply.

Description

Display device, electronic apparatus, and storage medium

Technical Field

The utility model relates to a power supply scheme technical field especially relates to a display device, electronic equipment and storage medium.

Background

With the continuous development of electronic technology, the power supply scheme applied to various electronic products is also continuously improved and perfected, and the electronic products are updated and prosperous and development without reliable support provided by the power supply scheme.

Currently, a flyback circuit and a Light Emitting Diode (LED) driving circuit, such as a BUCK circuit, are commonly used in a liquid crystal television to supply power to devices such as a television main board, a sound device, and a backlight. The output end of a Visible-Emitting diode (VLED) of the flyback circuit is connected with the LED driving circuit to provide voltage for the backlight device, so that the backlight is lighted.

However, in the process of backlight lighting, because the VLED output terminal of the flyback circuit is idle, the actual output voltage value of the VLED output terminal is high, and is aggravated along with the load increase of the main output terminal (used for supplying power to devices such as a main board and a sound device), and further, in the moment of backlight lighting, the power device of the LED driving circuit is easily damaged by instant high-voltage impact, and therefore, the reliability of the power supply is low.

SUMMERY OF THE UTILITY MODEL

The utility model provides a display device, electronic equipment and storage medium has realized the dynamic loading that the power is responsible for, avoids the empty load state to cause the damage of power device, has improved the reliability of power.

In a first aspect, the utility model provides a display device, including the power strip, be equipped with supply circuit and dummy load circuit on the power strip, the dummy load circuit includes: a logic control circuit, a dummy load switch circuit and a dummy load;

the first output end of the power supply circuit is connected with the dummy load;

the second output end of the power supply circuit is connected with the logic control circuit and provides power supply voltage for the logic control circuit;

the dummy load switch circuit is respectively connected with the logic control circuit and the dummy load, and the dummy load switch circuit controls whether the dummy load is connected with the first output end of the power supply circuit or not according to the level signal output by the logic control circuit.

Further, the apparatus further comprises: a chip;

a first input end of the logic control circuit is connected with a first output pin of the chip, and a second input end of the logic control circuit is connected with a second output pin of the chip;

the chip sends a power-on and power-off signal to a first input end of the logic control circuit through the first output pin, and the chip sends a backlight switching signal to a second input end of the logic control circuit through the second output pin.

Further, the logic control circuit is configured to obtain the level signal according to the power on/off signal and the backlight switching signal.

Optionally, the logic control circuit includes:

the current limiting circuit comprises a first current limiting resistor, a second current limiting resistor, a first triode, a second triode, a first diode, a second diode, a pull-up resistor, a third current limiting resistor, a fourth current limiting resistor and a third triode;

one end of the first current-limiting resistor is connected with the base electrode of the first triode, and one end of the second current-limiting resistor is connected with the base electrode of the second triode;

the first input end is connected with the emitting electrode of the first triode and the other end of the second current-limiting resistor, and the second input end is connected with the emitting electrode of the second triode and the other end of the first current-limiting resistor;

a collector of the first triode is connected with a cathode of the first diode, a collector of the second triode is connected with a cathode of the second diode, and an anode of the first diode is connected with an anode of the second diode and then connected to a first node;

the first node is further connected with one end of the pull-up resistor and one end of a third current-limiting resistor, the third current-limiting resistor is connected with a base electrode of a third triode, an emitting electrode of the third triode is connected with one end of a fourth current-limiting resistor, and the other end of the pull-up resistor is connected with the other end of the fourth current-limiting resistor and then connected to a second output end of the power supply circuit;

and the collector of the third triode is connected with the dummy load switch circuit.

Optionally, the logic control circuit further includes: a first resistor; and two ends of the first resistor are respectively connected with the first input end and the second input end.

Optionally, the dummy load switch circuit includes:

the driving circuit comprises a first driving resistor, a second driving resistor and an MOS (metal oxide semiconductor) tube;

one end of the first driving resistor is connected with the logic control circuit, the other end of the first driving resistor is connected with one end of the second driving resistor and the grid electrode of the MOS tube respectively, the other end of the second driving resistor is connected with the source electrode of the MOS tube and then grounded, and the drain electrode of the MOS tube is connected with the dummy load.

Optionally, the dummy load includes: eight load resistors;

every two load resistors are connected in series to form four groups of series resistors, one ends of the four groups of series resistors after being connected in parallel are connected with the dummy load switch circuit, and the other ends of the four groups of series resistors after being connected in parallel are connected with the first output end of the power supply circuit.

Optionally, the voltage output by the second output terminal of the power supply circuit is 12V.

In a second aspect, the present invention provides an electronic device, including: the display device, memory and processor of any of the first aspect;

the memory stores computer-executable instructions;

the processor executes computer-executable instructions stored by the memory.

In a third aspect, the present invention provides a storage medium, comprising: a readable storage medium and a computer program for controlling a display apparatus according to any one of the first aspect to implement dynamic loading of a power dummy load.

The embodiment of the utility model provides a display device, electronic equipment and storage medium, including the power strip to be equipped with supply circuit and dummy load circuit on this power strip, wherein, dummy load circuit includes logic control circuit, dummy load switch circuit and dummy load, and supply circuit's first output is connected with dummy load, and supply circuit's second output is connected with logic control circuit, provides supply voltage for logic control circuit; dummy load switch circuit is connected with logic control circuit and dummy load respectively, and dummy load switch circuit basis the level signal control of logic control circuit output whether dummy load inserts power supply circuit's first output has realized the load to dynamic loading power output, on the one hand, when power output end is unloaded, for power output end increases dummy load, avoids causing the device to damage, and on the other hand, when the power normally supplies power for circuit or device, the disconnection perhaps keeps the dummy load of disconnection power output end, avoids causing the unnecessary loss to the power, to sum up, the embodiment of the utility model provides an efficiency and the reliability of power have been improved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive labor.

Fig. 1 is an exploded view of a display device provided by the present invention;

fig. 2 is a schematic diagram of a television power architecture provided by the present invention;

fig. 3 is a schematic structural diagram of a flyback circuit provided by the present invention;

fig. 4 is a schematic structural diagram of a first display device according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of a second display device according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of a third display device according to an embodiment of the present invention;

fig. 7 is a schematic structural diagram of a fourth display device according to an embodiment of the present invention;

fig. 8 is a schematic diagram of a startup timing sequence according to an embodiment of the present invention;

fig. 9 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

As used herein, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or circuitry is not necessarily limited to those steps or circuitry expressly listed, but may include other steps or circuitry not expressly listed or inherent to such process, method, article, or apparatus.

Reference throughout the specification to "one embodiment" or "another embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, the appearances of the phrases "in one embodiment" or "in this embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. It should be noted that, in the present invention, the embodiments and features of the embodiments may be combined with each other without conflict.

Fig. 1 is an exploded view of a display device provided by the present invention, as shown in fig. 1, the display device may include: mainboard 10, shell 20, power strip 30 and display screen 40.

The power panel 30 and the main board 10 are disposed inside the housing 20, and the display screen 40 may be embedded in the inner surface of the housing 20. The power board 30 is connected to the main board 10 and the display screen 40 respectively (not shown in fig. 1), and the power board 30 can provide power supply levels to the main board 10 and the display screen 40 respectively. The main board 10 is connected to the display screen 40 (not shown in fig. 1), and the main board 10 can provide data to the display screen 40, so that the display screen 40 displays normally.

It should be noted that the display device mentioned in this embodiment may include, but is not limited to, a television, a mobile phone, a tablet computer, and the like. The embodiment does not limit the specific implementation forms of the casing 20, the power panel 30 and the display screen 40. For convenience of description, the display device shown in fig. 1 is an exploded view of a television, and the television in fig. 1 may include components such as a television stand in addition to the main board 10, the housing 20, the power board 30, and the display screen 40.

Taking a television as an example to introduce the power architecture thereof, fig. 2 is a schematic diagram of the power architecture of the television provided by the present invention, as shown in fig. 2, the display device may include: power strip 1, load 2, wherein, power strip 1 includes: a rectifier bridge 11, a power supply circuit (also referred to as a flyback circuit) 12, a dummy load circuit 13, and a BUCK circuit 14. The rectifier bridge 11 is connected with the input end of the power supply circuit 12, one output end of the power supply circuit 12 is connected with a main board 21 in the load 2, and the other end of the power supply circuit 12 is connected with the dummy load circuit 13 and the BUCK circuit 14.

The rectifier bridge 11 is configured to rectify an input ac power and input a rectified signal to the power supply circuit 12. The power supply circuit 12 is used to supply power to the main board 21 and the backlight assembly 22 in the load 2. The BUCK circuit 14 is used to overdrive the backlight illumination during the power supply circuit 12 supplying power to the backlight assembly 22.

The load 2 includes a main board 21, a backlight module 22, a display main body 23, and the like, the main board 21 includes components such as a control circuit and a chip, and the received audio/video signal is encoded and decoded and then input to the display main body 23, and optionally, the main board 21 usually needs 12V voltage. The backlight assembly 22 is used to realize display of the display main body 23. The display body 23 may include, but is not limited to, a liquid crystal display, among others.

At present, in a power scheme combining a flyback circuit of a liquid crystal television with a Light Emitting Diode (LED) driving circuit, such as a BUCK circuit, a secondary output of the flyback circuit is two paths, as shown in fig. 3, which is the present invention provides a schematic structural diagram of the flyback circuit. One of the secondary outputs is 12V, which is used as a power supply of a main board and/or a screen drive (TCON) board and/or a sound, and the 12V output is used as a sampling feedback point of a power Control loop, so that the 12V output voltage is stable, which is called a 12V main output end, namely a second output end P2 of the power supply circuit.

The other secondary output of the flyback circuit is used as an input of an LED driving circuit, such as a BUCK circuit, and is called a Visible Light-Emitting Diodes (VLED) secondary output end, i.e., the first output end P1. The theoretical voltage value output by the VLED secondary output end is determined by the ratio of the number of turns of the winding output by the VLED secondary output of the transformer 001 of the flyback circuit to the number of turns of the winding output by the 12V primary output, that is, VLED is 12V × N, where VLED represents the theoretical voltage value output by the VLED secondary output end P1, and N is a turn ratio, because the windings of the transformer 001 of the flyback circuit are not completely coupled actually, when the VLED secondary output end P1 is in no-load, the actual output voltage value of the VLED secondary output end P1 is high in false, and aggravated along with the load of the 12V primary output end P2, at the moment that the BUCK circuit drives the backlight to be turned on, the power device of the BUCK circuit is easily damaged by instant high-voltage impact, the reliability of the power supply is reduced, and if the power device adopts a device with a.

As an alternative embodiment, in order to solve the above technical problem, when necessary, a dummy load circuit is connected to the VLED secondary output terminal P1, and the switching in and off of the dummy load is actively controlled by a signal, which is shown in fig. 4, and is a schematic structural diagram of a first embodiment of the display device according to an embodiment of the present invention. The display device comprises a power panel 1 and a main board 21, wherein a power supply circuit 12 and a dummy load circuit 13 are arranged on the power panel 1, and the dummy load circuit 13 comprises: a dummy load switching circuit 131 and a dummy load 132; the main board 21 is provided with a chip 211;

wherein, the first output terminal P1 of the power supply circuit is connected with the dummy load 132; the second output terminal P2 of the power supply circuit is connected to the dummy load switch circuit 131 to provide a power supply voltage for the dummy load switch circuit 131; the dummy load switch circuit 131 is respectively connected to the chip 211 and the dummy load 132, and the dummy load switch circuit 131 controls whether the dummy load 132 is connected to the first output terminal P1 of the power supply circuit according to the switching signal STB output by the chip 211.

Referring to fig. 4, when the STB is in a high level when the device is turned on, the transistors Q1, Q2, and Q3 are turned on, and the VLED secondary output terminal P1 is connected to the dummy loads R1 to R8; when the STB is in a low level in standby, the triodes Q1, Q2 and Q3 are turned off, and dummy loads R1-R8 of the VLED auxiliary output end P1 are turned off, so that the standby power consumption is not influenced. The dummy load circuit shown in fig. 4 can solve the problem that the power device is easily damaged by high voltage impact when the VLED secondary output end starts the backlight in no-load mode, and does not affect the standby power consumption.

As another alternative embodiment, fig. 5 is a schematic structural diagram of a second display device according to an embodiment of the present invention, and as shown in fig. 5, the display device 20 includes: the power panel is provided with a power supply circuit 210 and a dummy load circuit 220.

Among them, the dummy load circuit 220 includes: a logic control circuit 221, a dummy load switch circuit 222, and a dummy load 223.

For example, the power supply circuit, the logic control circuit 221, the dummy load switch circuit 222, and the dummy load 223 may be disposed in a power panel of the electronic device.

The first output terminal P1 of the power supply circuit 210 is connected to the dummy load 223; the second output terminal P2 of the power supply circuit 210 is connected to the logic control circuit 221 for providing a power supply voltage to the logic control circuit 221.

Optionally, the second output terminal P2 of the power supply circuit 210 always maintains a stable voltage output after the electronic device is connected to an Alternating Current (AC) power source.

Optionally, the voltage output by the second output terminal P2 of the power supply circuit 210 is 12V.

The dummy load switch circuit 222 is respectively connected to the logic control circuit 221 and the dummy load 223, and the dummy load switch circuit 222 controls whether the resistance of the dummy load 223 is connected to the first output terminal P1 of the power supply circuit 210 according to the level signal output by the logic control circuit 221.

As an example, the power supply circuit 210 is a flyback circuit. The power supply circuit 210 includes at least two secondary outputs: wherein, one path of secondary output is 12V main output, and is connected with the power interface of the mainboard and/or the screen end plate and/or the sound equipment and the like through the second output end P2 of the power supply circuit 210 to supply power for the same, in the utility model, the second output end P2 is also connected with the logic control circuit to supply power for the logic control circuit 221; another way secondary output is VLED output, is connected with LED drive circuit through power supply circuit 210's first output P1, for LED drive circuit power supply to make LED drive circuit drive light in a poor light and light the utility model discloses in, first output P1 still is connected with dummy load 223. When the logic control circuit 221 is in the power-on state and the first output terminal P1 is in the idle state, the dummy load is provided for the first output terminal P1, and the dummy load is disconnected after the backlight is turned on or in the standby state, so that the first output terminal P1 supplies power to a real load circuit and a device, unnecessary loss caused by redundant dummy load is avoided, and the power efficiency is reduced.

The display device provided by the embodiment comprises a power panel, wherein the power panel is provided with a power supply circuit and a dummy load circuit, the dummy load circuit comprises a logic control circuit, a dummy load switch circuit and a dummy load, a first output end of the power supply circuit is connected with the dummy load, a second output end of the power supply circuit is connected with the logic control circuit, and the power supply circuit provides power supply voltage for the logic control circuit; the dummy load switch circuit is respectively connected with the logic control circuit and the dummy load, the dummy load switch circuit controls whether the dummy load is connected with the first output end of the power supply circuit or not according to the level signal output by the logic control circuit, so that the load of the dynamic loading power supply output end is realized.

Fig. 6 is a schematic structural diagram of a third display device according to an embodiment of the present invention, and as shown in fig. 6, the device 20 further includes: and a chip 230.

For example, the chip 230 may be disposed in a motherboard of the electronic device.

The first Input terminal B1 of the logic control circuit 221 is connected to the first Output pin a1 of the chip 230, and the second Input terminal B2 of the logic control circuit 221 is connected to the second Output pin a2 of the chip 230, and optionally, the first Output pin a1 and the second Output pin a2 may both be Input/Output (I/Q) pins of the chip 230.

The chip 230 sends a power-ON/off signal STB to the first input terminal B1 of the logic control circuit 221 through the first output pin a1, and the chip 230 sends a backlight switching signal BL _ ON to the second input terminal B2 of the logic control circuit 221 through the second output pin a 2.

The logic control circuit 221 obtains a level signal, which optionally includes a high level and a low level, according to the power ON/off signal STB and the backlight switching signal BL _ ON.

Further, the utility model discloses combine the logic truth table analysis that table 1 shows to draw the dummy load and should be the access state or the off-state, need derive based ON different switching ON and shutting down signals STB and backlight switch signal BL _ ON.

TABLE 1

As shown in table 1, there are several possible situations: firstly, when the electronic device is started, the backlight is not lighted, or the electronic device is in a power-ON screen-off state, for example, the backlight is turned off in a music playing mode, the power-ON/off signal STB is at a high level and is marked as 1, when the backlight is not lighted, the backlight switching signal BL _ ON is at a low level and is marked as 0, at this time, the first output end of the power supply circuit, namely the VLED output end, is in a no-load state, the first output end of the power supply circuit needs to be connected to a dummy load, and the dummy load is marked as 1; secondly, the electronic equipment is started, the backlight is in a lighting state, the power ON/off signal STB is at a high level and is marked as 1, the backlight switching signal BL _ ON is at a high level and is marked as 1, at the moment, the first output end supplies power for the circuit or the device normally, the power is not in a no-load state, the dummy load needs to be disconnected so as to avoid unnecessary loss to the power supply, and the dummy load is marked as 0; and thirdly, when the electronic equipment is not started or in a standby state, the backlight is not lightened, the power ON/off signal STB is at a low level and is marked as 0, the backlight switching signal BL _ ON is at a low level and is marked as 0, and the dummy load needs to be disconnected or kept in a disconnected state so as to save standby power consumption. The dummy load flag is 0; in practical application, there is no situation that the electronic device is not turned ON but the backlight is turned ON, so the power ON/off signal STB is at a low level, which is identified as 0, the backlight switching signal BL _ ON is at a high level, which is identified as 1, the corresponding dummy load is identified as X, and X is in an invalid state. Based ON the above analysis, it can be known that the logic of the dummy load connection or disconnection is the same or result of the power ON/off signal STB and the backlight switching signal BL _ ON.

Based ON the analyzed logic relationship between the dummy load and the switching-ON/off signal STB and the backlight switching signal BL _ ON, the logic control circuit obtains a level signal according to the switching-ON/off signal STB and the backlight switching signal BL _ ON, and controls the dummy load to be connected to the first output end through the high or low of the level signal, or to be disconnected from the first output end, or to be kept connected to or disconnected from the first output end.

As an example, if the power ON/off signal STB and the backlight switching signal BL _ ON input by the chip 230 are both at a low level, the level signal output by the logic control circuit 221 is at a low level; if the power ON/off signal STB input by the chip 230 is at a high level and the backlight switching signal BL _ ON is at a low level, the level signal output by the logic control circuit 221 is at a high level; if both the power ON/off signal STB and the backlight switching signal BL _ ON input by the chip 230 are at a high level, the level signal output by the logic control circuit 221 is at a low level.

Further, if the level signal is high level, the dummy load switch circuit 221 controls the dummy load 223 to be connected to the first output terminal P1 of the power supply circuit 210, it should be understood that, if the dummy load 223 is already connected to the first output terminal P1 of the power supply circuit 210, the connected state is maintained; if the level signal is low, the dummy load switch circuit 221 controls the dummy load 223 not to be connected to the first output terminal P1 of the power supply circuit 210, it should be understood that the dummy load 223 is kept in a disconnected state if it is already connected to the first output terminal P1 of the power supply circuit 210, and is disconnected if it is connected to the first output terminal P1 of the power supply circuit 210.

Fig. 7 is a schematic structural diagram of a fourth display device according to an embodiment of the present invention.

As shown in fig. 7, the logic control circuit 221 in the display device includes:

the current limiting circuit comprises a first current limiting resistor R15, a second current limiting resistor R14, a first triode Q4, a second triode Q3, a first diode VD1, a second diode VD2, a pull-up resistor R12, a third current limiting resistor R11, a fourth current limiting resistor R13 and a third triode Q2.

One end of a first current limiting resistor R15 is connected with the base B of a first triode Q4, and one end of a second current limiting resistor R14 is connected with the base B of a second triode Q3;

the first input end B1 is connected to the emitter E of the first transistor Q4 and the other end of the second current limiting resistor R14, and the second input end B2 is connected to the emitter E of the second transistor Q3 and the other end of the first current limiting resistor R15.

A collector C of the first triode Q4 is connected with a cathode of a first diode VD1, a collector C of the second triode Q3 is connected with a cathode of a second diode VD2, and an anode of the first diode VD1 is connected with an anode of a second diode VD2 and then is connected to a first node N;

the first node N is further connected with one end of a pull-up resistor R12 and one end of a third current-limiting resistor R11, the third current-limiting resistor R11 is connected with a base B of a third triode Q2, an emitter E of the third triode Q2 is connected with one end of a fourth current-limiting resistor R13, and the other end of the pull-up resistor R12 is connected with the other end of the fourth current-limiting resistor R13 and then connected to a second output end P2 of the power supply circuit 11;

the collector C of the third transistor Q2 is connected to the dummy load switch circuit 222.

In one possible design, the logic control circuit 221 further includes: a first resistor R16; the first resistor R16 has two ends connected to the first input terminal B1 and the second input terminal B1, respectively, and functions as a stabilizing circuit.

As shown in fig. 7, the dummy load switch circuit 222 in the display device includes:

the driving circuit comprises a first driving resistor R10, a second driving resistor R9 and a MOS transistor Q1.

One end of the first driving resistor R10 is connected to the logic control circuit 221, the other end of the first driving resistor R10 is connected to one end of the second driving resistor R9 and the gate G of the MOS transistor Q1, the other end of the second driving resistor R9 is connected to the source S of the MOS transistor Q1 and then grounded, and the drain D of the MOS transistor Q1 is connected to the dummy load 223.

As shown in fig. 7, the dummy load 223 in the display device includes: each of the eight load resistors R1 to R8, R1 to R8 may be the same resistor or different resistors.

Every two load resistors are connected in series to form four groups of series resistors, one end of each of the four groups of series resistors connected in parallel is connected with the dummy load switch circuit 222, and the other end of each of the four groups of series resistors connected in parallel is connected with the first output end P1 of the power supply circuit 11.

Optionally, when the scheme is applied to a television, the resistance value of R15 is 10k ohms, the resistance value of R14 is 10k ohms, the resistance value of R16 is 100k ohms, the resistance value of R12 is 10k ohms, the resistance value of R11 is 10k ohms, the resistance value of R13 is 47R, the resistance value of R9 is 10k ohms, R10 is 27R, and all of R1 to R8 are 200k ohms.

On the basis of the above embodiments, it can be understood that the utility model provides a display device, including following specific implementation:

in a first mode, when the electronic device is turned ON, the backlight is not turned ON, or the electronic device is in a power-ON screen-off state, for example, the backlight is turned off in the music playing mode, the power ON/off signal STB is at a high level, the backlight switching signal BL _ ON is at a low level, at this time, a voltage difference between the base B and the emitter E of the second transistor Q3 is greater than a preset voltage, optionally, the preset voltage may be 0.7V, the second transistor Q3 is turned ON, a voltage difference between the base B and the emitter E of the first transistor Q4 is negative, the first transistor Q4 is turned off, so that the base B of the third transistor Q2 is at a low level, the collector of the third transistor Q2 is connected with the second output terminal of the power supply circuit at a high level, the third transistor Q2 is turned ON, the level signal output by the logic control circuit 221 is at a high level, that the gate of the MOS transistor Q1 is at a high level, Q1, and the dummy loads R35 to R8 are connected to the first output terminal, and the condition that the secondary output of the flyback circuit is unloaded to cause serious virtual high voltage is avoided.

In the second mode, when the electronic device is turned ON and the backlight is in the lighting state, the power ON/off signal STB and the backlight switching signal BL _ ON are both at the high level, and at this time, the voltage difference between the base B and the emitter E of the second transistor Q3 is 0, the second transistor Q3 is turned off, the voltage difference between the base B and the emitter E of the first transistor Q4 is 0, the first transistor Q4 is turned off, so that the base B of the third transistor Q2 is at a high level, the third transistor Q2 is turned off, the level signal outputted from the logic control circuit 221 is at a low level, that is, the gate of the MOS transistor Q1 is at low level, Q1 is turned off, the dummy loads R1 to R8 are disconnected from the first output terminal P1 of the power supply circuit 11, or remain disconnected from the first output terminal P1 of the power supply circuit 11, namely, when the backlight is lightened, the output secondary circuit of the flyback circuit has a load, and a dummy load is disconnected in a non-idle mode, so that the power supply efficiency is improved.

In a third mode, when the electronic device is not turned ON or in a standby state, the backlight is not turned ON, the power ON/off signal STB and the backlight switching signal BL _ ON are both at a low level, at this time, a voltage difference between a base B and an emitter E of the second triode Q3 is 0, the second triode Q3 is turned off, a voltage difference between a base B and an emitter E of the first triode Q4 is 0, the first triode Q4 is turned off, so that the base B of the third triode Q2 is at a high level, the third triode Q2 is turned off, the level signal output by the logic control circuit 221 is at a low level, that is, the gate of the MOS transistor Q1 is at a low level, the transistor Q1 is turned off, and the dummy loads R1 to R8 are disconnected from the first output terminal P1 of the power supply circuit 11, or kept in a disconnected state with the first output terminal P1 of the power supply circuit 11, so that power consumption is.

Exemplarily, compare with only utilizing switch ON/off signal STB to control the access and/or disconnection of dummy load among the prior art, the utility model discloses utilize switch ON/off signal STB, backlight switch signal BL _ ON combination to realize more accurate control logic about dummy load access and/or disconnection, dynamic load's access only exists under "start + backlight extinction screen" logic state promptly, has compensatied that existing scheme is under "liquid crystal TV starts and is shaded and light up, i.e. the secondary output of flyback circuit has had the load" the condition, and the logic that dummy load should break off has avoided dummy load to continuously consume the energy, has improved power efficiency.

Secondly, under the condition that LCD TV does not take "listen to the music on the screen", utilize the utility model discloses an active dynamic load circuit advantage then can be bigger. Given that the access of the dynamic dummy load only exists in the logic state of 'on + backlight off screen', two situations exist in the actual product: firstly, a backlight lighting starting process after starting up. And secondly, the liquid crystal television has a function of listening to music on an information screen. And under the condition of not taking "listening to music with screen" function of the information, then dynamic dummy load inserts and only exists the power-on as shown in fig. 8 to light the short-term process of t 1-t 2 in the backlight, fig. 8 is the utility model provides a start-up chronogenesis sketch map, the power loss of dynamic dummy load this moment promptly can be understood as transient loss to can furthest utilize the power specification of device, for example dummy load R1-R8 in the dummy load can adopt less resistance number, MOS pipe Q1 in the dummy load switch circuit adopts switch tube etc. that the conduction current specification is lower, provide the space for reduce cost improves reliability and PCB overall arrangement. Meanwhile, because the heat consumption of the dynamic dummy load is very small and can be ignored, the dynamic dummy load can be increased to a greater extent, the virtual high voltage output by the secondary side of the flyback circuit is pulled to be lower, an LED driving circuit is allowed, and an MOSFET in the BUCK adopts a lower voltage-resistant specification, so that the cost is reduced.

Fig. 9 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present invention. As shown in fig. 9, the electronic device 30 provided in the present embodiment may include: the display device 301, the memory 302, and the processor 303 described in the above embodiments; optionally, a bus 304 may also be included. The bus 304 is used to realize the connection between the elements.

The memory 302 stores computer-executable instructions;

the processor 303 executes computer-executable instructions stored by the memory 302.

Wherein the memory 302 and the processor 303 are electrically connected directly or indirectly to enable data transmission or interaction. For example, the components may be electrically coupled to each other via one or more communication buses or signal lines, such as bus 304. The memory 302 stores computer-executable instructions for implementing the data access control method, including at least one software functional module, which may be stored in the memory 302 in the form of software or firmware, and the processor 303 executes various functional applications and data processing by running software programs and modules stored in the memory 302.

The Memory 302 may be, but is not limited to, a Random Access Memory (RAM), a Read Only Memory (ROM), a Programmable Read-Only Memory (PROM), an Erasable Read-Only Memory (EPROM), an electrically Erasable Read-Only Memory (EEPROM), and the like. The memory 302 is used for storing programs, and the processor 303 executes the programs after receiving execution instructions. Further, the software programs and modules within the memory 302 may also include an operating system, which may include various software components and/or drivers for managing system tasks (e.g., memory management, storage device control, power management, etc.), and may communicate with various hardware or software components to provide an operating environment for other software components.

The processor 303 may be an integrated circuit chip having signal processing capabilities. The Processor 303 may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and so on. The various methods, steps and logic blocks disclosed in embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. It will be appreciated that the configuration of fig. 9 is merely illustrative and may include more or fewer components than shown in fig. 9 or have a different configuration than shown in fig. 9. The components shown in fig. 9 may be implemented in hardware and/or software.

The embodiment of the present invention further provides a computer readable storage medium, on which a computer executing instruction is stored, and the computer executing instruction is executed by a processor, for controlling the display device described in the above embodiment to implement dynamic loading of the power dummy load.

The computer-readable storage medium in this embodiment may be any available medium that can be accessed by a computer or a data storage device such as a server, a data center, etc. that is integrated with one or more available media, and the available media may be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., SSDs), etc.

Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention.

Claims

1. A display device comprises a power panel, and is characterized in that a power supply circuit and a dummy load circuit are arranged on the power panel, and the dummy load circuit comprises: a logic control circuit, a dummy load switch circuit and a dummy load;

2. The apparatus of claim 1, further comprising: a chip;

3. The apparatus of claim 2, wherein the logic control circuit is configured to derive the level signal according to the power-on/off signal and the backlight switching signal.

4. The apparatus of claim 2 or 3, wherein the logic control circuit comprises:

5. The apparatus of claim 4, wherein the logic control circuit further comprises: a first resistor; and two ends of the first resistor are respectively connected with the first input end and the second input end.

6. The apparatus of claim 1, wherein the dummy load switch circuit comprises:

7. The apparatus of claim 1, wherein the dummy load comprises: eight load resistors;

8. The apparatus of claim 1, wherein the voltage output by the second output terminal of the power supply circuit is 12V.

9. The utility model provides a display device, includes power strip and mainboard, its characterized in that, be equipped with supply circuit and dummy load circuit on the power strip, dummy load circuit includes: a dummy load switch circuit and a dummy load; a chip is arranged on the mainboard;

the second output end of the power supply circuit is connected with the dummy load switch circuit and provides power supply voltage for the dummy load switch circuit;

the dummy load switch circuit is respectively connected with the chip and the dummy load, and the dummy load switch circuit controls whether the dummy load is connected with the first output end of the power supply circuit or not according to the on-off signal output by the chip.

10. An electronic device, comprising: a memory, a processor and a display device according to any one of claims 1 to 9;

the processor is connected with the display device and the memory through a bus;

the memory is used for storing computer execution instructions;

the processor is configured to execute computer-executable instructions stored by the memory.

11. A storage medium, comprising: a readable storage medium and a computer program for controlling a display apparatus according to any one of claims 1 to 9 to implement power supply dummy load dynamic loading.