CN210348238U - Chip utilization rate control system - Google Patents
Chip utilization rate control system Download PDFInfo
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- CN210348238U CN210348238U CN201921190838.6U CN201921190838U CN210348238U CN 210348238 U CN210348238 U CN 210348238U CN 201921190838 U CN201921190838 U CN 201921190838U CN 210348238 U CN210348238 U CN 210348238U
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Abstract
The utility model discloses a chip utilization rate control system relates to the electronic circuit field, but when current chip need lifting utilization among the solution prior art, need consume the problem that a large amount of electric energy supplied with. The output of transformer is connected with the output of little the control unit, the output of relay is connected with the input of switch, the input of switch is connected with the output of little the control unit, the output of switch is connected with the input of signal detection unit, signal detection unit output is connected with the input of judgement unit, the output of judgement unit is connected with the input of chip, the input of timing module is connected with the output of processor module, the input of processor module is connected with the output of information receiving module, the input of information receiving module is connected with the output of wireless connection module, the input of wireless connection module is connected with the output of cell-phone module.
Description
Technical Field
The utility model relates to an electronic circuit technical field specifically is a chip utilization ratio control system.
Background
An integrated circuit in which a circuit is manufactured on a surface of a semiconductor chip is also called a thin-film (thin-film) integrated circuit. Another type of thick-film integrated circuit (thick-film) is a miniaturized circuit formed by a separate semiconductor device and a passive component integrated on a substrate or a circuit board. Integrated circuits have two main advantages for discrete transistors: cost and performance. The cost is low because the chip prints all the components as a unit by photolithography, rather than making only one transistor at a time. The high performance is due to the components switching fast, consuming less energy, because the components are small and close to each other. In 2006, the chip area was from a few square millimeters to 350mm2Per mm, of2Up to one million transistors may be achieved.
The scale production capacity and reliability of the integrated circuit and the modular method of circuit design ensure that the standardized integrated circuit is quickly adopted to replace the discrete transistor used in design, but the existing chip needs to consume a large amount of electric energy for supplying when the utilization rate needs to be improved, the defects are obvious, and the space allocation is not flexible enough; therefore, the market is urgently in need of developing a chip utilization rate control system to help people solve the existing problems.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a chip utilization ratio control system to when solving the current chip that proposes in the above-mentioned background art and need the lifting utilization ratio, need consume the problem that a large amount of electric energy supplied with.
In order to achieve the above object, the utility model provides a following technical scheme: a chip utilization rate control system comprises an energy-saving control system and a utilization rate control system, wherein the energy-saving control system comprises a power supply, the output end of the power supply is respectively connected with the input ends of a timing module, a transformer and a relay, the output end of the transformer is connected with the output end of a micro-control unit, the output end of the relay is connected with the input end of a switch, the input end of the switch is connected with the output end of the micro-control unit, the output end of the switch is connected with the input end of a signal detection unit, the output end of the signal detection unit is connected with the input end of a judgment unit, the output end of the judgment unit is connected with the input end of a chip, the input end of the timing module is connected with the output end of a processor module, the input end of the processor module is connected with the output end of an, the input end of the wireless connection module is connected with the output end of the mobile phone module.
Preferably, the utilization rate control system comprises a keyboard module, an output end of the keyboard module is connected with an input end of the processor module, an output end of the processor module is connected with an input end of the transformer, an output end of the transformer is connected with an input end of the micro-control unit, an output end of the micro-control unit is connected with an input end of the chip, an output end of the chip is connected with an input end of the information receiving module, and an output end of the information receiving module is connected with an input end of the display module.
Preferably, the timing module is a PLL clock buffer, the relay is a time delay relay, and the transformer is an SCB100.4KV dry transformer.
Preferably, the micro-control unit adopts a micro-control module with the model number of 5vsk6812ws2812b, and the processor module adopts a communication processor module with the model number of S7-300CP 341.
Preferably, the mobile phone module adopts a smart phone which can be connected to a wireless internet.
Preferably, the information receiving module adopts a radio frequency receiving module with the model of RFM210LCF, and the wireless connection module adopts wireless internet connection.
Compared with the prior art, the beneficial effects of the utility model are that:
1. the utility model discloses a setting through energy-saving control system, the chip is when using for a long time, can occupy a large amount of resources, and need not use its maximum utilization ratio at all, set up time through mobile phone module, send the processor module for the chip through the wireless connection module, give time module down the order through the processor module, only improve the power of transformer in the specific time, thereby reduce the consumption that the chip used, it is extravagant to further reduce the energy, replace the action of awakening up of the detection of the simple digital circuit judgement mode of micro-control unit originally through energy-saving control system, and direct transformer and the power direct closing of the micro-control unit who provides, in order to reach the effect of power saving.
2. The utility model discloses a through utilization ratio control system's setting, the chip is when needs utilization ratio increase, and accessible keyboard module input instruction adjusts the voltage of transformer through processor module, improves the power of chip through the micro-control unit to make the utilization ratio of chip improve, show in the display module, in order to make things convenient for personnel to use.
Drawings
Fig. 1 is a schematic diagram of an energy-saving control system of the present invention;
fig. 2 is a schematic diagram of the utilization rate control system of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments.
Referring to fig. 1-2, the present invention provides an embodiment: a chip utilization rate control system comprises an energy-saving control system and a utilization rate control system, wherein the energy-saving control system comprises a power supply, the output end of the power supply is respectively connected with a timing module, the input of transformer and relay is connected, the output of transformer is connected with the output of little the control unit, the output of relay is connected with the input of switch, the input of switch is connected with the output of little the control unit, the output of switch is connected with the input of signal detection unit, signal detection unit output is connected with the input of judgement unit, the output of judgement unit is connected with the input of chip, the input of timing module is connected with the output of processor module, the input of processor module is connected with the output of information receiving module, the input of information receiving module is connected with the output of wireless connection module, the input of wireless connection module is connected with the output of cell-phone module.
Further, the utilization rate control system comprises a keyboard module, the output end of the keyboard module is connected with the input end of the processor module, the output end of the processor module is connected with the input end of the transformer, the output end of the transformer is connected with the input end of the micro-control unit, the output end of the micro-control unit is connected with the input end of the chip, the output end of the chip is connected with the input end of the information receiving module, and the output end of the information receiving module is connected with the input end of the display module.
Furthermore, the timing module adopts a PLL clock buffer model, the relay adopts a time delay relay, the transformer adopts an SCB100.4KV dry type transformer, the time is set through the mobile phone module, and the time is sent to the processor module of the chip through the wireless connection module.
Furthermore, the micro-control unit adopts a micro-control mode of 5vsk6812ws2812b, the processor module adopts a communication processor module of S7-300CP341, and the processor module gives a command under the timing module, so that the power of the transformer is increased only within a specific time.
Furthermore, the mobile phone module adopts a smart phone which can be connected to the wireless internet, the time is set through the mobile phone module, and the time is sent to the processor module of the chip through the wireless connection module.
Furthermore, the information receiving module adopts a radio frequency receiving module with the model of RFM210LCF, the wireless connection module adopts wireless internet connection, and the utilization rate of the chip can be remotely controlled through the wireless connection module.
The working principle is as follows: during the use, accessible cell-phone module set up time, send the processor module for the chip through wireless connection module, give the time module down order through the processor module, only improve the power of transformer in the specific time, the transformer is in low power state for a long time, thereby make chip work be in the low-power consumption state, thereby transformer and the power direct closing of the little control unit who provides, in order to reach the effect of power saving, the chip is when needs improve the utilization ratio, accessible keyboard module input instruction, adjust the voltage of transformer through the processor module, improve the power of chip through little control unit, thereby make the utilization ratio of chip improve.
It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (6)
1. A chip utilization rate control system comprises an energy-saving control system and a utilization rate control system, and is characterized in that: the energy-saving control system comprises a power supply, the output end of the power supply is respectively connected with the input ends of the timing module, the transformer and the relay, the output end of the transformer is connected with the output end of the micro-control unit, the output end of the relay is connected with the input end of the switch, the input end of the switch is connected with the output end of the micro-control unit, the output end of the switch is connected with the input end of the signal detection unit, the output end of the signal detection unit is connected with the input end of the judgment unit, the output end of the judgment unit is connected with the input end of the chip, the input end of the timing module is connected with the output end of the processor module, the input end of the processor module is connected with the output end of the information receiving module, the input end of the information receiving module is connected with the output end of the wireless connection module, and the input end of the wireless connection module is connected with the output end of the mobile phone module.
2. The chip utilization control system of claim 1, wherein: the utilization rate control system comprises a keyboard module, wherein the output end of the keyboard module is connected with the input end of a processor module, the output end of the processor module is connected with the input end of a transformer, the output end of the transformer is connected with the input end of a micro-control unit, the output end of the micro-control unit is connected with the input end of a chip, the output end of the chip is connected with the input end of an information receiving module, and the output end of the information receiving module is connected with the input end of a display module.
3. The chip utilization control system of claim 1, wherein: the timing module adopts a PLL clock buffer, the relay adopts a time delay relay, and the transformer adopts an SCB100.4KV dry type transformer.
4. The chip utilization control system of claim 1, wherein: the micro-control unit adopts a micro-control unit with the model number of 5vsk6812ws2812b, and the processor module adopts a communication processor module with the model number of S7-300CP 341.
5. The chip utilization control system of claim 1, wherein: the mobile phone module adopts a smart phone which can be connected to the wireless internet.
6. The chip utilization control system of claim 1, wherein: the information receiving module adopts a radio frequency receiving module with the model of RFM210LCF, and the wireless connecting module adopts wireless internet connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921190838.6U CN210348238U (en) | 2019-07-26 | 2019-07-26 | Chip utilization rate control system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921190838.6U CN210348238U (en) | 2019-07-26 | 2019-07-26 | Chip utilization rate control system |
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| Publication Number | Publication Date |
|---|---|
| CN210348238U true CN210348238U (en) | 2020-04-17 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201921190838.6U Active CN210348238U (en) | 2019-07-26 | 2019-07-26 | Chip utilization rate control system |
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| CN (1) | CN210348238U (en) |
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- 2019-07-26 CN CN201921190838.6U patent/CN210348238U/en active Active
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Address after: 210000 floor 13, tower C, Tengfei building, research and Innovation Park, Nanjing area, China (Jiangsu) pilot Free Trade Zone, Nanjing, Jiangsu Patentee after: Jiangsu Changjing Technology Co.,Ltd. Address before: Room 1087, hatch Eagle building, No. 99, Tuanjie Road, yanchuang Park, Jiangbei new district, Nanjing, Jiangsu 211800 Patentee before: Jiangsu Changjing Technology Co.,Ltd. |
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