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CN210051350U - Detection circuit applied to piezoresistive sensor - Google Patents

Detection circuit applied to piezoresistive sensor Download PDF

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Publication number
CN210051350U
CN210051350U CN201920884548.5U CN201920884548U CN210051350U CN 210051350 U CN210051350 U CN 210051350U CN 201920884548 U CN201920884548 U CN 201920884548U CN 210051350 U CN210051350 U CN 210051350U
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CN
China
Prior art keywords
circuit
resistor
capacitor
series
piezoresistive sensor
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Expired - Fee Related
Application number
CN201920884548.5U
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Chinese (zh)
Inventor
何鑫
刘志豪
沈耿哲
陈柏桦
赵思柔
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Wuyi University
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Wuyi University
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Abstract

The utility model discloses a detection circuit applied to a piezoresistive sensor, which comprises a direct current voltage stabilizing circuit, a voltage dividing circuit, a differential amplifying circuit and a zero setting circuit which are connected in sequence, the voltage division circuit comprises a first branch circuit and a second branch circuit which are connected in parallel, the first branch circuit is formed by connecting a first reference resistor and a series connection end in series, the second branch is formed by connecting a second reference resistor and a third reference resistor in series, the first reference resistor is connected between the first reference resistor and the series connection end, and between the second reference resistance and the third reference resistance, respectively leading out lines to be connected with the differential amplifying circuit, eliminating potential difference under zero input by utilizing a zero setting circuit, meanwhile, the detection current is further leveled by combining a direct current voltage stabilizing circuit, so that the detection result of the piezoresistive sensor is more stable and accurate, the equipment cost of the circuit is reduced, and the stability is higher.

Description

Detection circuit applied to piezoresistive sensor
Technical Field
The utility model relates to a towards the detection circuitry of sensor, especially a be applied to detection circuitry of piezoresistive sensor.
Background
The piezoresistive sensor senses the change of external physical quantity to cause the change of some performances of the sensor, and the change is output in an electric signal mode through the conversion element. At present, the traditional test means is to test the potential difference at two ends of a piezoresistive sensor through a Wheatstone bridge to reflect the external test environment change, the test method brings larger experimental error, most detected electric signals present a plurality of unstable factors, and a plurality of common-mode signals with extremely strong interference exist, so that great error is brought to the experimental result.
SUMMERY OF THE UTILITY MODEL
In order to solve the problem, the utility model provides a be applied to detection circuitry of piezoresistive sensor is different from traditional Wheatstone bridge test mode, based on direct current voltage stabilizing circuit and zero setting circuit, can bring more stable and accurate measuring result, has also reduced circuit equipment cost simultaneously.
The utility model provides a technical scheme that its problem adopted is:
a detection circuit applied to a piezoresistive sensor comprises a direct current voltage stabilizing circuit, a voltage dividing circuit, a differential amplifying circuit and a zero setting circuit, the voltage division circuit comprises a first branch circuit and a second branch circuit, the first branch circuit and the second branch circuit are connected in parallel and then grounded, the first branch circuit comprises a first reference resistor and a serial end for accessing the sensor to be tested, the first reference resistor is connected with the serial end in series, the second branch circuit comprises a second reference resistor and a third reference resistor, the second reference resistor and the third reference resistor are connected in series, the output end of the direct current voltage stabilizing circuit is connected with the voltage dividing circuit, the first reference resistor is connected between the first reference resistor and the serial end, and between the second reference resistance and the third reference resistance, leading out lines respectively connected to the differential amplifier circuit, the output end of the zero setting circuit is connected with the differential amplification circuit, and the output end of the differential amplification circuit is used as a detection result output end.
Further, the direct current voltage stabilizing circuit comprises a transformer, a rectifying circuit, a filter circuit and a voltage stabilizing circuit, wherein the transformer, the rectifying circuit, the filter circuit and the voltage stabilizing circuit are sequentially connected, the voltage stabilizing circuit is connected with the voltage dividing circuit, the input end of the transformer is connected with an alternating current commercial power, and the output end of the transformer is connected with two alternating current ends of the rectifying circuit. The direct current voltage stabilizing circuit converts alternating current commercial power into direct current and performs smooth shaping, so that the circuit is more stable in the detection process.
Furthermore, the type of the transformer is NLT-PQ-4-10, and the type of the rectifying circuit is 1B4B 42. NLT-PQ-4-10 is a mutual inductance coupling transformer, and 1B4B42 is a single-phase bridge rectifier circuit.
Further, the filter circuit comprises a second capacitor and a third capacitor, and the second capacitor and the third capacitor are connected in parallel and then are connected to two direct current ends of the rectifier circuit. The characteristics of the capacitor are utilized to filter the fluctuation in the direct current, and the purer direct current is obtained.
Further, the voltage stabilizing circuit comprises a voltage stabilizer, a first resistor, a second resistor, a third resistor, a first capacitor and a capacitor, wherein the input end of the voltage stabilizer is connected with the filter circuit, the common end, the first resistor and the third resistor of the voltage stabilizer are sequentially connected in series, the second resistor and the capacitor are connected in series to be connected to the output end of the voltage stabilizer, and the first capacitor is also connected to the output end of the voltage stabilizer. The voltage stabilizer shapes the voltage, so that the detection result is more accurate, and the obtained oscillogram is closer to the change rule of the piezoresistive sensor.
Further, the first resistance is 1K Ω, the second resistance is 60 Ω, the third resistance is 20 Ω, the first capacitance is 1uF, the second capacitance is 470uF, the third capacitance is 100uF, and the capacitance is 100 nF.
Further, the first resistance is 5K Ω, the second resistance is 47 Ω, the third resistance is 60 Ω, the first capacitance is 47uF, the second capacitance is 47uF, the third capacitance is 200uF, and the capacitance is 47 nF.
The embodiment of the utility model has following beneficial effect at least: the utility model discloses utilize the zero setting circuit to eliminate the potential difference under the zero input, combine direct current voltage stabilizing circuit to further carry out level and smooth processing to measuring current simultaneously for to piezoresistive sensor's testing result more stable and accurate, need not insert detecting instrument in the on the other hand circuit, from the overhead self circuit interference of getting rid of supply voltage source, also reduced the equipment cost of circuit simultaneously, stability is higher.
Drawings
The present invention will be further explained with reference to the drawings and examples.
Fig. 1 is a circuit module connection diagram of an embodiment of the present invention;
fig. 2 is a circuit diagram of a dc voltage regulator circuit according to an embodiment of the present invention;
FIG. 3 is a waveform diagram of the output resistance variation sensed by the two ends of the direct test sensor under the conventional method;
fig. 4 is a waveform diagram output by the embodiment of the present invention when detecting the piezoresistive sensor.
Detailed Description
This section will describe in detail the embodiments of the present invention, preferred embodiments of the present invention are shown in the attached drawings, which are used to supplement the description of the text part of the specification with figures, so that one can intuitively and vividly understand each technical feature and the whole technical solution of the present invention, but they cannot be understood as the limitation of the protection scope of the present invention.
In the description of the present invention, it should be understood that the orientation or positional relationship indicated with respect to the orientation description, such as up, down, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, a plurality of means are one or more, a plurality of means are two or more, and the terms greater than, less than, exceeding, etc. are understood as not including the number, and the terms greater than, less than, within, etc. are understood as including the number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless there is an explicit limitation, the words such as setting, installation, connection, etc. should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above words in combination with the specific contents of the technical solution.
Referring to fig. 1, a first embodiment of the present invention provides a detection circuit applied to a piezoresistive sensor, including a dc voltage stabilizing circuit, a voltage dividing circuit, a differential amplifying circuit and a zeroing circuit, where the voltage dividing circuit includes a first branch and a second branch, the first branch and the second branch are connected in parallel and then grounded, the first branch includes a first reference resistor and a serially connected end for connecting to a sensor to be detected, the first reference resistor is connected in series with the serially connected end, the second branch includes a second reference resistor and a third reference resistor, the second reference resistor is connected in series with the third reference resistor, an output end of the dc voltage stabilizing circuit is connected to the voltage dividing circuit, a line is respectively led out between the first reference resistor and the serially connected end, and a line is respectively led out between the second reference resistor and the third reference resistor to connect to the differential amplifying circuit, an output end of the zeroing circuit is connected to the differential amplifying circuit, and the output end of the differential amplification circuit is used as a detection result output end. When the piezoresistive sensor is measured, the sensor to be measured is connected into the series end, the sensor to be measured is connected with the first reference resistor in series, then the sensor to be measured is subjected to pressure operation, and if the sensor to be measured is pressed once at intervals, a detection result which is changed along with the pressure of the sensor to be measured can be obtained at the output end of the differential amplification circuit. Generally, the output end of the differential amplifying circuit is connected with an oscilloscope, so that the waveform can be observed conveniently and detection data can be acquired conveniently.
Referring to fig. 2, the dc voltage stabilizing circuit includes a transformer T1, a rectifying circuit, a filter circuit and a voltage stabilizing circuit, the transformer T1, the rectifying circuit, the filter circuit and the voltage stabilizing circuit are sequentially connected, the voltage stabilizing circuit is connected to the voltage dividing circuit, the input terminal of the transformer T1 is connected to an ac mains supply, and the output terminal of the transformer T1 is connected to two ac terminals of the rectifying circuit. The filter circuit comprises a second capacitor C2 and a third capacitor C3, and the second capacitor C2 and the third capacitor C3 are connected in parallel and then connected to two direct current ends of the rectifying circuit.
The voltage stabilizing circuit comprises a voltage stabilizer U1, a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1 and a capacitor C4, wherein the input end of the voltage stabilizer U1 is connected with the filter circuit, the common end of the voltage stabilizer U1, the first resistor R1 and the third resistor R3 are sequentially connected in series, the second resistor R2 and the capacitor C4 are connected in series to the output end of the voltage stabilizer U1, and the first capacitor C1 is also connected to the output end of the voltage stabilizer U1.
In the embodiment, the model of the transformer T1 is NLT-PQ-4-10, and the model of the rectifying circuit is 1B4B 42. Actually, NLT-PQ-4-10 is a mutual inductance coupling transformer T1, 1B4B42 is a single-phase bridge rectifier circuit, the first resistor R1 is 1K Ω, the second resistor R2 is 60 Ω, the third resistor R3 is 20 Ω, the first capacitor C1 is 1uF, the second capacitor C2 is 470uF, the third capacitor C3 is 100uF, the capacitor C4 is 100nF, refer to fig. 3 and 4, fig. 3 is an output waveform of a piezoresistive sensor not accessed to an embodiment of the present invention, actually an indication of the external test environment variation output resistance value sensed at both ends of the sensor is directly tested, that is, the conventional method can use the resistance variation to represent the working condition of the sensor to be tested, and fig. 4 is an output waveform of the piezoresistive sensor accessed to an embodiment of the present invention, since the output of the present invention is connected to an oscilloscope, a voltage-time relationship waveform graph is obtained, the change of resistance value can be shown equally, and contrast figure 3 and figure 4 can clearly see the process the utility model discloses testing result behind the circuit is more level and smooth than traditional method, and the wave form is comparatively level and smooth to all kinds of interference among the actual conditions have carried out filtering process, and the oscillogram that obtains is truer and more reliable.
The second embodiment of the present invention provides a detection circuit applied to a piezoresistive sensor, and the difference between the first embodiment is that the first resistor R1 is 5K Ω, the second resistor R2 is 47 Ω, the third resistor R3 is 60 Ω, the first capacitor C1 is 47uF, the second capacitor C2 is 47uF, the third capacitor C3 is 200uF, and the capacitor C4 is 47 nF. As another example, adjustments are made in parameters, indicating that better measurement results can be achieved for different piezoresistive sensors, as long as the appropriate parameters are adjusted.
Indeed, the utility model discloses a resistance and electric capacity value have certain scope, the parameter range of first resistance R1 is 1K omega-10K omega, the parameter range of second resistance R2 is 1 omega-100 omega, the parameter range of third resistance R3 is 1 omega-120 omega, the parameter range of first electric capacity C1 is 1uF-100uF, the parameter range of second electric capacity C2 is 1uF-500uF, the parameter range of third electric capacity C3 is 1uF-300uF, the parameter range of electric capacity C4 is 1uF-400 uF.
The utility model discloses a two embodiments all utilize the zero setting circuit to eliminate the potential difference under the zero input, combine direct current voltage stabilizing circuit to further level and smooth the processing to measuring current simultaneously for the testing result to piezoresistive sensor is more stable and accurate, need not insert detecting instrument in the on the other hand circuit, from the overhead self circuit interference of getting rid of supply voltage source, has also reduced the equipment cost of circuit simultaneously, and stability is higher.
Above, only the preferred embodiment of the present invention has been described, the present invention is not limited to the above embodiment, and the technical effects of the present invention can be achieved by the same means, which all belong to the protection scope of the present invention.

Claims (7)

1. A detection circuit applied to a piezoresistive sensor is characterized in that: comprises a direct current voltage stabilizing circuit, a voltage dividing circuit, a differential amplifying circuit and a zero setting circuit, wherein the voltage dividing circuit comprises a first branch circuit and a second branch circuit, the first branch circuit and the second branch circuit are grounded after being connected in parallel, the first branch circuit comprises a first reference resistor and a serial end for accessing a sensor to be tested, the first reference resistor is connected with the series end in series, the second branch circuit comprises a second reference resistor and a third reference resistor, the second reference resistor and the third reference resistor are connected in series, the output end of the direct current voltage stabilizing circuit is connected with the voltage dividing circuit, the first reference resistor and the series connection end are connected in series, and between the second reference resistance and the third reference resistance, leading out lines respectively connected to the differential amplifier circuit, the output end of the zero setting circuit is connected with the differential amplification circuit, and the output end of the differential amplification circuit is used as a detection result output end.
2. The detection circuit applied to the piezoresistive sensor according to claim 1, wherein: the direct current voltage stabilizing circuit comprises a transformer (T1), a rectifying circuit, a filter circuit and a voltage stabilizing circuit, wherein the transformer (T1), the rectifying circuit, the filter circuit and the voltage stabilizing circuit are sequentially connected, the voltage stabilizing circuit is connected with the voltage dividing circuit, the input end of the transformer (T1) is connected with an alternating current mains supply, and the output end of the transformer (T1) is connected with two alternating current ends of the rectifying circuit.
3. The detection circuit applied to the piezoresistive sensor according to claim 2, wherein: the type of the transformer (T1) is NLT-PQ-4-10, and the type of the rectifying circuit is 1B4B 42.
4. The detection circuit applied to the piezoresistive sensor according to claim 2, wherein: the filter circuit comprises a second capacitor (C2) and a third capacitor (C3), and the second capacitor (C2) and the third capacitor (C3) are connected in parallel and then connected to two direct current ends of the rectifying circuit.
5. The detection circuit applied to the piezoresistive sensor according to claim 4, wherein: the voltage stabilizing circuit comprises a voltage stabilizer (U1), a first resistor (R1), a second resistor (R2), a third resistor (R3), a first capacitor (C1) and a capacitor (C4), wherein the input end of the voltage stabilizer (U1) is connected with the filter circuit, the common end of the voltage stabilizer (U1), the first resistor (R1) and the third resistor (R3) are sequentially connected in series, the second resistor (R2) and the capacitor (C4) are connected in series to the output end of the voltage stabilizer (U1), and the first capacitor (C1) is also connected to the output end of the voltage stabilizer (U1).
6. The detection circuit applied to the piezoresistive sensor according to claim 5, wherein: the first resistor (R1) is 1K omega, the second resistor (R2) is 60 omega, the third resistor (R3) is 20 omega, the first capacitor (C1) is 1uF, the second capacitor (C2) is 470uF, the third capacitor (C3) is 100uF, and the capacitor (C4) is 100 nF.
7. The detection circuit applied to the piezoresistive sensor according to claim 5, wherein: the first resistor (R1) is 5K omega, the second resistor (R2) is 47 omega, the third resistor (R3) is 60 omega, the first capacitor (C1) is 47uF, the second capacitor (C2) is 47uF, the third capacitor (C3) is 200uF, and the capacitor (C4) is 47 nF.
CN201920884548.5U 2019-06-12 2019-06-12 Detection circuit applied to piezoresistive sensor Expired - Fee Related CN210051350U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201920884548.5U CN210051350U (en) 2019-06-12 2019-06-12 Detection circuit applied to piezoresistive sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201920884548.5U CN210051350U (en) 2019-06-12 2019-06-12 Detection circuit applied to piezoresistive sensor

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Publication Number Publication Date
CN210051350U true CN210051350U (en) 2020-02-11

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110220537A (en) * 2019-06-12 2019-09-10 五邑大学 A kind of detection circuit applied to piezoresistive transducer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110220537A (en) * 2019-06-12 2019-09-10 五邑大学 A kind of detection circuit applied to piezoresistive transducer

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20200211

Termination date: 20200612

CF01 Termination of patent right due to non-payment of annual fee